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73210dcc TH |
1 | /* |
2 | * Copyright (C) 2014 Gateworks Corporation | |
3 | * Author: Tim Harvey <[email protected]> | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | #include <common.h> | |
8 | #include <nand.h> | |
9 | #include <malloc.h> | |
10 | ||
151c06ec | 11 | static struct mtd_info mtd; |
73210dcc TH |
12 | static struct nand_chip nand_chip; |
13 | ||
14 | static void mxs_nand_command(struct mtd_info *mtd, unsigned int command, | |
15 | int column, int page_addr) | |
16 | { | |
17 | register struct nand_chip *chip = mtd->priv; | |
18 | u32 timeo, time_start; | |
19 | ||
20 | /* write out the command to the device */ | |
21 | chip->cmd_ctrl(mtd, command, NAND_CLE); | |
22 | ||
23 | /* Serially input address */ | |
24 | if (column != -1) { | |
25 | chip->cmd_ctrl(mtd, column, NAND_ALE); | |
26 | chip->cmd_ctrl(mtd, column >> 8, NAND_ALE); | |
27 | } | |
28 | if (page_addr != -1) { | |
29 | chip->cmd_ctrl(mtd, page_addr, NAND_ALE); | |
30 | chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE); | |
31 | /* One more address cycle for devices > 128MiB */ | |
32 | if (chip->chipsize > (128 << 20)) | |
33 | chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE); | |
34 | } | |
35 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0); | |
36 | ||
37 | if (command == NAND_CMD_READ0) { | |
38 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE); | |
39 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0); | |
40 | } | |
41 | ||
42 | /* wait for nand ready */ | |
43 | ndelay(100); | |
44 | timeo = (CONFIG_SYS_HZ * 20) / 1000; | |
45 | time_start = get_timer(0); | |
46 | while (get_timer(time_start) < timeo) { | |
47 | if (chip->dev_ready(mtd)) | |
48 | break; | |
49 | } | |
50 | } | |
51 | ||
52 | static int mxs_flash_ident(struct mtd_info *mtd) | |
53 | { | |
54 | register struct nand_chip *chip = mtd->priv; | |
55 | int i; | |
56 | u8 mfg_id, dev_id; | |
57 | u8 id_data[8]; | |
58 | struct nand_onfi_params *p = &chip->onfi_params; | |
59 | ||
60 | /* Reset the chip */ | |
61 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); | |
62 | ||
63 | /* Send the command for reading device ID */ | |
64 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); | |
65 | ||
66 | /* Read manufacturer and device IDs */ | |
67 | mfg_id = chip->read_byte(mtd); | |
68 | dev_id = chip->read_byte(mtd); | |
69 | ||
70 | /* Try again to make sure */ | |
71 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); | |
72 | for (i = 0; i < 8; i++) | |
73 | id_data[i] = chip->read_byte(mtd); | |
74 | if (id_data[0] != mfg_id || id_data[1] != dev_id) { | |
75 | printf("second ID read did not match"); | |
76 | return -1; | |
77 | } | |
78 | debug("0x%02x:0x%02x ", mfg_id, dev_id); | |
79 | ||
80 | /* read ONFI */ | |
81 | chip->onfi_version = 0; | |
82 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); | |
83 | if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || | |
84 | chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') { | |
85 | return -2; | |
86 | } | |
87 | ||
88 | /* we have ONFI, probe it */ | |
89 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); | |
90 | chip->read_buf(mtd, (uint8_t *)p, sizeof(*p)); | |
91 | mtd->name = p->model; | |
92 | mtd->writesize = le32_to_cpu(p->byte_per_page); | |
93 | mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; | |
94 | mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); | |
95 | chip->chipsize = le32_to_cpu(p->blocks_per_lun); | |
96 | chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; | |
97 | /* Calculate the address shift from the page size */ | |
98 | chip->page_shift = ffs(mtd->writesize) - 1; | |
99 | chip->phys_erase_shift = ffs(mtd->erasesize) - 1; | |
100 | /* Convert chipsize to number of pages per chip -1 */ | |
101 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; | |
102 | chip->badblockbits = 8; | |
103 | ||
104 | debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift); | |
105 | debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift); | |
106 | debug("oobsize=%d\n", mtd->oobsize); | |
107 | debug("chipsize=%lld\n", chip->chipsize); | |
108 | ||
109 | return 0; | |
110 | } | |
111 | ||
112 | static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page) | |
113 | { | |
114 | register struct nand_chip *chip = mtd->priv; | |
115 | int ret; | |
116 | ||
117 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page); | |
118 | ret = nand_chip.ecc.read_page(mtd, chip, buf, 1, page); | |
119 | if (ret < 0) { | |
120 | printf("read_page failed %d\n", ret); | |
121 | return -1; | |
122 | } | |
123 | return 0; | |
124 | } | |
125 | ||
126 | static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt) | |
127 | { | |
128 | register struct nand_chip *chip = mtd->priv; | |
129 | unsigned int block = offs >> chip->phys_erase_shift; | |
130 | unsigned int page = offs >> chip->page_shift; | |
131 | ||
132 | debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block, | |
133 | page); | |
134 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); | |
135 | memset(chip->oob_poi, 0, mtd->oobsize); | |
136 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); | |
137 | ||
138 | return chip->oob_poi[0] != 0xff; | |
139 | } | |
140 | ||
141 | /* setup mtd and nand structs and init mxs_nand driver */ | |
142 | static int mxs_nand_init(void) | |
143 | { | |
144 | /* return if already initalized */ | |
145 | if (nand_chip.numchips) | |
146 | return 0; | |
147 | ||
148 | /* init mxs nand driver */ | |
149 | board_nand_init(&nand_chip); | |
150 | mtd.priv = &nand_chip; | |
151 | /* set mtd functions */ | |
152 | nand_chip.cmdfunc = mxs_nand_command; | |
153 | nand_chip.numchips = 1; | |
154 | ||
155 | /* identify flash device */ | |
156 | puts("NAND : "); | |
157 | if (mxs_flash_ident(&mtd)) { | |
158 | printf("Failed to identify\n"); | |
159 | return -1; | |
160 | } | |
161 | ||
162 | /* allocate and initialize buffers */ | |
163 | nand_chip.buffers = memalign(ARCH_DMA_MINALIGN, | |
164 | sizeof(*nand_chip.buffers)); | |
165 | nand_chip.oob_poi = nand_chip.buffers->databuf + mtd.writesize; | |
166 | /* setup flash layout (does not scan as we override that) */ | |
167 | mtd.size = nand_chip.chipsize; | |
168 | nand_chip.scan_bbt(&mtd); | |
169 | ||
170 | printf("%llu MiB\n", (mtd.size / (1024 * 1024))); | |
171 | return 0; | |
172 | } | |
173 | ||
174 | int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf) | |
175 | { | |
176 | struct nand_chip *chip; | |
177 | unsigned int page; | |
178 | unsigned int nand_page_per_block; | |
179 | unsigned int sz = 0; | |
180 | ||
181 | if (mxs_nand_init()) | |
182 | return -ENODEV; | |
183 | chip = mtd.priv; | |
184 | page = offs >> chip->page_shift; | |
185 | nand_page_per_block = mtd.erasesize / mtd.writesize; | |
186 | ||
187 | debug("%s offset:0x%08x len:%d page:%d\n", __func__, offs, size, page); | |
188 | ||
189 | size = roundup(size, mtd.writesize); | |
190 | while (sz < size) { | |
191 | if (mxs_read_page_ecc(&mtd, buf, page) < 0) | |
192 | return -1; | |
193 | sz += mtd.writesize; | |
194 | offs += mtd.writesize; | |
195 | page++; | |
196 | buf += mtd.writesize; | |
197 | ||
198 | /* | |
199 | * Check if we have crossed a block boundary, and if so | |
200 | * check for bad block. | |
201 | */ | |
202 | if (!(page % nand_page_per_block)) { | |
203 | /* | |
204 | * Yes, new block. See if this block is good. If not, | |
205 | * loop until we find a good block. | |
206 | */ | |
207 | while (is_badblock(&mtd, offs, 1)) { | |
208 | page = page + nand_page_per_block; | |
209 | /* Check i we've reached the end of flash. */ | |
210 | if (page >= mtd.size >> chip->page_shift) | |
211 | return -ENOMEM; | |
212 | } | |
213 | } | |
214 | } | |
215 | ||
216 | return 0; | |
217 | } | |
218 | ||
219 | int nand_default_bbt(struct mtd_info *mtd) | |
220 | { | |
221 | return 0; | |
222 | } | |
223 | ||
224 | void nand_init(void) | |
225 | { | |
226 | } | |
227 | ||
228 | void nand_deselect(void) | |
229 | { | |
230 | } | |
231 |