[J-u-boot.git] / nand_spl / nand_boot_fsl_nfc.c

/*
 * (C) Copyright 2009
 * Magnus Lilja <[email protected]>
 *
 * (C) Copyright 2008
 * Maxim Artamonov, <scn1874 at yandex.ru>
 *
 * (C) Copyright 2006-2008
 * Stefan Roese, DENX Software Engineering, sr at denx.de.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <nand.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
#include <fsl_nfc.h>

static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;

static void nfc_wait_ready(void)
{
	uint32_t tmp;

	while (!(readw(&nfc->nand_flash_config2) & NFC_INT))
		;

	/* Reset interrupt flag */
	tmp = readw(&nfc->nand_flash_config2);
	tmp &= ~NFC_INT;
	writew(tmp, &nfc->nand_flash_config2);
}

void nfc_nand_init(void)
{
#if defined(MXC_NFC_V1_1)
	int ecc_per_page  = CONFIG_SYS_NAND_PAGE_SIZE / 512;
	int config1;

	writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);

	/* unlocking RAM Buff */
	writew(0x2, &nfc->configuration);

	/* hardware ECC checking and correct */
	config1 = readw(&nfc->nand_flash_config1) | NFC_ECC_EN | 0x800;
	/*
	 * if spare size is larger that 16 bytes per 512 byte hunk
	 * then use 8 symbol correction instead of 4
	 */
	if ((CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page) > 16)
		config1 &= ~NFC_4_8N_ECC;
	else
		config1 |= NFC_4_8N_ECC;
	writew(config1, &nfc->nand_flash_config1);
#elif defined(MXC_NFC_V1)
	/* unlocking RAM Buff */
	writew(0x2, &nfc->configuration);

	/* hardware ECC checking and correct */
	writew(NFC_ECC_EN, &nfc->nand_flash_config1);
#endif
}

static void nfc_nand_command(unsigned short command)
{
	writew(command, &nfc->flash_cmd);
	writew(NFC_CMD, &nfc->nand_flash_config2);
	nfc_wait_ready();
}

static void nfc_nand_page_address(unsigned int page_address)
{
	unsigned int page_count;

	writew(0x00, &nfc->flash_add);
	writew(NFC_ADDR, &nfc->nand_flash_config2);
	nfc_wait_ready();

	/* code only for large page flash */
	if (CONFIG_SYS_NAND_PAGE_SIZE > 512) {
		writew(0x00, &nfc->flash_add);
		writew(NFC_ADDR, &nfc->nand_flash_config2);
		nfc_wait_ready();
	}

	page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;

	if (page_address <= page_count) {
		page_count--; /* transform 0x01000000 to 0x00ffffff */
		do {
			writew(page_address & 0xff, &nfc->flash_add);
			writew(NFC_ADDR, &nfc->nand_flash_config2);
			nfc_wait_ready();
			page_address = page_address >> 8;
			page_count = page_count >> 8;
		} while (page_count);
	}

	writew(0x00, &nfc->flash_add);
	writew(NFC_ADDR, &nfc->nand_flash_config2);
	nfc_wait_ready();
}

static void nfc_nand_data_output(void)
{
	int config1 = readw(&nfc->nand_flash_config1);
#ifdef NAND_MXC_2K_MULTI_CYCLE
	int i;
#endif

	config1 |= NFC_ECC_EN | NFC_INT_MSK;
	writew(config1, &nfc->nand_flash_config1);
	writew(0, &nfc->buffer_address);
	writew(NFC_OUTPUT, &nfc->nand_flash_config2);
	nfc_wait_ready();
#ifdef NAND_MXC_2K_MULTI_CYCLE
	/*
	 * This NAND controller requires multiple input commands
	 * for pages larger than 512 bytes.
	 */
	for (i = 1; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
		config1 = readw(&nfc->nand_flash_config1);
		config1 |= NFC_ECC_EN | NFC_INT_MSK;
		writew(config1, &nfc->nand_flash_config1);
		writew(i, &nfc->buffer_address);
		writew(NFC_OUTPUT, &nfc->nand_flash_config2);
		nfc_wait_ready();
	}
#endif
}

static int nfc_nand_check_ecc(void)
{
	return readw(&nfc->ecc_status_result);
}

static int nfc_read_page(unsigned int page_address, unsigned char *buf)
{
	int i;
	u32 *src;
	u32 *dst;

	writew(0, &nfc->buffer_address); /* read in first 0 buffer */
	nfc_nand_command(NAND_CMD_READ0);
	nfc_nand_page_address(page_address);

	if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
		nfc_nand_command(NAND_CMD_READSTART);

	nfc_nand_data_output(); /* fill the main buffer 0 */

	if (nfc_nand_check_ecc())
		return -1;

	src = &nfc->main_area[0][0];
	dst = (u32 *)buf;

	/* main copy loop from NAND-buffer to SDRAM memory */
	for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 4); i++) {
		writel(readl(src), dst);
		src++;
		dst++;
	}

	return 0;
}

static int is_badblock(int pagenumber)
{
	int page = pagenumber;
	u32 badblock;
	u32 *src;

	/* Check the first two pages for bad block markers */
	for (page = pagenumber; page < pagenumber + 2; page++) {
		writew(0, &nfc->buffer_address); /* read in first 0 buffer */
		nfc_nand_command(NAND_CMD_READ0);
		nfc_nand_page_address(page);

		if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
			nfc_nand_command(NAND_CMD_READSTART);

		nfc_nand_data_output(); /* fill the main buffer 0 */

		src = &nfc->spare_area[0][0];

		/*
		 * IMPORTANT NOTE: The nand flash controller uses a non-
		 * standard layout for large page devices. This can
		 * affect the position of the bad block marker.
		 */
		/* Get the bad block marker */
		badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
		badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
		badblock &= 0xff;

		/* bad block marker verify */
		if (badblock != 0xff)
			return 1; /* potential bad block */
	}

	return 0;
}

static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
{
	int i;
	unsigned int page;
	unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
				CONFIG_SYS_NAND_PAGE_SIZE;

	nfc_nand_init();

	/* Convert to page number */
	page = from / CONFIG_SYS_NAND_PAGE_SIZE;
	i = 0;

	while (i < (size / CONFIG_SYS_NAND_PAGE_SIZE)) {
		if (nfc_read_page(page, buf) < 0)
			return -1;

		page++;
		i++;
		buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;

		/*
		 * Check if we have crossed a block boundary, and if so
		 * check for bad block.
		 */
		if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
			/*
			 * Yes, new block. See if this block is good. If not,
			 * loop until we find a good block.
			 */
			while (is_badblock(page)) {
				page = page + CONFIG_SYS_NAND_PAGE_COUNT;
				/* Check i we've reached the end of flash. */
				if (page >= maxpages)
					return -1;
			}
		}
	}

	return 0;
}

#if defined(CONFIG_ARM)
void board_init_f (ulong bootflag)
{
	relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
		       CONFIG_SYS_TEXT_BASE);
}
#endif

/*
 * The main entry for NAND booting. It's necessary that SDRAM is already
 * configured and available since this code loads the main U-Boot image
 * from NAND into SDRAM and starts it from there.
 */
void nand_boot(void)
{
	__attribute__((noreturn)) void (*uboot)(void);

	/*
	 * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
	 * be aligned to full pages
	 */
	if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
		       (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
		/* Copy from NAND successful, start U-boot */
		uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
		uboot();
	} else {
		/* Unrecoverable error when copying from NAND */
		hang();
	}
}

/*
 * Called in case of an exception.
 */
void hang(void)
{
	/* Loop forever */
	while (1) ;
}
Commit	Line	Data
40c642bc ML	1	/*
	2	* (C) Copyright 2009
	3	* Magnus Lilja <[email protected]>
	4	*
	5	* (C) Copyright 2008
	6	* Maxim Artamonov, <scn1874 at yandex.ru>
	7	*
	8	* (C) Copyright 2006-2008
	9	* Stefan Roese, DENX Software Engineering, sr at denx.de.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#include <common.h>
	28	#include <nand.h>
61f2b38a	29	#include <asm/arch/imx-regs.h>
40c642bc ML	30	#include <asm/io.h>
	31	#include <fsl_nfc.h>
	32
4fff329d	33	static struct fsl_nfc_regs const nfc = (void )NFC_BASE_ADDR;
40c642bc ML	34
	35	static void nfc_wait_ready(void)
	36	{
	37	uint32_t tmp;
	38
	39	while (!(readw(&nfc->nand_flash_config2) & NFC_INT))
	40	;
	41
	42	/* Reset interrupt flag */
	43	tmp = readw(&nfc->nand_flash_config2);
	44	tmp &= ~NFC_INT;
	45	writew(tmp, &nfc->nand_flash_config2);
	46	}
	47
f3bb63a3	48	void nfc_nand_init(void)
40c642bc	49	{
f3bb63a3 JR	50	#if defined(MXC_NFC_V1_1)
	51	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
	52	int config1;
	53
	54	writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
	55
	56	/* unlocking RAM Buff */
	57	writew(0x2, &nfc->configuration);
	58
	59	/* hardware ECC checking and correct */
	60	config1 = readw(&nfc->nand_flash_config1) \| NFC_ECC_EN \| 0x800;
	61	/*
	62	* if spare size is larger that 16 bytes per 512 byte hunk
	63	* then use 8 symbol correction instead of 4
	64	*/
	65	if ((CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page) > 16)
	66	config1 &= ~NFC_4_8N_ECC;
	67	else
	68	config1 \|= NFC_4_8N_ECC;
	69	writew(config1, &nfc->nand_flash_config1);
	70	#elif defined(MXC_NFC_V1)
40c642bc ML	71	/* unlocking RAM Buff */
	72	writew(0x2, &nfc->configuration);
	73
	74	/* hardware ECC checking and correct */
	75	writew(NFC_ECC_EN, &nfc->nand_flash_config1);
f3bb63a3	76	#endif
40c642bc ML	77	}
	78
	79	static void nfc_nand_command(unsigned short command)
	80	{
	81	writew(command, &nfc->flash_cmd);
	82	writew(NFC_CMD, &nfc->nand_flash_config2);
	83	nfc_wait_ready();
	84	}
	85
	86	static void nfc_nand_page_address(unsigned int page_address)
	87	{
	88	unsigned int page_count;
	89
f3bb63a3	90	writew(0x00, &nfc->flash_add);
40c642bc ML	91	writew(NFC_ADDR, &nfc->nand_flash_config2);
	92	nfc_wait_ready();
	93
f3bb63a3 JR	94	/* code only for large page flash */
f3bb63a3 JR	95	if (CONFIG_SYS_NAND_PAGE_SIZE > 512) {
40c642bc ML	96	writew(0x00, &nfc->flash_add);
	97	writew(NFC_ADDR, &nfc->nand_flash_config2);
	98	nfc_wait_ready();
	99	}
	100
	101	page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
	102
	103	if (page_address <= page_count) {
	104	page_count--; /* transform 0x01000000 to 0x00ffffff */
	105	do {
	106	writew(page_address & 0xff, &nfc->flash_add);
	107	writew(NFC_ADDR, &nfc->nand_flash_config2);
	108	nfc_wait_ready();
	109	page_address = page_address >> 8;
	110	page_count = page_count >> 8;
	111	} while (page_count);
	112	}
f3bb63a3 JR	113
	114	writew(0x00, &nfc->flash_add);
	115	writew(NFC_ADDR, &nfc->nand_flash_config2);
	116	nfc_wait_ready();
40c642bc ML	117	}
	118
	119	static void nfc_nand_data_output(void)
	120	{
f3bb63a3 JR	121	int config1 = readw(&nfc->nand_flash_config1);
f3bb63a3 JR	122	#ifdef NAND_MXC_2K_MULTI_CYCLE
40c642bc	123	int i;
f3bb63a3	124	#endif
40c642bc	125
f3bb63a3 JR	126	config1 \|= NFC_ECC_EN \| NFC_INT_MSK;
	127	writew(config1, &nfc->nand_flash_config1);
	128	writew(0, &nfc->buffer_address);
	129	writew(NFC_OUTPUT, &nfc->nand_flash_config2);
	130	nfc_wait_ready();
	131	#ifdef NAND_MXC_2K_MULTI_CYCLE
40c642bc	132	/*
f3bb63a3 JR	133	* This NAND controller requires multiple input commands
f3bb63a3 JR	134	* for pages larger than 512 bytes.
40c642bc	135	*/
f3bb63a3 JR	136	for (i = 1; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
	137	config1 = readw(&nfc->nand_flash_config1);
	138	config1 \|= NFC_ECC_EN \| NFC_INT_MSK;
	139	writew(config1, &nfc->nand_flash_config1);
	140	writew(i, &nfc->buffer_address);
40c642bc ML	141	writew(NFC_OUTPUT, &nfc->nand_flash_config2);
	142	nfc_wait_ready();
	143	}
f3bb63a3	144	#endif
40c642bc ML	145	}
	146
	147	static int nfc_nand_check_ecc(void)
	148	{
	149	return readw(&nfc->ecc_status_result);
	150	}
	151
	152	static int nfc_read_page(unsigned int page_address, unsigned char *buf)
	153	{
	154	int i;
	155	u32 *src;
	156	u32 *dst;
	157
	158	writew(0, &nfc->buffer_address); /* read in first 0 buffer */
	159	nfc_nand_command(NAND_CMD_READ0);
	160	nfc_nand_page_address(page_address);
	161
f3bb63a3	162	if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
40c642bc ML	163	nfc_nand_command(NAND_CMD_READSTART);
	164
	165	nfc_nand_data_output(); /* fill the main buffer 0 */
	166
	167	if (nfc_nand_check_ecc())
	168	return -1;
	169
f3bb63a3	170	src = &nfc->main_area[0][0];
40c642bc ML	171	dst = (u32 *)buf;
	172
	173	/* main copy loop from NAND-buffer to SDRAM memory */
	174	for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 4); i++) {
	175	writel(readl(src), dst);
	176	src++;
	177	dst++;
	178	}
	179
	180	return 0;
	181	}
	182
	183	static int is_badblock(int pagenumber)
	184	{
	185	int page = pagenumber;
	186	u32 badblock;
	187	u32 *src;
	188
	189	/* Check the first two pages for bad block markers */
	190	for (page = pagenumber; page < pagenumber + 2; page++) {
	191	writew(0, &nfc->buffer_address); /* read in first 0 buffer */
	192	nfc_nand_command(NAND_CMD_READ0);
	193	nfc_nand_page_address(page);
	194
f3bb63a3	195	if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
40c642bc ML	196	nfc_nand_command(NAND_CMD_READSTART);
	197
	198	nfc_nand_data_output(); /* fill the main buffer 0 */
	199
f3bb63a3	200	src = &nfc->spare_area[0][0];
40c642bc ML	201
	202	/*
	203	* IMPORTANT NOTE: The nand flash controller uses a non-
	204	* standard layout for large page devices. This can
	205	* affect the position of the bad block marker.
	206	*/
	207	/* Get the bad block marker */
	208	badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
	209	badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
	210	badblock &= 0xff;
	211
	212	/* bad block marker verify */
	213	if (badblock != 0xff)
	214	return 1; /* potential bad block */
	215	}
	216
	217	return 0;
	218	}
	219
	220	static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
	221	{
	222	int i;
	223	unsigned int page;
	224	unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
	225	CONFIG_SYS_NAND_PAGE_SIZE;
	226
40c642bc ML	227	nfc_nand_init();
	228
	229	/* Convert to page number */
	230	page = from / CONFIG_SYS_NAND_PAGE_SIZE;
	231	i = 0;
	232
	233	while (i < (size / CONFIG_SYS_NAND_PAGE_SIZE)) {
	234	if (nfc_read_page(page, buf) < 0)
	235	return -1;
	236
	237	page++;
	238	i++;
	239	buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
	240
	241	/*
	242	* Check if we have crossed a block boundary, and if so
	243	* check for bad block.
	244	*/
	245	if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
	246	/*
	247	* Yes, new block. See if this block is good. If not,
f3bb63a3	248	* loop until we find a good block.
40c642bc ML	249	*/
	250	while (is_badblock(page)) {
	251	page = page + CONFIG_SYS_NAND_PAGE_COUNT;
	252	/* Check i we've reached the end of flash. */
	253	if (page >= maxpages)
	254	return -1;
	255	}
	256	}
	257	}
	258
	259	return 0;
	260	}
	261
a9aa3926	262	#if defined(CONFIG_ARM)
f1d2b313 HS	263	void board_init_f (ulong bootflag)
f1d2b313 HS	264	{
c8d76eaf WD	265	relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
c8d76eaf WD	266	CONFIG_SYS_TEXT_BASE);
f1d2b313 HS	267	}
	268	#endif
	269
40c642bc ML	270	/*
	271	* The main entry for NAND booting. It's necessary that SDRAM is already
	272	* configured and available since this code loads the main U-Boot image
	273	* from NAND into SDRAM and starts it from there.
	274	*/
	275	void nand_boot(void)
	276	{
	277	__attribute__((noreturn)) void (*uboot)(void);
	278
40c642bc ML	279	/*
	280	* CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
	281	* be aligned to full pages
	282	*/
	283	if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
	284	(uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
	285	/* Copy from NAND successful, start U-boot */
	286	uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
	287	uboot();
	288	} else {
	289	/* Unrecoverable error when copying from NAND */
	290	hang();
	291	}
	292	}
	293
	294	/*
	295	* Called in case of an exception.
	296	*/
	297	void hang(void)
	298	{
	299	/* Loop forever */
	300	while (1) ;
	301	}