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1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * Copyright 2020 Toradex | |
4 | */ | |
5 | ||
6 | #ifndef __VERDIN_IMX8MM_H | |
7 | #define __VERDIN_IMX8MM_H | |
8 | ||
9 | #include <asm/arch/imx-regs.h> | |
10 | #include <linux/sizes.h> | |
11 | ||
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12 | #define CONFIG_SPL_MAX_SIZE (148 * 1024) |
13 | #define CONFIG_SYS_MONITOR_LEN SZ_512K | |
14 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR | |
15 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 | |
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16 | #define CONFIG_SYS_UBOOT_BASE \ |
17 | (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) | |
18 | ||
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19 | #define CONFIG_SYS_BOOTM_LEN SZ_64M |
20 | ||
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21 | #ifdef CONFIG_SPL_BUILD |
22 | #define CONFIG_SPL_STACK 0x920000 | |
23 | #define CONFIG_SPL_BSS_START_ADDR 0x910000 | |
24 | #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ | |
25 | #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 | |
26 | #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ | |
27 | ||
28 | /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ | |
29 | #define CONFIG_MALLOC_F_ADDR 0x930000 | |
30 | /* For RAW image gives a error info not panic */ | |
31 | #define CONFIG_SPL_ABORT_ON_RAW_IMAGE | |
32 | #endif | |
33 | ||
34 | #define MEM_LAYOUT_ENV_SETTINGS \ | |
35 | "fdt_addr_r=0x44000000\0" \ | |
36 | "kernel_addr_r=0x42000000\0" \ | |
37 | "ramdisk_addr_r=0x46400000\0" \ | |
38 | "scriptaddr=0x46000000\0" | |
39 | ||
72d81360 | 40 | #define CONFIG_SYS_LOAD_ADDR 0x40480000 |
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41 | |
42 | /* Enable Distro Boot */ | |
43 | #ifndef CONFIG_SPL_BUILD | |
44 | #define BOOT_TARGET_DEVICES(func) \ | |
45 | func(MMC, mmc, 1) \ | |
46 | func(MMC, mmc, 0) \ | |
47 | func(DHCP, dhcp, na) | |
48 | #include <config_distro_bootcmd.h> | |
49 | #undef CONFIG_ISO_PARTITION | |
50 | #else | |
51 | #define BOOTENV | |
52 | #endif | |
53 | ||
54 | /* Initial environment variables */ | |
55 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
56 | BOOTENV \ | |
57 | MEM_LAYOUT_ENV_SETTINGS \ | |
58 | "bootcmd_mfg=fastboot 0\0" \ | |
59 | "console=ttymxc0\0" \ | |
60 | "fdt_addr=0x43000000\0" \ | |
61 | "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ | |
62 | "initrd_addr=0x43800000\0" \ | |
63 | "initrd_high=0xffffffffffffffff\0" \ | |
64 | "kernel_image=Image\0" \ | |
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65 | "netargs=setenv bootargs console=${console},${baudrate} " \ |
66 | "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ | |
67 | "\0" \ | |
68 | "nfsboot=run netargs; dhcp ${loadaddr} ${kernel_image}; " \ | |
69 | "tftp ${fdt_addr} verdin/${fdtfile}; " \ | |
70 | "booti ${loadaddr} - ${fdt_addr}\0" \ | |
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71 | "setup=setenv setupargs console=${console},${baudrate} " \ |
72 | "console=tty1 consoleblank=0 earlycon\0" \ | |
73 | "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ | |
74 | "if test \"$confirm\" = \"y\"; then " \ | |
75 | "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ | |
76 | "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \ | |
77 | "${blkcnt}; fi\0" | |
78 | ||
79 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 | |
80 | #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M | |
81 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
82 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
83 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
84 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
85 | ||
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86 | #if defined(CONFIG_ENV_IS_IN_MMC) |
87 | /* Environment in eMMC, before config block at the end of 1st "boot sector" */ | |
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88 | #endif |
89 | ||
90 | /* Size of malloc() pool */ | |
91 | #define CONFIG_SYS_MALLOC_LEN SZ_32M | |
92 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 | |
93 | ||
94 | /* SDRAM configuration */ | |
95 | #define PHYS_SDRAM 0x40000000 | |
96 | #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ | |
97 | ||
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98 | /* UART */ |
99 | #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR | |
100 | ||
101 | /* Monitor Command Prompt */ | |
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102 | #define CONFIG_SYS_CBSIZE SZ_2K |
103 | #define CONFIG_SYS_MAXARGS 64 | |
104 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
105 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
106 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
107 | /* USDHC */ | |
108 | #define CONFIG_FSL_USDHC | |
109 | #define CONFIG_SYS_FSL_USDHC_NUM 2 | |
110 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
111 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 | |
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112 | |
113 | /* ENET */ | |
114 | #define CONFIG_ETHPRIME "FEC" | |
115 | #define CONFIG_FEC_XCV_TYPE RGMII | |
116 | #define CONFIG_FEC_MXC_PHYADDR 7 | |
117 | #define FEC_QUIRK_ENET_MAC | |
118 | #define IMX_FEC_BASE 0x30BE0000 | |
119 | ||
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120 | /* USB Configs */ |
121 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
122 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
123 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
124 | ||
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125 | #endif /*_VERDIN_IMX8MM_H */ |
126 |