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1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * Copyright 2020 Toradex | |
4 | */ | |
5 | ||
6 | #ifndef __VERDIN_IMX8MM_H | |
7 | #define __VERDIN_IMX8MM_H | |
8 | ||
9 | #include <asm/arch/imx-regs.h> | |
10 | #include <linux/sizes.h> | |
11 | ||
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12 | #define CONFIG_SPL_MAX_SIZE (148 * 1024) |
13 | #define CONFIG_SYS_MONITOR_LEN SZ_512K | |
14 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR | |
15 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 | |
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16 | #define CONFIG_SYS_UBOOT_BASE \ |
17 | (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) | |
18 | ||
19 | #ifdef CONFIG_SPL_BUILD | |
20 | #define CONFIG_SPL_STACK 0x920000 | |
21 | #define CONFIG_SPL_BSS_START_ADDR 0x910000 | |
22 | #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ | |
23 | #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 | |
24 | #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ | |
25 | ||
26 | /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ | |
27 | #define CONFIG_MALLOC_F_ADDR 0x930000 | |
28 | /* For RAW image gives a error info not panic */ | |
29 | #define CONFIG_SPL_ABORT_ON_RAW_IMAGE | |
30 | #endif | |
31 | ||
32 | #define MEM_LAYOUT_ENV_SETTINGS \ | |
33 | "fdt_addr_r=0x44000000\0" \ | |
34 | "kernel_addr_r=0x42000000\0" \ | |
35 | "ramdisk_addr_r=0x46400000\0" \ | |
36 | "scriptaddr=0x46000000\0" | |
37 | ||
38 | #define CONFIG_LOADADDR 0x40480000 | |
39 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
40 | ||
41 | /* Enable Distro Boot */ | |
42 | #ifndef CONFIG_SPL_BUILD | |
43 | #define BOOT_TARGET_DEVICES(func) \ | |
44 | func(MMC, mmc, 1) \ | |
45 | func(MMC, mmc, 0) \ | |
46 | func(DHCP, dhcp, na) | |
47 | #include <config_distro_bootcmd.h> | |
48 | #undef CONFIG_ISO_PARTITION | |
49 | #else | |
50 | #define BOOTENV | |
51 | #endif | |
52 | ||
53 | /* Initial environment variables */ | |
54 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
55 | BOOTENV \ | |
56 | MEM_LAYOUT_ENV_SETTINGS \ | |
57 | "bootcmd_mfg=fastboot 0\0" \ | |
58 | "console=ttymxc0\0" \ | |
59 | "fdt_addr=0x43000000\0" \ | |
60 | "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ | |
61 | "initrd_addr=0x43800000\0" \ | |
62 | "initrd_high=0xffffffffffffffff\0" \ | |
63 | "kernel_image=Image\0" \ | |
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64 | "netargs=setenv bootargs console=${console},${baudrate} " \ |
65 | "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ | |
66 | "\0" \ | |
67 | "nfsboot=run netargs; dhcp ${loadaddr} ${kernel_image}; " \ | |
68 | "tftp ${fdt_addr} verdin/${fdtfile}; " \ | |
69 | "booti ${loadaddr} - ${fdt_addr}\0" \ | |
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70 | "setup=setenv setupargs console=${console},${baudrate} " \ |
71 | "console=tty1 consoleblank=0 earlycon\0" \ | |
72 | "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ | |
73 | "if test \"$confirm\" = \"y\"; then " \ | |
74 | "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ | |
75 | "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \ | |
76 | "${blkcnt}; fi\0" | |
77 | ||
78 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 | |
79 | #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M | |
80 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
81 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
82 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
83 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
84 | ||
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85 | #if defined(CONFIG_ENV_IS_IN_MMC) |
86 | /* Environment in eMMC, before config block at the end of 1st "boot sector" */ | |
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87 | #endif |
88 | ||
89 | /* Size of malloc() pool */ | |
90 | #define CONFIG_SYS_MALLOC_LEN SZ_32M | |
91 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 | |
92 | ||
93 | /* SDRAM configuration */ | |
94 | #define PHYS_SDRAM 0x40000000 | |
95 | #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ | |
96 | ||
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97 | /* UART */ |
98 | #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR | |
99 | ||
100 | /* Monitor Command Prompt */ | |
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101 | #define CONFIG_SYS_CBSIZE SZ_2K |
102 | #define CONFIG_SYS_MAXARGS 64 | |
103 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
104 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
105 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
106 | /* USDHC */ | |
107 | #define CONFIG_FSL_USDHC | |
108 | #define CONFIG_SYS_FSL_USDHC_NUM 2 | |
109 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
110 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 | |
111 | #define CONFIG_SYS_I2C_SPEED 100000 | |
112 | ||
113 | /* ENET */ | |
114 | #define CONFIG_ETHPRIME "FEC" | |
115 | #define CONFIG_FEC_XCV_TYPE RGMII | |
116 | #define CONFIG_FEC_MXC_PHYADDR 7 | |
117 | #define FEC_QUIRK_ENET_MAC | |
118 | #define IMX_FEC_BASE 0x30BE0000 | |
119 | ||
120 | #endif /*_VERDIN_IMX8MM_H */ | |
121 |