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1/*
2 * Generic PHY Management code
3 *
1a459660 4 * SPDX-License-Identifier: GPL-2.0+
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5 *
6 * Copyright 2011 Freescale Semiconductor, Inc.
7 * author Andy Fleming
8 *
9 * Based loosely off of Linux's PHY Lib
10 */
11
12#include <config.h>
13#include <common.h>
24b852a7 14#include <console.h>
c74c8e66 15#include <dm.h>
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16#include <malloc.h>
17#include <net.h>
18#include <command.h>
19#include <miiphy.h>
20#include <phy.h>
21#include <errno.h>
1adb406b 22#include <linux/err.h>
597fe041 23#include <linux/compiler.h>
5f184715 24
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MS
25DECLARE_GLOBAL_DATA_PTR;
26
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27/* Generic PHY support and helper functions */
28
29/**
30 * genphy_config_advert - sanitize and advertise auto-negotation parameters
31 * @phydev: target phy_device struct
32 *
33 * Description: Writes MII_ADVERTISE with the appropriate values,
34 * after sanitizing the values to make sure we only advertise
35 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
36 * hasn't changed, and > 0 if it has changed.
37 */
960d70c6 38static int genphy_config_advert(struct phy_device *phydev)
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39{
40 u32 advertise;
bbdcaff1 41 int oldadv, adv, bmsr;
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42 int err, changed = 0;
43
bbdcaff1 44 /* Only allow advertising what this PHY supports */
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45 phydev->advertising &= phydev->supported;
46 advertise = phydev->advertising;
47
48 /* Setup standard advertisement */
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FF
49 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
50 oldadv = adv;
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51
52 if (adv < 0)
53 return adv;
54
55 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
56 ADVERTISE_PAUSE_ASYM);
57 if (advertise & ADVERTISED_10baseT_Half)
58 adv |= ADVERTISE_10HALF;
59 if (advertise & ADVERTISED_10baseT_Full)
60 adv |= ADVERTISE_10FULL;
61 if (advertise & ADVERTISED_100baseT_Half)
62 adv |= ADVERTISE_100HALF;
63 if (advertise & ADVERTISED_100baseT_Full)
64 adv |= ADVERTISE_100FULL;
65 if (advertise & ADVERTISED_Pause)
66 adv |= ADVERTISE_PAUSE_CAP;
67 if (advertise & ADVERTISED_Asym_Pause)
68 adv |= ADVERTISE_PAUSE_ASYM;
de1d786e
CC
69 if (advertise & ADVERTISED_1000baseX_Half)
70 adv |= ADVERTISE_1000XHALF;
71 if (advertise & ADVERTISED_1000baseX_Full)
72 adv |= ADVERTISE_1000XFULL;
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73
74 if (adv != oldadv) {
75 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
76
77 if (err < 0)
78 return err;
79 changed = 1;
80 }
81
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FF
82 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
83 if (bmsr < 0)
84 return bmsr;
85
86 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
87 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
88 * logical 1.
89 */
90 if (!(bmsr & BMSR_ESTATEN))
91 return changed;
92
5f184715 93 /* Configure gigabit if it's supported */
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94 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
95 oldadv = adv;
96
97 if (adv < 0)
98 return adv;
5f184715 99
bbdcaff1 100 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
5f184715 101
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102 if (phydev->supported & (SUPPORTED_1000baseT_Half |
103 SUPPORTED_1000baseT_Full)) {
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104 if (advertise & SUPPORTED_1000baseT_Half)
105 adv |= ADVERTISE_1000HALF;
106 if (advertise & SUPPORTED_1000baseT_Full)
107 adv |= ADVERTISE_1000FULL;
bbdcaff1 108 }
5f184715 109
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110 if (adv != oldadv)
111 changed = 1;
5f184715 112
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113 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
114 if (err < 0)
115 return err;
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116
117 return changed;
118}
119
120
121/**
122 * genphy_setup_forced - configures/forces speed/duplex from @phydev
123 * @phydev: target phy_device struct
124 *
125 * Description: Configures MII_BMCR to force speed/duplex
126 * to the values in phydev. Assumes that the values are valid.
127 */
960d70c6 128static int genphy_setup_forced(struct phy_device *phydev)
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129{
130 int err;
53b0c38c 131 int ctl = BMCR_ANRESTART;
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132
133 phydev->pause = phydev->asym_pause = 0;
134
135 if (SPEED_1000 == phydev->speed)
136 ctl |= BMCR_SPEED1000;
137 else if (SPEED_100 == phydev->speed)
138 ctl |= BMCR_SPEED100;
139
140 if (DUPLEX_FULL == phydev->duplex)
141 ctl |= BMCR_FULLDPLX;
142
143 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
144
145 return err;
146}
147
148
149/**
150 * genphy_restart_aneg - Enable and Restart Autonegotiation
151 * @phydev: target phy_device struct
152 */
153int genphy_restart_aneg(struct phy_device *phydev)
154{
155 int ctl;
156
157 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
158
159 if (ctl < 0)
160 return ctl;
161
162 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
163
164 /* Don't isolate the PHY if we're negotiating */
165 ctl &= ~(BMCR_ISOLATE);
166
167 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
168
169 return ctl;
170}
171
172
173/**
174 * genphy_config_aneg - restart auto-negotiation or write BMCR
175 * @phydev: target phy_device struct
176 *
177 * Description: If auto-negotiation is enabled, we configure the
178 * advertising, and then restart auto-negotiation. If it is not
179 * enabled, then we write the BMCR.
180 */
181int genphy_config_aneg(struct phy_device *phydev)
182{
183 int result;
184
185 if (AUTONEG_ENABLE != phydev->autoneg)
186 return genphy_setup_forced(phydev);
187
188 result = genphy_config_advert(phydev);
189
190 if (result < 0) /* error */
191 return result;
192
193 if (result == 0) {
194 /* Advertisment hasn't changed, but maybe aneg was never on to
195 * begin with? Or maybe phy was isolated? */
196 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
197
198 if (ctl < 0)
199 return ctl;
200
201 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
202 result = 1; /* do restart aneg */
203 }
204
205 /* Only restart aneg if we are advertising something different
206 * than we were before. */
207 if (result > 0)
208 result = genphy_restart_aneg(phydev);
209
210 return result;
211}
212
213/**
214 * genphy_update_link - update link status in @phydev
215 * @phydev: target phy_device struct
216 *
217 * Description: Update the value in phydev->link to reflect the
218 * current link value. In order to do this, we need to read
219 * the status register twice, keeping the second value.
220 */
221int genphy_update_link(struct phy_device *phydev)
222{
223 unsigned int mii_reg;
224
225 /*
226 * Wait if the link is up, and autonegotiation is in progress
227 * (ie - we're capable and it's not done)
228 */
229 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
230
231 /*
232 * If we already saw the link up, and it hasn't gone down, then
233 * we don't need to wait for autoneg again
234 */
235 if (phydev->link && mii_reg & BMSR_LSTATUS)
236 return 0;
237
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AM
238 if ((phydev->autoneg == AUTONEG_ENABLE) &&
239 !(mii_reg & BMSR_ANEGCOMPLETE)) {
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240 int i = 0;
241
242 printf("%s Waiting for PHY auto negotiation to complete",
243 phydev->dev->name);
244 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
245 /*
246 * Timeout reached ?
247 */
248 if (i > PHY_ANEG_TIMEOUT) {
249 printf(" TIMEOUT !\n");
250 phydev->link = 0;
251 return 0;
252 }
253
254 if (ctrlc()) {
255 puts("user interrupt!\n");
256 phydev->link = 0;
257 return -EINTR;
258 }
259
260 if ((i++ % 500) == 0)
261 printf(".");
262
263 udelay(1000); /* 1 ms */
264 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
265 }
266 printf(" done\n");
267 phydev->link = 1;
268 } else {
269 /* Read the link a second time to clear the latched state */
270 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
271
272 if (mii_reg & BMSR_LSTATUS)
273 phydev->link = 1;
274 else
275 phydev->link = 0;
276 }
277
278 return 0;
279}
280
281/*
282 * Generic function which updates the speed and duplex. If
283 * autonegotiation is enabled, it uses the AND of the link
284 * partner's advertised capabilities and our advertised
285 * capabilities. If autonegotiation is disabled, we use the
286 * appropriate bits in the control register.
287 *
288 * Stolen from Linux's mii.c and phy_device.c
289 */
e2043f5c 290int genphy_parse_link(struct phy_device *phydev)
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291{
292 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
293
294 /* We're using autonegotiation */
1f9e672c 295 if (phydev->autoneg == AUTONEG_ENABLE) {
5f184715 296 u32 lpa = 0;
f6d1f6e4 297 int gblpa = 0;
de1d786e 298 u32 estatus = 0;
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299
300 /* Check for gigabit capability */
3a530d1b
DD
301 if (phydev->supported & (SUPPORTED_1000baseT_Full |
302 SUPPORTED_1000baseT_Half)) {
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303 /* We want a list of states supported by
304 * both PHYs in the link
305 */
306 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
f6d1f6e4
HS
307 if (gblpa < 0) {
308 debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
309 gblpa = 0;
310 }
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311 gblpa &= phy_read(phydev,
312 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
313 }
314
315 /* Set the baseline so we only have to set them
316 * if they're different
317 */
318 phydev->speed = SPEED_10;
319 phydev->duplex = DUPLEX_HALF;
320
321 /* Check the gigabit fields */
322 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
323 phydev->speed = SPEED_1000;
324
325 if (gblpa & PHY_1000BTSR_1000FD)
326 phydev->duplex = DUPLEX_FULL;
327
328 /* We're done! */
329 return 0;
330 }
331
332 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
333 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
334
0dcfb0fc 335 if (lpa & (LPA_100FULL | LPA_100HALF)) {
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336 phydev->speed = SPEED_100;
337
0dcfb0fc
WD
338 if (lpa & LPA_100FULL)
339 phydev->duplex = DUPLEX_FULL;
340
341 } else if (lpa & LPA_10FULL)
5f184715 342 phydev->duplex = DUPLEX_FULL;
de1d786e 343
9ba30f6b
SS
344 /*
345 * Extended status may indicate that the PHY supports
346 * 1000BASE-T/X even though the 1000BASE-T registers
347 * are missing. In this case we can't tell whether the
348 * peer also supports it, so we only check extended
349 * status if the 1000BASE-T registers are actually
350 * missing.
351 */
352 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
de1d786e
CC
353 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
354 MII_ESTATUS);
355
356 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
357 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
358 phydev->speed = SPEED_1000;
359 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
360 phydev->duplex = DUPLEX_FULL;
361 }
362
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363 } else {
364 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
365
366 phydev->speed = SPEED_10;
367 phydev->duplex = DUPLEX_HALF;
368
369 if (bmcr & BMCR_FULLDPLX)
370 phydev->duplex = DUPLEX_FULL;
371
372 if (bmcr & BMCR_SPEED1000)
373 phydev->speed = SPEED_1000;
374 else if (bmcr & BMCR_SPEED100)
375 phydev->speed = SPEED_100;
376 }
377
378 return 0;
379}
380
381int genphy_config(struct phy_device *phydev)
382{
383 int val;
384 u32 features;
385
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386 features = (SUPPORTED_TP | SUPPORTED_MII
387 | SUPPORTED_AUI | SUPPORTED_FIBRE |
388 SUPPORTED_BNC);
389
390 /* Do we support autonegotiation? */
391 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
392
393 if (val < 0)
394 return val;
395
396 if (val & BMSR_ANEGCAPABLE)
397 features |= SUPPORTED_Autoneg;
398
399 if (val & BMSR_100FULL)
400 features |= SUPPORTED_100baseT_Full;
401 if (val & BMSR_100HALF)
402 features |= SUPPORTED_100baseT_Half;
403 if (val & BMSR_10FULL)
404 features |= SUPPORTED_10baseT_Full;
405 if (val & BMSR_10HALF)
406 features |= SUPPORTED_10baseT_Half;
407
408 if (val & BMSR_ESTATEN) {
409 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
410
411 if (val < 0)
412 return val;
413
414 if (val & ESTATUS_1000_TFULL)
415 features |= SUPPORTED_1000baseT_Full;
416 if (val & ESTATUS_1000_THALF)
417 features |= SUPPORTED_1000baseT_Half;
de1d786e
CC
418 if (val & ESTATUS_1000_XFULL)
419 features |= SUPPORTED_1000baseX_Full;
420 if (val & ESTATUS_1000_XHALF)
9a5dad23 421 features |= SUPPORTED_1000baseX_Half;
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422 }
423
44bc3174
SH
424 phydev->supported &= features;
425 phydev->advertising &= features;
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426
427 genphy_config_aneg(phydev);
428
429 return 0;
430}
431
432int genphy_startup(struct phy_device *phydev)
433{
434 genphy_update_link(phydev);
435 genphy_parse_link(phydev);
436
437 return 0;
438}
439
440int genphy_shutdown(struct phy_device *phydev)
441{
442 return 0;
443}
444
445static struct phy_driver genphy_driver = {
446 .uid = 0xffffffff,
447 .mask = 0xffffffff,
448 .name = "Generic PHY",
44bc3174
SH
449 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
450 SUPPORTED_AUI | SUPPORTED_FIBRE |
451 SUPPORTED_BNC,
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452 .config = genphy_config,
453 .startup = genphy_startup,
454 .shutdown = genphy_shutdown,
455};
456
457static LIST_HEAD(phy_drivers);
458
459int phy_init(void)
460{
f7c38cf8
SX
461#ifdef CONFIG_PHY_AQUANTIA
462 phy_aquantia_init();
463#endif
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AF
464#ifdef CONFIG_PHY_ATHEROS
465 phy_atheros_init();
466#endif
467#ifdef CONFIG_PHY_BROADCOM
468 phy_broadcom_init();
469#endif
9b18e519
SL
470#ifdef CONFIG_PHY_CORTINA
471 phy_cortina_init();
472#endif
9082eeac
AF
473#ifdef CONFIG_PHY_DAVICOM
474 phy_davicom_init();
475#endif
f485c8a3
MP
476#ifdef CONFIG_PHY_ET1011C
477 phy_et1011c_init();
478#endif
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AF
479#ifdef CONFIG_PHY_LXT
480 phy_lxt_init();
481#endif
482#ifdef CONFIG_PHY_MARVELL
483 phy_marvell_init();
484#endif
485#ifdef CONFIG_PHY_MICREL
486 phy_micrel_init();
487#endif
488#ifdef CONFIG_PHY_NATSEMI
489 phy_natsemi_init();
490#endif
491#ifdef CONFIG_PHY_REALTEK
492 phy_realtek_init();
493#endif
5751aa2f
NI
494#ifdef CONFIG_PHY_SMSC
495 phy_smsc_init();
496#endif
9082eeac
AF
497#ifdef CONFIG_PHY_TERANETICS
498 phy_teranetics_init();
499#endif
721aed79
EI
500#ifdef CONFIG_PHY_TI
501 phy_ti_init();
502#endif
9082eeac
AF
503#ifdef CONFIG_PHY_VITESSE
504 phy_vitesse_init();
505#endif
ed6fad3e
SDPP
506#ifdef CONFIG_PHY_XILINX
507 phy_xilinx_init();
508#endif
9082eeac 509
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510 return 0;
511}
512
513int phy_register(struct phy_driver *drv)
514{
515 INIT_LIST_HEAD(&drv->list);
516 list_add_tail(&drv->list, &phy_drivers);
517
abbfcbe5
MS
518#ifdef CONFIG_NEEDS_MANUAL_RELOC
519 if (drv->probe)
520 drv->probe += gd->reloc_off;
521 if (drv->config)
522 drv->config += gd->reloc_off;
523 if (drv->startup)
524 drv->startup += gd->reloc_off;
525 if (drv->shutdown)
526 drv->shutdown += gd->reloc_off;
527 if (drv->readext)
528 drv->readext += gd->reloc_off;
529 if (drv->writeext)
530 drv->writeext += gd->reloc_off;
531#endif
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532 return 0;
533}
534
b18acb0a
AB
535int phy_set_supported(struct phy_device *phydev, u32 max_speed)
536{
537 /* The default values for phydev->supported are provided by the PHY
538 * driver "features" member, we want to reset to sane defaults first
539 * before supporting higher speeds.
540 */
541 phydev->supported &= PHY_DEFAULT_FEATURES;
542
543 switch (max_speed) {
544 default:
545 return -ENOTSUPP;
546 case SPEED_1000:
547 phydev->supported |= PHY_1000BT_FEATURES;
548 /* fall through */
549 case SPEED_100:
550 phydev->supported |= PHY_100BT_FEATURES;
551 /* fall through */
552 case SPEED_10:
553 phydev->supported |= PHY_10BT_FEATURES;
554 }
555
556 return 0;
557}
558
960d70c6 559static int phy_probe(struct phy_device *phydev)
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560{
561 int err = 0;
562
563 phydev->advertising = phydev->supported = phydev->drv->features;
564 phydev->mmds = phydev->drv->mmds;
565
566 if (phydev->drv->probe)
567 err = phydev->drv->probe(phydev);
568
569 return err;
570}
571
572static struct phy_driver *generic_for_interface(phy_interface_t interface)
573{
574#ifdef CONFIG_PHYLIB_10G
575 if (is_10g_interface(interface))
576 return &gen10g_driver;
577#endif
578
579 return &genphy_driver;
580}
581
960d70c6 582static struct phy_driver *get_phy_driver(struct phy_device *phydev,
5f184715
AF
583 phy_interface_t interface)
584{
585 struct list_head *entry;
586 int phy_id = phydev->phy_id;
587 struct phy_driver *drv = NULL;
588
589 list_for_each(entry, &phy_drivers) {
590 drv = list_entry(entry, struct phy_driver, list);
591 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
592 return drv;
593 }
594
595 /* If we made it here, there's no driver for this PHY */
596 return generic_for_interface(interface);
597}
598
960d70c6 599static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
2c171a2a 600 u32 phy_id,
960d70c6 601 phy_interface_t interface)
5f184715
AF
602{
603 struct phy_device *dev;
604
605 /* We allocate the device, and initialize the
606 * default values */
607 dev = malloc(sizeof(*dev));
608 if (!dev) {
609 printf("Failed to allocate PHY device for %s:%d\n",
610 bus->name, addr);
611 return NULL;
612 }
613
614 memset(dev, 0, sizeof(*dev));
615
616 dev->duplex = -1;
26d3acda 617 dev->link = 0;
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AF
618 dev->interface = interface;
619
620 dev->autoneg = AUTONEG_ENABLE;
621
622 dev->addr = addr;
623 dev->phy_id = phy_id;
624 dev->bus = bus;
625
626 dev->drv = get_phy_driver(dev, interface);
627
628 phy_probe(dev);
629
630 bus->phymap[addr] = dev;
631
632 return dev;
633}
634
635/**
636 * get_phy_id - reads the specified addr for its ID.
637 * @bus: the target MII bus
638 * @addr: PHY address on the MII bus
639 * @phy_id: where to store the ID retrieved.
640 *
641 * Description: Reads the ID registers of the PHY at @addr on the
642 * @bus, stores it in @phy_id and returns zero on success.
643 */
5707d5ff 644int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
5f184715
AF
645{
646 int phy_reg;
647
648 /* Grab the bits from PHYIR1, and put them
649 * in the upper half */
650 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
651
652 if (phy_reg < 0)
653 return -EIO;
654
655 *phy_id = (phy_reg & 0xffff) << 16;
656
657 /* Grab the bits from PHYIR2, and put them in the lower half */
658 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
659
660 if (phy_reg < 0)
661 return -EIO;
662
663 *phy_id |= (phy_reg & 0xffff);
664
665 return 0;
666}
667
1adb406b
TK
668static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
669 unsigned phy_mask, int devad, phy_interface_t interface)
670{
671 u32 phy_id = 0xffffffff;
672 while (phy_mask) {
673 int addr = ffs(phy_mask) - 1;
674 int r = get_phy_id(bus, addr, devad, &phy_id);
1adb406b 675 /* If the PHY ID is mostly f's, we didn't find anything */
08be2836 676 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
1adb406b
TK
677 return phy_device_create(bus, addr, phy_id, interface);
678 phy_mask &= ~(1 << addr);
679 }
680 return NULL;
681}
682
683static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
684 unsigned phy_mask, phy_interface_t interface)
685{
686 /* If we have one, return the existing device, with new interface */
687 while (phy_mask) {
688 int addr = ffs(phy_mask) - 1;
689 if (bus->phymap[addr]) {
690 bus->phymap[addr]->interface = interface;
691 return bus->phymap[addr];
692 }
693 phy_mask &= ~(1 << addr);
694 }
695 return NULL;
696}
697
698static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
699 unsigned phy_mask, phy_interface_t interface)
700{
701 int i;
702 struct phy_device *phydev;
703
704 phydev = search_for_existing_phy(bus, phy_mask, interface);
705 if (phydev)
706 return phydev;
707 /* Try Standard (ie Clause 22) access */
708 /* Otherwise we have to try Clause 45 */
709 for (i = 0; i < 5; i++) {
710 phydev = create_phy_by_mask(bus, phy_mask,
711 i ? i : MDIO_DEVAD_NONE, interface);
712 if (IS_ERR(phydev))
713 return NULL;
714 if (phydev)
715 return phydev;
716 }
3e1949d7
BM
717
718 debug("\n%s PHY: ", bus->name);
719 while (phy_mask) {
720 int addr = ffs(phy_mask) - 1;
721 debug("%d ", addr);
722 phy_mask &= ~(1 << addr);
723 }
724 debug("not found\n");
0132b9ab
BM
725
726 return NULL;
1adb406b
TK
727}
728
5f184715
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729/**
730 * get_phy_device - reads the specified PHY device and returns its @phy_device struct
731 * @bus: the target MII bus
732 * @addr: PHY address on the MII bus
733 *
734 * Description: Reads the ID registers of the PHY at @addr on the
735 * @bus, then allocates and returns the phy_device to represent it.
736 */
960d70c6
KP
737static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
738 phy_interface_t interface)
5f184715 739{
1adb406b 740 return get_phy_device_by_mask(bus, 1 << addr, interface);
5f184715
AF
741}
742
743int phy_reset(struct phy_device *phydev)
744{
745 int reg;
746 int timeout = 500;
747 int devad = MDIO_DEVAD_NONE;
748
ddcd1f30
SX
749 if (phydev->flags & PHY_FLAG_BROKEN_RESET)
750 return 0;
751
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752#ifdef CONFIG_PHYLIB_10G
753 /* If it's 10G, we need to issue reset through one of the MMDs */
754 if (is_10g_interface(phydev->interface)) {
755 if (!phydev->mmds)
756 gen10g_discover_mmds(phydev);
757
758 devad = ffs(phydev->mmds) - 1;
759 }
760#endif
761
a058052c 762 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
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763 debug("PHY reset failed\n");
764 return -1;
765 }
766
767#ifdef CONFIG_PHY_RESET_DELAY
768 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
769#endif
770 /*
771 * Poll the control register for the reset bit to go to 0 (it is
772 * auto-clearing). This should happen within 0.5 seconds per the
773 * IEEE spec.
774 */
a058052c 775 reg = phy_read(phydev, devad, MII_BMCR);
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776 while ((reg & BMCR_RESET) && timeout--) {
777 reg = phy_read(phydev, devad, MII_BMCR);
778
779 if (reg < 0) {
780 debug("PHY status read failed\n");
781 return -1;
782 }
783 udelay(1000);
784 }
785
786 if (reg & BMCR_RESET) {
787 puts("PHY reset timed out\n");
788 return -1;
789 }
790
791 return 0;
792}
793
794int miiphy_reset(const char *devname, unsigned char addr)
795{
796 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
797 struct phy_device *phydev;
798
799 /*
800 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
801 * If later code tries to connect with the right interface, this will
802 * be corrected by get_phy_device in phy_connect()
803 */
804 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
805
806 return phy_reset(phydev);
807}
808
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809struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
810 phy_interface_t interface)
5f184715 811{
5f184715 812 /* Reset the bus */
59370f3f 813 if (bus->reset) {
e3a77218 814 bus->reset(bus);
5f184715 815
59370f3f
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816 /* Wait 15ms to make sure the PHY has come out of hard reset */
817 udelay(15000);
818 }
819
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820 return get_phy_device_by_mask(bus, phy_mask, interface);
821}
5f184715 822
c74c8e66
SG
823#ifdef CONFIG_DM_ETH
824void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
825#else
1adb406b 826void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
c74c8e66 827#endif
1adb406b 828{
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829 /* Soft Reset the PHY */
830 phy_reset(phydev);
17ecfa9b 831 if (phydev->dev && phydev->dev != dev) {
5f184715 832 printf("%s:%d is connected to %s. Reconnecting to %s\n",
1adb406b
TK
833 phydev->bus->name, phydev->addr,
834 phydev->dev->name, dev->name);
835 }
5f184715 836 phydev->dev = dev;
b91a9d9d 837 debug("%s connected to %s\n", dev->name, phydev->drv->name);
1adb406b
TK
838}
839
c74c8e66
SG
840#ifdef CONFIG_DM_ETH
841struct phy_device *phy_connect(struct mii_dev *bus, int addr,
842 struct udevice *dev, phy_interface_t interface)
843#else
1adb406b
TK
844struct phy_device *phy_connect(struct mii_dev *bus, int addr,
845 struct eth_device *dev, phy_interface_t interface)
c74c8e66 846#endif
1adb406b
TK
847{
848 struct phy_device *phydev;
5f184715 849
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850 phydev = phy_find_by_mask(bus, 1 << addr, interface);
851 if (phydev)
852 phy_connect_dev(phydev, dev);
853 else
854 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
5f184715
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855 return phydev;
856}
857
6e5b9ac0
TT
858/*
859 * Start the PHY. Returns 0 on success, or a negative error code.
860 */
5f184715
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861int phy_startup(struct phy_device *phydev)
862{
863 if (phydev->drv->startup)
6e5b9ac0 864 return phydev->drv->startup(phydev);
5f184715
AF
865
866 return 0;
867}
868
3c6928fd 869__weak int board_phy_config(struct phy_device *phydev)
5f184715 870{
9fafe7da
TK
871 if (phydev->drv->config)
872 return phydev->drv->config(phydev);
5f184715
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873 return 0;
874}
875
5f184715
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876int phy_config(struct phy_device *phydev)
877{
5f184715
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878 /* Invoke an optional board-specific helper */
879 board_phy_config(phydev);
880
881 return 0;
882}
883
884int phy_shutdown(struct phy_device *phydev)
885{
886 if (phydev->drv->shutdown)
887 phydev->drv->shutdown(phydev);
888
889 return 0;
890}
c74c8e66
SG
891
892int phy_get_interface_by_name(const char *str)
893{
894 int i;
895
896 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
897 if (!strcmp(str, phy_interface_strings[i]))
898 return i;
899 }
900
901 return -1;
902}
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