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5f184715 AF |
1 | /* |
2 | * Generic PHY Management code | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
5f184715 AF |
5 | * |
6 | * Copyright 2011 Freescale Semiconductor, Inc. | |
7 | * author Andy Fleming | |
8 | * | |
9 | * Based loosely off of Linux's PHY Lib | |
10 | */ | |
11 | ||
12 | #include <config.h> | |
13 | #include <common.h> | |
c74c8e66 | 14 | #include <dm.h> |
5f184715 AF |
15 | #include <malloc.h> |
16 | #include <net.h> | |
17 | #include <command.h> | |
18 | #include <miiphy.h> | |
19 | #include <phy.h> | |
20 | #include <errno.h> | |
1adb406b | 21 | #include <linux/err.h> |
597fe041 | 22 | #include <linux/compiler.h> |
5f184715 AF |
23 | |
24 | /* Generic PHY support and helper functions */ | |
25 | ||
26 | /** | |
27 | * genphy_config_advert - sanitize and advertise auto-negotation parameters | |
28 | * @phydev: target phy_device struct | |
29 | * | |
30 | * Description: Writes MII_ADVERTISE with the appropriate values, | |
31 | * after sanitizing the values to make sure we only advertise | |
32 | * what is supported. Returns < 0 on error, 0 if the PHY's advertisement | |
33 | * hasn't changed, and > 0 if it has changed. | |
34 | */ | |
960d70c6 | 35 | static int genphy_config_advert(struct phy_device *phydev) |
5f184715 AF |
36 | { |
37 | u32 advertise; | |
38 | int oldadv, adv; | |
39 | int err, changed = 0; | |
40 | ||
41 | /* Only allow advertising what | |
42 | * this PHY supports */ | |
43 | phydev->advertising &= phydev->supported; | |
44 | advertise = phydev->advertising; | |
45 | ||
46 | /* Setup standard advertisement */ | |
47 | oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); | |
48 | ||
49 | if (adv < 0) | |
50 | return adv; | |
51 | ||
52 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | | |
53 | ADVERTISE_PAUSE_ASYM); | |
54 | if (advertise & ADVERTISED_10baseT_Half) | |
55 | adv |= ADVERTISE_10HALF; | |
56 | if (advertise & ADVERTISED_10baseT_Full) | |
57 | adv |= ADVERTISE_10FULL; | |
58 | if (advertise & ADVERTISED_100baseT_Half) | |
59 | adv |= ADVERTISE_100HALF; | |
60 | if (advertise & ADVERTISED_100baseT_Full) | |
61 | adv |= ADVERTISE_100FULL; | |
62 | if (advertise & ADVERTISED_Pause) | |
63 | adv |= ADVERTISE_PAUSE_CAP; | |
64 | if (advertise & ADVERTISED_Asym_Pause) | |
65 | adv |= ADVERTISE_PAUSE_ASYM; | |
de1d786e CC |
66 | if (advertise & ADVERTISED_1000baseX_Half) |
67 | adv |= ADVERTISE_1000XHALF; | |
68 | if (advertise & ADVERTISED_1000baseX_Full) | |
69 | adv |= ADVERTISE_1000XFULL; | |
5f184715 AF |
70 | |
71 | if (adv != oldadv) { | |
72 | err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv); | |
73 | ||
74 | if (err < 0) | |
75 | return err; | |
76 | changed = 1; | |
77 | } | |
78 | ||
79 | /* Configure gigabit if it's supported */ | |
80 | if (phydev->supported & (SUPPORTED_1000baseT_Half | | |
81 | SUPPORTED_1000baseT_Full)) { | |
82 | oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); | |
83 | ||
84 | if (adv < 0) | |
85 | return adv; | |
86 | ||
87 | adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
88 | if (advertise & SUPPORTED_1000baseT_Half) | |
89 | adv |= ADVERTISE_1000HALF; | |
90 | if (advertise & SUPPORTED_1000baseT_Full) | |
91 | adv |= ADVERTISE_1000FULL; | |
92 | ||
93 | if (adv != oldadv) { | |
94 | err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, | |
95 | adv); | |
96 | ||
97 | if (err < 0) | |
98 | return err; | |
99 | changed = 1; | |
100 | } | |
101 | } | |
102 | ||
103 | return changed; | |
104 | } | |
105 | ||
106 | ||
107 | /** | |
108 | * genphy_setup_forced - configures/forces speed/duplex from @phydev | |
109 | * @phydev: target phy_device struct | |
110 | * | |
111 | * Description: Configures MII_BMCR to force speed/duplex | |
112 | * to the values in phydev. Assumes that the values are valid. | |
113 | */ | |
960d70c6 | 114 | static int genphy_setup_forced(struct phy_device *phydev) |
5f184715 AF |
115 | { |
116 | int err; | |
117 | int ctl = 0; | |
118 | ||
119 | phydev->pause = phydev->asym_pause = 0; | |
120 | ||
121 | if (SPEED_1000 == phydev->speed) | |
122 | ctl |= BMCR_SPEED1000; | |
123 | else if (SPEED_100 == phydev->speed) | |
124 | ctl |= BMCR_SPEED100; | |
125 | ||
126 | if (DUPLEX_FULL == phydev->duplex) | |
127 | ctl |= BMCR_FULLDPLX; | |
128 | ||
129 | err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); | |
130 | ||
131 | return err; | |
132 | } | |
133 | ||
134 | ||
135 | /** | |
136 | * genphy_restart_aneg - Enable and Restart Autonegotiation | |
137 | * @phydev: target phy_device struct | |
138 | */ | |
139 | int genphy_restart_aneg(struct phy_device *phydev) | |
140 | { | |
141 | int ctl; | |
142 | ||
143 | ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); | |
144 | ||
145 | if (ctl < 0) | |
146 | return ctl; | |
147 | ||
148 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
149 | ||
150 | /* Don't isolate the PHY if we're negotiating */ | |
151 | ctl &= ~(BMCR_ISOLATE); | |
152 | ||
153 | ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); | |
154 | ||
155 | return ctl; | |
156 | } | |
157 | ||
158 | ||
159 | /** | |
160 | * genphy_config_aneg - restart auto-negotiation or write BMCR | |
161 | * @phydev: target phy_device struct | |
162 | * | |
163 | * Description: If auto-negotiation is enabled, we configure the | |
164 | * advertising, and then restart auto-negotiation. If it is not | |
165 | * enabled, then we write the BMCR. | |
166 | */ | |
167 | int genphy_config_aneg(struct phy_device *phydev) | |
168 | { | |
169 | int result; | |
170 | ||
171 | if (AUTONEG_ENABLE != phydev->autoneg) | |
172 | return genphy_setup_forced(phydev); | |
173 | ||
174 | result = genphy_config_advert(phydev); | |
175 | ||
176 | if (result < 0) /* error */ | |
177 | return result; | |
178 | ||
179 | if (result == 0) { | |
180 | /* Advertisment hasn't changed, but maybe aneg was never on to | |
181 | * begin with? Or maybe phy was isolated? */ | |
182 | int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); | |
183 | ||
184 | if (ctl < 0) | |
185 | return ctl; | |
186 | ||
187 | if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) | |
188 | result = 1; /* do restart aneg */ | |
189 | } | |
190 | ||
191 | /* Only restart aneg if we are advertising something different | |
192 | * than we were before. */ | |
193 | if (result > 0) | |
194 | result = genphy_restart_aneg(phydev); | |
195 | ||
196 | return result; | |
197 | } | |
198 | ||
199 | /** | |
200 | * genphy_update_link - update link status in @phydev | |
201 | * @phydev: target phy_device struct | |
202 | * | |
203 | * Description: Update the value in phydev->link to reflect the | |
204 | * current link value. In order to do this, we need to read | |
205 | * the status register twice, keeping the second value. | |
206 | */ | |
207 | int genphy_update_link(struct phy_device *phydev) | |
208 | { | |
209 | unsigned int mii_reg; | |
210 | ||
211 | /* | |
212 | * Wait if the link is up, and autonegotiation is in progress | |
213 | * (ie - we're capable and it's not done) | |
214 | */ | |
215 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
216 | ||
217 | /* | |
218 | * If we already saw the link up, and it hasn't gone down, then | |
219 | * we don't need to wait for autoneg again | |
220 | */ | |
221 | if (phydev->link && mii_reg & BMSR_LSTATUS) | |
222 | return 0; | |
223 | ||
224 | if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) { | |
225 | int i = 0; | |
226 | ||
227 | printf("%s Waiting for PHY auto negotiation to complete", | |
228 | phydev->dev->name); | |
229 | while (!(mii_reg & BMSR_ANEGCOMPLETE)) { | |
230 | /* | |
231 | * Timeout reached ? | |
232 | */ | |
233 | if (i > PHY_ANEG_TIMEOUT) { | |
234 | printf(" TIMEOUT !\n"); | |
235 | phydev->link = 0; | |
236 | return 0; | |
237 | } | |
238 | ||
239 | if (ctrlc()) { | |
240 | puts("user interrupt!\n"); | |
241 | phydev->link = 0; | |
242 | return -EINTR; | |
243 | } | |
244 | ||
245 | if ((i++ % 500) == 0) | |
246 | printf("."); | |
247 | ||
248 | udelay(1000); /* 1 ms */ | |
249 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
250 | } | |
251 | printf(" done\n"); | |
252 | phydev->link = 1; | |
253 | } else { | |
254 | /* Read the link a second time to clear the latched state */ | |
255 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
256 | ||
257 | if (mii_reg & BMSR_LSTATUS) | |
258 | phydev->link = 1; | |
259 | else | |
260 | phydev->link = 0; | |
261 | } | |
262 | ||
263 | return 0; | |
264 | } | |
265 | ||
266 | /* | |
267 | * Generic function which updates the speed and duplex. If | |
268 | * autonegotiation is enabled, it uses the AND of the link | |
269 | * partner's advertised capabilities and our advertised | |
270 | * capabilities. If autonegotiation is disabled, we use the | |
271 | * appropriate bits in the control register. | |
272 | * | |
273 | * Stolen from Linux's mii.c and phy_device.c | |
274 | */ | |
e2043f5c | 275 | int genphy_parse_link(struct phy_device *phydev) |
5f184715 AF |
276 | { |
277 | int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
278 | ||
279 | /* We're using autonegotiation */ | |
3a530d1b | 280 | if (phydev->supported & SUPPORTED_Autoneg) { |
5f184715 | 281 | u32 lpa = 0; |
f6d1f6e4 | 282 | int gblpa = 0; |
de1d786e | 283 | u32 estatus = 0; |
5f184715 AF |
284 | |
285 | /* Check for gigabit capability */ | |
3a530d1b DD |
286 | if (phydev->supported & (SUPPORTED_1000baseT_Full | |
287 | SUPPORTED_1000baseT_Half)) { | |
5f184715 AF |
288 | /* We want a list of states supported by |
289 | * both PHYs in the link | |
290 | */ | |
291 | gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); | |
f6d1f6e4 HS |
292 | if (gblpa < 0) { |
293 | debug("Could not read MII_STAT1000. Ignoring gigabit capability\n"); | |
294 | gblpa = 0; | |
295 | } | |
5f184715 AF |
296 | gblpa &= phy_read(phydev, |
297 | MDIO_DEVAD_NONE, MII_CTRL1000) << 2; | |
298 | } | |
299 | ||
300 | /* Set the baseline so we only have to set them | |
301 | * if they're different | |
302 | */ | |
303 | phydev->speed = SPEED_10; | |
304 | phydev->duplex = DUPLEX_HALF; | |
305 | ||
306 | /* Check the gigabit fields */ | |
307 | if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { | |
308 | phydev->speed = SPEED_1000; | |
309 | ||
310 | if (gblpa & PHY_1000BTSR_1000FD) | |
311 | phydev->duplex = DUPLEX_FULL; | |
312 | ||
313 | /* We're done! */ | |
314 | return 0; | |
315 | } | |
316 | ||
317 | lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); | |
318 | lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); | |
319 | ||
0dcfb0fc | 320 | if (lpa & (LPA_100FULL | LPA_100HALF)) { |
5f184715 AF |
321 | phydev->speed = SPEED_100; |
322 | ||
0dcfb0fc WD |
323 | if (lpa & LPA_100FULL) |
324 | phydev->duplex = DUPLEX_FULL; | |
325 | ||
326 | } else if (lpa & LPA_10FULL) | |
5f184715 | 327 | phydev->duplex = DUPLEX_FULL; |
de1d786e | 328 | |
9ba30f6b SS |
329 | /* |
330 | * Extended status may indicate that the PHY supports | |
331 | * 1000BASE-T/X even though the 1000BASE-T registers | |
332 | * are missing. In this case we can't tell whether the | |
333 | * peer also supports it, so we only check extended | |
334 | * status if the 1000BASE-T registers are actually | |
335 | * missing. | |
336 | */ | |
337 | if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) | |
de1d786e CC |
338 | estatus = phy_read(phydev, MDIO_DEVAD_NONE, |
339 | MII_ESTATUS); | |
340 | ||
341 | if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF | | |
342 | ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) { | |
343 | phydev->speed = SPEED_1000; | |
344 | if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL)) | |
345 | phydev->duplex = DUPLEX_FULL; | |
346 | } | |
347 | ||
5f184715 AF |
348 | } else { |
349 | u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); | |
350 | ||
351 | phydev->speed = SPEED_10; | |
352 | phydev->duplex = DUPLEX_HALF; | |
353 | ||
354 | if (bmcr & BMCR_FULLDPLX) | |
355 | phydev->duplex = DUPLEX_FULL; | |
356 | ||
357 | if (bmcr & BMCR_SPEED1000) | |
358 | phydev->speed = SPEED_1000; | |
359 | else if (bmcr & BMCR_SPEED100) | |
360 | phydev->speed = SPEED_100; | |
361 | } | |
362 | ||
363 | return 0; | |
364 | } | |
365 | ||
366 | int genphy_config(struct phy_device *phydev) | |
367 | { | |
368 | int val; | |
369 | u32 features; | |
370 | ||
371 | /* For now, I'll claim that the generic driver supports | |
372 | * all possible port types */ | |
373 | features = (SUPPORTED_TP | SUPPORTED_MII | |
374 | | SUPPORTED_AUI | SUPPORTED_FIBRE | | |
375 | SUPPORTED_BNC); | |
376 | ||
377 | /* Do we support autonegotiation? */ | |
378 | val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); | |
379 | ||
380 | if (val < 0) | |
381 | return val; | |
382 | ||
383 | if (val & BMSR_ANEGCAPABLE) | |
384 | features |= SUPPORTED_Autoneg; | |
385 | ||
386 | if (val & BMSR_100FULL) | |
387 | features |= SUPPORTED_100baseT_Full; | |
388 | if (val & BMSR_100HALF) | |
389 | features |= SUPPORTED_100baseT_Half; | |
390 | if (val & BMSR_10FULL) | |
391 | features |= SUPPORTED_10baseT_Full; | |
392 | if (val & BMSR_10HALF) | |
393 | features |= SUPPORTED_10baseT_Half; | |
394 | ||
395 | if (val & BMSR_ESTATEN) { | |
396 | val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS); | |
397 | ||
398 | if (val < 0) | |
399 | return val; | |
400 | ||
401 | if (val & ESTATUS_1000_TFULL) | |
402 | features |= SUPPORTED_1000baseT_Full; | |
403 | if (val & ESTATUS_1000_THALF) | |
404 | features |= SUPPORTED_1000baseT_Half; | |
de1d786e CC |
405 | if (val & ESTATUS_1000_XFULL) |
406 | features |= SUPPORTED_1000baseX_Full; | |
407 | if (val & ESTATUS_1000_XHALF) | |
9a5dad23 | 408 | features |= SUPPORTED_1000baseX_Half; |
5f184715 AF |
409 | } |
410 | ||
411 | phydev->supported = features; | |
412 | phydev->advertising = features; | |
413 | ||
414 | genphy_config_aneg(phydev); | |
415 | ||
416 | return 0; | |
417 | } | |
418 | ||
419 | int genphy_startup(struct phy_device *phydev) | |
420 | { | |
421 | genphy_update_link(phydev); | |
422 | genphy_parse_link(phydev); | |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
427 | int genphy_shutdown(struct phy_device *phydev) | |
428 | { | |
429 | return 0; | |
430 | } | |
431 | ||
432 | static struct phy_driver genphy_driver = { | |
433 | .uid = 0xffffffff, | |
434 | .mask = 0xffffffff, | |
435 | .name = "Generic PHY", | |
436 | .features = 0, | |
437 | .config = genphy_config, | |
438 | .startup = genphy_startup, | |
439 | .shutdown = genphy_shutdown, | |
440 | }; | |
441 | ||
442 | static LIST_HEAD(phy_drivers); | |
443 | ||
444 | int phy_init(void) | |
445 | { | |
f7c38cf8 SX |
446 | #ifdef CONFIG_PHY_AQUANTIA |
447 | phy_aquantia_init(); | |
448 | #endif | |
9082eeac AF |
449 | #ifdef CONFIG_PHY_ATHEROS |
450 | phy_atheros_init(); | |
451 | #endif | |
452 | #ifdef CONFIG_PHY_BROADCOM | |
453 | phy_broadcom_init(); | |
454 | #endif | |
9b18e519 SL |
455 | #ifdef CONFIG_PHY_CORTINA |
456 | phy_cortina_init(); | |
457 | #endif | |
9082eeac AF |
458 | #ifdef CONFIG_PHY_DAVICOM |
459 | phy_davicom_init(); | |
460 | #endif | |
f485c8a3 MP |
461 | #ifdef CONFIG_PHY_ET1011C |
462 | phy_et1011c_init(); | |
463 | #endif | |
9082eeac AF |
464 | #ifdef CONFIG_PHY_LXT |
465 | phy_lxt_init(); | |
466 | #endif | |
467 | #ifdef CONFIG_PHY_MARVELL | |
468 | phy_marvell_init(); | |
469 | #endif | |
470 | #ifdef CONFIG_PHY_MICREL | |
471 | phy_micrel_init(); | |
472 | #endif | |
473 | #ifdef CONFIG_PHY_NATSEMI | |
474 | phy_natsemi_init(); | |
475 | #endif | |
476 | #ifdef CONFIG_PHY_REALTEK | |
477 | phy_realtek_init(); | |
478 | #endif | |
5751aa2f NI |
479 | #ifdef CONFIG_PHY_SMSC |
480 | phy_smsc_init(); | |
481 | #endif | |
9082eeac AF |
482 | #ifdef CONFIG_PHY_TERANETICS |
483 | phy_teranetics_init(); | |
484 | #endif | |
485 | #ifdef CONFIG_PHY_VITESSE | |
486 | phy_vitesse_init(); | |
487 | #endif | |
488 | ||
5f184715 AF |
489 | return 0; |
490 | } | |
491 | ||
492 | int phy_register(struct phy_driver *drv) | |
493 | { | |
494 | INIT_LIST_HEAD(&drv->list); | |
495 | list_add_tail(&drv->list, &phy_drivers); | |
496 | ||
497 | return 0; | |
498 | } | |
499 | ||
960d70c6 | 500 | static int phy_probe(struct phy_device *phydev) |
5f184715 AF |
501 | { |
502 | int err = 0; | |
503 | ||
504 | phydev->advertising = phydev->supported = phydev->drv->features; | |
505 | phydev->mmds = phydev->drv->mmds; | |
506 | ||
507 | if (phydev->drv->probe) | |
508 | err = phydev->drv->probe(phydev); | |
509 | ||
510 | return err; | |
511 | } | |
512 | ||
513 | static struct phy_driver *generic_for_interface(phy_interface_t interface) | |
514 | { | |
515 | #ifdef CONFIG_PHYLIB_10G | |
516 | if (is_10g_interface(interface)) | |
517 | return &gen10g_driver; | |
518 | #endif | |
519 | ||
520 | return &genphy_driver; | |
521 | } | |
522 | ||
960d70c6 | 523 | static struct phy_driver *get_phy_driver(struct phy_device *phydev, |
5f184715 AF |
524 | phy_interface_t interface) |
525 | { | |
526 | struct list_head *entry; | |
527 | int phy_id = phydev->phy_id; | |
528 | struct phy_driver *drv = NULL; | |
529 | ||
530 | list_for_each(entry, &phy_drivers) { | |
531 | drv = list_entry(entry, struct phy_driver, list); | |
532 | if ((drv->uid & drv->mask) == (phy_id & drv->mask)) | |
533 | return drv; | |
534 | } | |
535 | ||
536 | /* If we made it here, there's no driver for this PHY */ | |
537 | return generic_for_interface(interface); | |
538 | } | |
539 | ||
960d70c6 KP |
540 | static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, |
541 | int phy_id, | |
542 | phy_interface_t interface) | |
5f184715 AF |
543 | { |
544 | struct phy_device *dev; | |
545 | ||
546 | /* We allocate the device, and initialize the | |
547 | * default values */ | |
548 | dev = malloc(sizeof(*dev)); | |
549 | if (!dev) { | |
550 | printf("Failed to allocate PHY device for %s:%d\n", | |
551 | bus->name, addr); | |
552 | return NULL; | |
553 | } | |
554 | ||
555 | memset(dev, 0, sizeof(*dev)); | |
556 | ||
557 | dev->duplex = -1; | |
558 | dev->link = 1; | |
559 | dev->interface = interface; | |
560 | ||
561 | dev->autoneg = AUTONEG_ENABLE; | |
562 | ||
563 | dev->addr = addr; | |
564 | dev->phy_id = phy_id; | |
565 | dev->bus = bus; | |
566 | ||
567 | dev->drv = get_phy_driver(dev, interface); | |
568 | ||
569 | phy_probe(dev); | |
570 | ||
571 | bus->phymap[addr] = dev; | |
572 | ||
573 | return dev; | |
574 | } | |
575 | ||
576 | /** | |
577 | * get_phy_id - reads the specified addr for its ID. | |
578 | * @bus: the target MII bus | |
579 | * @addr: PHY address on the MII bus | |
580 | * @phy_id: where to store the ID retrieved. | |
581 | * | |
582 | * Description: Reads the ID registers of the PHY at @addr on the | |
583 | * @bus, stores it in @phy_id and returns zero on success. | |
584 | */ | |
5707d5ff | 585 | int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) |
5f184715 AF |
586 | { |
587 | int phy_reg; | |
588 | ||
589 | /* Grab the bits from PHYIR1, and put them | |
590 | * in the upper half */ | |
591 | phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); | |
592 | ||
593 | if (phy_reg < 0) | |
594 | return -EIO; | |
595 | ||
596 | *phy_id = (phy_reg & 0xffff) << 16; | |
597 | ||
598 | /* Grab the bits from PHYIR2, and put them in the lower half */ | |
599 | phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); | |
600 | ||
601 | if (phy_reg < 0) | |
602 | return -EIO; | |
603 | ||
604 | *phy_id |= (phy_reg & 0xffff); | |
605 | ||
606 | return 0; | |
607 | } | |
608 | ||
1adb406b TK |
609 | static struct phy_device *create_phy_by_mask(struct mii_dev *bus, |
610 | unsigned phy_mask, int devad, phy_interface_t interface) | |
611 | { | |
612 | u32 phy_id = 0xffffffff; | |
613 | while (phy_mask) { | |
614 | int addr = ffs(phy_mask) - 1; | |
615 | int r = get_phy_id(bus, addr, devad, &phy_id); | |
1adb406b | 616 | /* If the PHY ID is mostly f's, we didn't find anything */ |
08be2836 | 617 | if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) |
1adb406b TK |
618 | return phy_device_create(bus, addr, phy_id, interface); |
619 | phy_mask &= ~(1 << addr); | |
620 | } | |
621 | return NULL; | |
622 | } | |
623 | ||
624 | static struct phy_device *search_for_existing_phy(struct mii_dev *bus, | |
625 | unsigned phy_mask, phy_interface_t interface) | |
626 | { | |
627 | /* If we have one, return the existing device, with new interface */ | |
628 | while (phy_mask) { | |
629 | int addr = ffs(phy_mask) - 1; | |
630 | if (bus->phymap[addr]) { | |
631 | bus->phymap[addr]->interface = interface; | |
632 | return bus->phymap[addr]; | |
633 | } | |
634 | phy_mask &= ~(1 << addr); | |
635 | } | |
636 | return NULL; | |
637 | } | |
638 | ||
639 | static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, | |
640 | unsigned phy_mask, phy_interface_t interface) | |
641 | { | |
642 | int i; | |
643 | struct phy_device *phydev; | |
644 | ||
645 | phydev = search_for_existing_phy(bus, phy_mask, interface); | |
646 | if (phydev) | |
647 | return phydev; | |
648 | /* Try Standard (ie Clause 22) access */ | |
649 | /* Otherwise we have to try Clause 45 */ | |
650 | for (i = 0; i < 5; i++) { | |
651 | phydev = create_phy_by_mask(bus, phy_mask, | |
652 | i ? i : MDIO_DEVAD_NONE, interface); | |
653 | if (IS_ERR(phydev)) | |
654 | return NULL; | |
655 | if (phydev) | |
656 | return phydev; | |
657 | } | |
adc9a79f | 658 | printf("Phy %d not found\n", ffs(phy_mask) - 1); |
1adb406b TK |
659 | return phy_device_create(bus, ffs(phy_mask) - 1, 0xffffffff, interface); |
660 | } | |
661 | ||
5f184715 AF |
662 | /** |
663 | * get_phy_device - reads the specified PHY device and returns its @phy_device struct | |
664 | * @bus: the target MII bus | |
665 | * @addr: PHY address on the MII bus | |
666 | * | |
667 | * Description: Reads the ID registers of the PHY at @addr on the | |
668 | * @bus, then allocates and returns the phy_device to represent it. | |
669 | */ | |
960d70c6 KP |
670 | static struct phy_device *get_phy_device(struct mii_dev *bus, int addr, |
671 | phy_interface_t interface) | |
5f184715 | 672 | { |
1adb406b | 673 | return get_phy_device_by_mask(bus, 1 << addr, interface); |
5f184715 AF |
674 | } |
675 | ||
676 | int phy_reset(struct phy_device *phydev) | |
677 | { | |
678 | int reg; | |
679 | int timeout = 500; | |
680 | int devad = MDIO_DEVAD_NONE; | |
681 | ||
682 | #ifdef CONFIG_PHYLIB_10G | |
683 | /* If it's 10G, we need to issue reset through one of the MMDs */ | |
684 | if (is_10g_interface(phydev->interface)) { | |
685 | if (!phydev->mmds) | |
686 | gen10g_discover_mmds(phydev); | |
687 | ||
688 | devad = ffs(phydev->mmds) - 1; | |
689 | } | |
690 | #endif | |
691 | ||
692 | reg = phy_read(phydev, devad, MII_BMCR); | |
693 | if (reg < 0) { | |
694 | debug("PHY status read failed\n"); | |
695 | return -1; | |
696 | } | |
697 | ||
698 | reg |= BMCR_RESET; | |
699 | ||
700 | if (phy_write(phydev, devad, MII_BMCR, reg) < 0) { | |
701 | debug("PHY reset failed\n"); | |
702 | return -1; | |
703 | } | |
704 | ||
705 | #ifdef CONFIG_PHY_RESET_DELAY | |
706 | udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ | |
707 | #endif | |
708 | /* | |
709 | * Poll the control register for the reset bit to go to 0 (it is | |
710 | * auto-clearing). This should happen within 0.5 seconds per the | |
711 | * IEEE spec. | |
712 | */ | |
713 | while ((reg & BMCR_RESET) && timeout--) { | |
714 | reg = phy_read(phydev, devad, MII_BMCR); | |
715 | ||
716 | if (reg < 0) { | |
717 | debug("PHY status read failed\n"); | |
718 | return -1; | |
719 | } | |
720 | udelay(1000); | |
721 | } | |
722 | ||
723 | if (reg & BMCR_RESET) { | |
724 | puts("PHY reset timed out\n"); | |
725 | return -1; | |
726 | } | |
727 | ||
728 | return 0; | |
729 | } | |
730 | ||
731 | int miiphy_reset(const char *devname, unsigned char addr) | |
732 | { | |
733 | struct mii_dev *bus = miiphy_get_dev_by_name(devname); | |
734 | struct phy_device *phydev; | |
735 | ||
736 | /* | |
737 | * miiphy_reset was only used on standard PHYs, so we'll fake it here. | |
738 | * If later code tries to connect with the right interface, this will | |
739 | * be corrected by get_phy_device in phy_connect() | |
740 | */ | |
741 | phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII); | |
742 | ||
743 | return phy_reset(phydev); | |
744 | } | |
745 | ||
1adb406b TK |
746 | struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, |
747 | phy_interface_t interface) | |
5f184715 | 748 | { |
5f184715 | 749 | /* Reset the bus */ |
e3a77218 VZ |
750 | if (bus->reset) |
751 | bus->reset(bus); | |
5f184715 AF |
752 | |
753 | /* Wait 15ms to make sure the PHY has come out of hard reset */ | |
754 | udelay(15000); | |
1adb406b TK |
755 | return get_phy_device_by_mask(bus, phy_mask, interface); |
756 | } | |
5f184715 | 757 | |
c74c8e66 SG |
758 | #ifdef CONFIG_DM_ETH |
759 | void phy_connect_dev(struct phy_device *phydev, struct udevice *dev) | |
760 | #else | |
1adb406b | 761 | void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) |
c74c8e66 | 762 | #endif |
1adb406b | 763 | { |
5f184715 AF |
764 | /* Soft Reset the PHY */ |
765 | phy_reset(phydev); | |
1adb406b | 766 | if (phydev->dev) { |
5f184715 | 767 | printf("%s:%d is connected to %s. Reconnecting to %s\n", |
1adb406b TK |
768 | phydev->bus->name, phydev->addr, |
769 | phydev->dev->name, dev->name); | |
770 | } | |
5f184715 | 771 | phydev->dev = dev; |
b91a9d9d | 772 | debug("%s connected to %s\n", dev->name, phydev->drv->name); |
1adb406b TK |
773 | } |
774 | ||
c74c8e66 SG |
775 | #ifdef CONFIG_DM_ETH |
776 | struct phy_device *phy_connect(struct mii_dev *bus, int addr, | |
777 | struct udevice *dev, phy_interface_t interface) | |
778 | #else | |
1adb406b TK |
779 | struct phy_device *phy_connect(struct mii_dev *bus, int addr, |
780 | struct eth_device *dev, phy_interface_t interface) | |
c74c8e66 | 781 | #endif |
1adb406b TK |
782 | { |
783 | struct phy_device *phydev; | |
5f184715 | 784 | |
1adb406b TK |
785 | phydev = phy_find_by_mask(bus, 1 << addr, interface); |
786 | if (phydev) | |
787 | phy_connect_dev(phydev, dev); | |
788 | else | |
789 | printf("Could not get PHY for %s: addr %d\n", bus->name, addr); | |
5f184715 AF |
790 | return phydev; |
791 | } | |
792 | ||
6e5b9ac0 TT |
793 | /* |
794 | * Start the PHY. Returns 0 on success, or a negative error code. | |
795 | */ | |
5f184715 AF |
796 | int phy_startup(struct phy_device *phydev) |
797 | { | |
798 | if (phydev->drv->startup) | |
6e5b9ac0 | 799 | return phydev->drv->startup(phydev); |
5f184715 AF |
800 | |
801 | return 0; | |
802 | } | |
803 | ||
3c6928fd | 804 | __weak int board_phy_config(struct phy_device *phydev) |
5f184715 | 805 | { |
9fafe7da TK |
806 | if (phydev->drv->config) |
807 | return phydev->drv->config(phydev); | |
5f184715 AF |
808 | return 0; |
809 | } | |
810 | ||
5f184715 AF |
811 | int phy_config(struct phy_device *phydev) |
812 | { | |
5f184715 AF |
813 | /* Invoke an optional board-specific helper */ |
814 | board_phy_config(phydev); | |
815 | ||
816 | return 0; | |
817 | } | |
818 | ||
819 | int phy_shutdown(struct phy_device *phydev) | |
820 | { | |
821 | if (phydev->drv->shutdown) | |
822 | phydev->drv->shutdown(phydev); | |
823 | ||
824 | return 0; | |
825 | } | |
c74c8e66 SG |
826 | |
827 | int phy_get_interface_by_name(const char *str) | |
828 | { | |
829 | int i; | |
830 | ||
831 | for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) { | |
832 | if (!strcmp(str, phy_interface_strings[i])) | |
833 | return i; | |
834 | } | |
835 | ||
836 | return -1; | |
837 | } |