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1/*
2 * (C) Copyright 2011 Freescale Semiconductor, Inc.
3 * Author: Fabio Estevam <[email protected]>
4 *
5 * Based on m28evk.h:
6 * Copyright (C) 2011 Marek Vasut <[email protected]>
7 * on behalf of DENX Software Engineering GmbH
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
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19#ifndef __MX28EVK_CONFIG_H__
20#define __MX28EVK_CONFIG_H__
29f75a5c 21
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22/*
23 * SoC configurations
24 */
25#define CONFIG_MX28 /* i.MX28 SoC */
e229d445 26
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27#define CONFIG_MXS_GPIO /* GPIO control */
28#define CONFIG_SYS_HZ 1000 /* Ticks per second */
29
30#define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
31
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32#include <asm/arch/regs-base.h>
33
29f75a5c 34#define CONFIG_SYS_NO_FLASH
29f75a5c 35#define CONFIG_BOARD_EARLY_INIT_F
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36#define CONFIG_ARCH_MISC_INIT
37
38/*
39 * SPL
40 */
41#define CONFIG_SPL
42#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
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43#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
44#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
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45#define CONFIG_SPL_LIBCOMMON_SUPPORT
46#define CONFIG_SPL_LIBGENERIC_SUPPORT
f8c4a86b 47#define CONFIG_SPL_GPIO_SUPPORT
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48
49/*
50 * U-Boot Commands
51 */
52#include <config_cmd_default.h>
53#define CONFIG_DISPLAY_CPUINFO
54#define CONFIG_DOS_PARTITION
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55
56#define CONFIG_CMD_CACHE
9588d942 57#define CONFIG_CMD_DATE
29f75a5c 58#define CONFIG_CMD_DHCP
3b4efee9 59#define CONFIG_CMD_FAT
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60#define CONFIG_CMD_GPIO
61#define CONFIG_CMD_MII
62#define CONFIG_CMD_MMC
63#define CONFIG_CMD_NET
64#define CONFIG_CMD_NFS
65#define CONFIG_CMD_PING
7577a4b3 66#define CONFIG_CMD_SETEXPR
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67#define CONFIG_CMD_SF
68#define CONFIG_CMD_SPI
598aa2bb 69#define CONFIG_CMD_USB
34990e12 70#define CONFIG_CMD_BOOTZ
175a7d27 71#define CONFIG_CMD_I2C
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72
73/*
74 * Memory configurations
75 */
76#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
77#define PHYS_SDRAM_1 0x40000000 /* Base address */
78#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
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79#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
80#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
81#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
82#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
83/* Point initial SP in SRAM so SPL can use it too. */
84
9ed5dfa8 85#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
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86#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
87
88#define CONFIG_SYS_INIT_SP_OFFSET \
89 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
90#define CONFIG_SYS_INIT_SP_ADDR \
91 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
92
93/*
94 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
95 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
96 * binary. In case there was more of this mess, 0x100 bytes are skipped.
97 */
98#define CONFIG_SYS_TEXT_BASE 0x40000100
99
100#define CONFIG_ENV_OVERWRITE
101/*
102 * U-Boot general configurations
103 */
104#define CONFIG_SYS_LONGHELP
105#define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
106#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
107#define CONFIG_SYS_PBSIZE \
108 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
109 /* Print buffer size */
110#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
111#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
112 /* Boot argument buffer size */
113#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
114#define CONFIG_AUTO_COMPLETE /* Command auto complete */
115#define CONFIG_CMDLINE_EDITING /* Command history etc */
116#define CONFIG_SYS_HUSH_PARSER
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117
118/*
119 * Serial Driver
120 */
121#define CONFIG_PL011_SERIAL
122#define CONFIG_PL011_CLOCK 24000000
123#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
124#define CONFIG_CONS_INDEX 0
125#define CONFIG_BAUDRATE 115200 /* Default baud rate */
29f75a5c 126
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127/*
128 * DMA
129 */
130#define CONFIG_APBH_DMA
131
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132/*
133 * MMC Driver
134 */
135#define CONFIG_ENV_IS_IN_MMC
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136#ifdef CONFIG_ENV_IS_IN_MMC
137 #define CONFIG_ENV_OFFSET (256 * 1024)
138 #define CONFIG_ENV_SIZE (16 * 1024)
139 #define CONFIG_SYS_MMC_ENV_DEV 0
140#endif
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141#define CONFIG_CMD_SAVEENV
142#ifdef CONFIG_CMD_MMC
143#define CONFIG_MMC
144#define CONFIG_GENERIC_MMC
6dc71c8d 145#define CONFIG_BOUNCE_BUFFER
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146#define CONFIG_MXS_MMC
147#endif
148
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149/*
150 * NAND Driver
151 */
152#ifdef CONFIG_CMD_NAND
153#define CONFIG_NAND_MXS
154#define CONFIG_SYS_MAX_NAND_DEVICE 1
155#define CONFIG_SYS_NAND_BASE 0x60000000
156#define CONFIG_SYS_NAND_5_ADDR_CYCLE
157#endif
158
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159/*
160 * Ethernet on SOC (FEC)
161 */
162#ifdef CONFIG_CMD_NET
163#define CONFIG_NET_MULTI
164#define CONFIG_ETHPRIME "FEC0"
165#define CONFIG_FEC_MXC
29f75a5c 166#define CONFIG_MII
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167#define CONFIG_FEC_XCV_TYPE RMII
168#define CONFIG_MX28_FEC_MAC_IN_OCOTP
169#endif
170
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171/*
172 * RTC
173 */
174#ifdef CONFIG_CMD_DATE
175#define CONFIG_RTC_MXS
176#endif
177
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178/*
179 * USB
180 */
181#ifdef CONFIG_CMD_USB
182#define CONFIG_USB_EHCI
183#define CONFIG_USB_EHCI_MXS
184#define CONFIG_EHCI_MXS_PORT 1
185#define CONFIG_EHCI_IS_TDI
186#define CONFIG_USB_STORAGE
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187#define CONFIG_USB_HOST_ETHER
188#define CONFIG_USB_ETHER_ASIX
189#define CONFIG_USB_ETHER_SMSC95XX
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190#endif
191
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192/* I2C */
193#ifdef CONFIG_CMD_I2C
194#define CONFIG_I2C_MXS
195#define CONFIG_HARD_I2C
196#define CONFIG_SYS_I2C_SPEED 400000
197#endif
198
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199/*
200 * SPI
201 */
202#ifdef CONFIG_CMD_SPI
203#define CONFIG_HARD_SPI
204#define CONFIG_MXS_SPI
205#define CONFIG_SPI_HALF_DUPLEX
206#define CONFIG_DEFAULT_SPI_BUS 2
207#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
208
209/* SPI Flash */
210#ifdef CONFIG_CMD_SF
211#define CONFIG_SPI_FLASH
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212#define CONFIG_SF_DEFAULT_BUS 2
213#define CONFIG_SF_DEFAULT_CS 0
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214/* this may vary and depends on the installed chip */
215#define CONFIG_SPI_FLASH_SST
216#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
217#define CONFIG_SF_DEFAULT_SPEED 24000000
218
219/* (redundant) environemnt in SPI flash */
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220#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
221#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
222#define CONFIG_ENV_SIZE 0x1000 /* 4KB */
223#define CONFIG_ENV_OFFSET 0x40000 /* 256K */
224#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
225#define CONFIG_ENV_SECT_SIZE 0x1000
226#define CONFIG_ENV_SPI_CS 0
227#define CONFIG_ENV_SPI_BUS 2
228#define CONFIG_ENV_SPI_MAX_HZ 24000000
229#define CONFIG_ENV_SPI_MODE SPI_MODE_0
230#endif
231#endif
232#endif
233
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234/*
235 * Boot Linux
236 */
237#define CONFIG_CMDLINE_TAG
238#define CONFIG_SETUP_MEMORY_TAGS
27856943 239#define CONFIG_BOOTDELAY 1
29f75a5c 240#define CONFIG_BOOTFILE "uImage"
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241#define CONFIG_LOADADDR 0x42000000
242#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
e310016b 243#define CONFIG_OF_LIBFDT
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244
245/*
246 * Extra Environments
247 */
248#define CONFIG_EXTRA_ENV_SETTINGS \
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249 "update_nand_full_filename=u-boot.nand\0" \
250 "update_nand_firmware_filename=u-boot.sb\0" \
251 "update_sd_firmware_filename=u-boot.sd\0" \
252 "update_nand_firmware_maxsz=0x100000\0" \
253 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
254 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
255 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
256 "nand device 0 ; " \
257 "nand info ; " \
258 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
259 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
260 "update_nand_full=" /* Update FCB, DBBT and FW */ \
261 "if tftp ${update_nand_full_filename} ; then " \
262 "run update_nand_get_fcb_size ; " \
263 "nand scrub -y 0x0 ${filesize} ; " \
71779d5b 264 "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
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265 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
266 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
267 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
268 "fi\0" \
269 "update_nand_firmware=" /* Update only firmware */ \
270 "if tftp ${update_nand_firmware_filename} ; then " \
271 "run update_nand_get_fcb_size ; " \
272 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
273 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
274 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
275 "nand erase ${fcb_sz} ${fw_sz} ; " \
276 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
277 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
278 "fi\0" \
279 "update_sd_firmware=" /* Update the SD firmware partition */ \
280 "if mmc rescan ; then " \
281 "if tftp ${update_sd_firmware_filename} ; then " \
282 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
283 "setexpr fw_sz ${fw_sz} + 1 ; " \
284 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
285 "fi ; " \
286 "fi\0" \
287 "script=boot.scr\0" \
288 "uimage=uImage\0" \
289 "console_fsl=ttyAM0\0" \
290 "console_mainline=ttyAMA0\0" \
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291 "fdt_file=imx28-evk.dtb\0" \
292 "fdt_addr=0x41000000\0" \
293 "boot_fdt=try\0" \
294 "ip_dyn=yes\0" \
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295 "mmcdev=0\0" \
296 "mmcpart=2\0" \
3c41e901 297 "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
f994dc5e 298 "mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
3c41e901 299 "root=${mmcroot}\0" \
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300 "loadbootscript=" \
301 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
302 "bootscript=echo Running bootscript from mmc ...; " \
303 "source\0" \
304 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
4c6b2350 305 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
f994dc5e 306 "mmcboot=echo Booting from mmc ...; " \
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307 "run mmcargs; " \
308 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
309 "if run loadfdt; then " \
310 "bootm ${loadaddr} - ${fdt_addr}; " \
311 "else " \
312 "if test ${boot_fdt} = try; then " \
313 "bootm; " \
314 "else " \
315 "echo WARN: Cannot load the DT; " \
316 "fi; " \
317 "fi; " \
318 "else " \
319 "bootm; " \
320 "fi;\0" \
f994dc5e 321 "netargs=setenv bootargs console=${console_mainline},${baudrate} " \
29f75a5c 322 "root=/dev/nfs " \
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323 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
324 "netboot=echo Booting from net ...; " \
325 "run netargs; " \
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326 "if test ${ip_dyn} = yes; then " \
327 "setenv get_cmd dhcp; " \
328 "else " \
329 "setenv get_cmd tftp; " \
330 "fi; " \
331 "${get_cmd} ${uimage}; " \
332 "if test ${boot_fdt} = yes; then " \
333 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
334 "bootm ${loadaddr} - ${fdt_addr}; " \
335 "else " \
336 "if test ${boot_fdt} = try; then " \
337 "bootm; " \
338 "else " \
339 "echo WARN: Cannot load the DT; " \
340 "fi;" \
341 "fi; " \
342 "else " \
343 "bootm; " \
344 "fi;\0"
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345
346#define CONFIG_BOOTCOMMAND \
66968110 347 "mmc dev ${mmcdev}; if mmc rescan; then " \
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348 "if run loadbootscript; then " \
349 "run bootscript; " \
350 "else " \
351 "if run loaduimage; then " \
352 "run mmcboot; " \
353 "else run netboot; " \
354 "fi; " \
355 "fi; " \
356 "else run netboot; fi"
29f75a5c 357
606de8b6 358#endif /* __MX28EVK_CONFIG_H__ */
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