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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
6f6430d7 SG |
2 | /* |
3 | * Copyright (c) 2011 The Chromium OS Authors. | |
4 | * (C) Copyright 2002-2006 | |
5 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
6 | * | |
7 | * (C) Copyright 2002 | |
8 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
9 | * Marius Groeger <[email protected]> | |
6f6430d7 SG |
10 | */ |
11 | ||
12 | #include <common.h> | |
12d738ae | 13 | #include <api.h> |
52f24238 | 14 | #include <bootstage.h> |
1eb69ae4 | 15 | #include <cpu_func.h> |
a6f2aafe | 16 | #include <exports.h> |
b79fdc76 | 17 | #include <flash.h> |
db41d65a | 18 | #include <hang.h> |
8e8ccfe1 | 19 | #include <image.h> |
36bf446b | 20 | #include <irq_func.h> |
f7ae49fc | 21 | #include <log.h> |
5e6267af | 22 | #include <net.h> |
90526e9f | 23 | #include <asm/cache.h> |
401d1c4f | 24 | #include <asm/global_data.h> |
3db71108 | 25 | #include <u-boot/crc.h> |
c2240d4d SG |
26 | /* TODO: can we just include all these headers whether needed or not? */ |
27 | #if defined(CONFIG_CMD_BEDBUG) | |
28 | #include <bedbug/type.h> | |
29 | #endif | |
3c10dc95 | 30 | #include <binman.h> |
cbb2df20 | 31 | #include <command.h> |
24b852a7 | 32 | #include <console.h> |
1ce60176 | 33 | #include <dm.h> |
3f989e7b | 34 | #include <env.h> |
f3998fdc | 35 | #include <env_internal.h> |
6f6430d7 | 36 | #include <fdtdec.h> |
c2240d4d | 37 | #include <ide.h> |
6b8d3cea | 38 | #include <init.h> |
6f6430d7 | 39 | #include <initcall.h> |
c2240d4d SG |
40 | #if defined(CONFIG_CMD_KGDB) |
41 | #include <kgdb.h> | |
42 | #endif | |
c30b7adb | 43 | #include <irq_func.h> |
6f6430d7 | 44 | #include <malloc.h> |
0eb25b61 | 45 | #include <mapmem.h> |
c2240d4d SG |
46 | #ifdef CONFIG_BITBANGMII |
47 | #include <miiphy.h> | |
48 | #endif | |
6f6430d7 | 49 | #include <mmc.h> |
90a979d7 | 50 | #include <mux.h> |
6f6430d7 | 51 | #include <nand.h> |
3af86a4e | 52 | #include <of_live.h> |
6f6430d7 | 53 | #include <onenand_uboot.h> |
722bc5b5 | 54 | #include <pvblock.h> |
c2240d4d | 55 | #include <scsi.h> |
6f6430d7 | 56 | #include <serial.h> |
c3e4430e | 57 | #include <status_led.h> |
6f6430d7 | 58 | #include <stdio_dev.h> |
1057e6cf | 59 | #include <timer.h> |
71c52dba | 60 | #include <trace.h> |
c2240d4d | 61 | #include <watchdog.h> |
48654416 OA |
62 | #ifdef CONFIG_XEN |
63 | #include <xen.h> | |
64 | #endif | |
c2240d4d SG |
65 | #ifdef CONFIG_ADDR_MAP |
66 | #include <asm/mmu.h> | |
67 | #endif | |
6f6430d7 | 68 | #include <asm/sections.h> |
1ce60176 | 69 | #include <dm/root.h> |
c2240d4d | 70 | #include <linux/compiler.h> |
1ce60176 | 71 | #include <linux/err.h> |
50149ea3 | 72 | #include <efi_loader.h> |
06985289 | 73 | #include <wdt.h> |
49b10cb4 | 74 | #if defined(CONFIG_GPIO_HOG) |
5fc7cf8c HS |
75 | #include <asm/gpio.h> |
76 | #endif | |
c57c9439 AT |
77 | #ifdef CONFIG_EFI_SETUP_EARLY |
78 | #include <efi_loader.h> | |
79 | #endif | |
6f6430d7 SG |
80 | |
81 | DECLARE_GLOBAL_DATA_PTR; | |
82 | ||
83 | ulong monitor_flash_len; | |
84 | ||
dd2a6cd0 | 85 | __weak int board_flash_wp_on(void) |
c2240d4d SG |
86 | { |
87 | /* | |
88 | * Most flashes can't be detected when write protection is enabled, | |
89 | * so provide a way to let U-Boot gracefully ignore write protected | |
90 | * devices. | |
91 | */ | |
92 | return 0; | |
93 | } | |
94 | ||
fb504b2c | 95 | __weak int cpu_secondary_init_r(void) |
c2240d4d | 96 | { |
c2240d4d SG |
97 | return 0; |
98 | } | |
6f6430d7 | 99 | |
71c52dba SG |
100 | static int initr_trace(void) |
101 | { | |
102 | #ifdef CONFIG_TRACE | |
103 | trace_init(gd->trace_buff, CONFIG_TRACE_BUFFER_SIZE); | |
104 | #endif | |
105 | ||
106 | return 0; | |
107 | } | |
108 | ||
6f6430d7 SG |
109 | static int initr_reloc(void) |
110 | { | |
c9356be3 SG |
111 | /* tell others: relocation done */ |
112 | gd->flags |= GD_FLG_RELOC | GD_FLG_FULL_MALLOC_INIT; | |
6f6430d7 SG |
113 | |
114 | return 0; | |
115 | } | |
116 | ||
117 | #ifdef CONFIG_ARM | |
118 | /* | |
119 | * Some of these functions are needed purely because the functions they | |
120 | * call return void. If we change them to return 0, these stubs can go away. | |
121 | */ | |
122 | static int initr_caches(void) | |
123 | { | |
124 | /* Enable caches */ | |
125 | enable_caches(); | |
126 | return 0; | |
127 | } | |
128 | #endif | |
129 | ||
c2240d4d SG |
130 | __weak int fixup_cpu(void) |
131 | { | |
132 | return 0; | |
133 | } | |
134 | ||
6f6430d7 SG |
135 | static int initr_reloc_global_data(void) |
136 | { | |
b60eff31 AA |
137 | #ifdef __ARM__ |
138 | monitor_flash_len = _end - __image_copy_start; | |
068feb9b | 139 | #elif defined(CONFIG_NDS32) || defined(CONFIG_RISCV) |
2e88bb28 | 140 | monitor_flash_len = (ulong)&_end - (ulong)&_start; |
5ff10aa7 | 141 | #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2) |
a0ba279a | 142 | monitor_flash_len = (ulong)&__init_end - gd->relocaddr; |
6f6430d7 | 143 | #endif |
c2240d4d SG |
144 | #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
145 | /* | |
146 | * The gd->cpu pointer is set to an address in flash before relocation. | |
147 | * We need to update it to point to the same CPU entry in RAM. | |
148 | * TODO: why not just add gd->reloc_ofs? | |
149 | */ | |
a0ba279a | 150 | gd->arch.cpu += gd->relocaddr - CONFIG_SYS_MONITOR_BASE; |
c2240d4d SG |
151 | |
152 | /* | |
153 | * If we didn't know the cpu mask & # cores, we can save them of | |
154 | * now rather than 'computing' them constantly | |
155 | */ | |
156 | fixup_cpu(); | |
157 | #endif | |
8d8ee47e | 158 | #ifdef CONFIG_SYS_RELOC_GD_ENV_ADDR |
c2240d4d | 159 | /* |
6c6add60 SG |
160 | * Relocate the early env_addr pointer unless we know it is not inside |
161 | * the binary. Some systems need this and for the rest, it doesn't hurt. | |
c2240d4d | 162 | */ |
6c6add60 | 163 | gd->env_addr += gd->reloc_off; |
c2240d4d | 164 | #endif |
e9acb9ea SDPP |
165 | #ifdef CONFIG_OF_EMBED |
166 | /* | |
92f84b67 MS |
167 | * The fdt_blob needs to be moved to new relocation address |
168 | * incase of FDT blob is embedded with in image | |
169 | */ | |
e9acb9ea SDPP |
170 | gd->fdt_blob += gd->reloc_off; |
171 | #endif | |
50149ea3 | 172 | #ifdef CONFIG_EFI_LOADER |
e7ac009b HS |
173 | /* |
174 | * On the ARM architecture gd is mapped to a fixed register (r9 or x18). | |
175 | * As this register may be overwritten by an EFI payload we save it here | |
176 | * and restore it on every callback entered. | |
177 | */ | |
178 | efi_save_gd(); | |
179 | ||
50149ea3 AG |
180 | efi_runtime_relocate(gd->relocaddr, NULL); |
181 | #endif | |
e9acb9ea | 182 | |
c2240d4d | 183 | return 0; |
6f6430d7 SG |
184 | } |
185 | ||
130845ba | 186 | __weak int arch_initr_trap(void) |
c2240d4d | 187 | { |
c2240d4d SG |
188 | return 0; |
189 | } | |
c2240d4d SG |
190 | |
191 | #ifdef CONFIG_ADDR_MAP | |
192 | static int initr_addr_map(void) | |
193 | { | |
194 | init_addr_map(); | |
195 | ||
196 | return 0; | |
197 | } | |
198 | #endif | |
199 | ||
c2240d4d SG |
200 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
201 | static int initr_unlock_ram_in_cache(void) | |
202 | { | |
203 | unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */ | |
204 | return 0; | |
205 | } | |
206 | #endif | |
207 | ||
c2240d4d SG |
208 | static int initr_barrier(void) |
209 | { | |
210 | #ifdef CONFIG_PPC | |
211 | /* TODO: Can we not use dmb() macros for this? */ | |
212 | asm("sync ; isync"); | |
213 | #endif | |
214 | return 0; | |
215 | } | |
216 | ||
6f6430d7 SG |
217 | static int initr_malloc(void) |
218 | { | |
219 | ulong malloc_start; | |
220 | ||
f1896c45 | 221 | #if CONFIG_VAL(SYS_MALLOC_F_LEN) |
d59476b6 SG |
222 | debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, |
223 | gd->malloc_ptr / 1024); | |
224 | #endif | |
6f6430d7 | 225 | /* The malloc area is immediately below the monitor copy in DRAM */ |
5e0404ff SW |
226 | /* |
227 | * This value MUST match the value of gd->start_addr_sp in board_f.c: | |
228 | * reserve_noncached(). | |
229 | */ | |
a0ba279a | 230 | malloc_start = gd->relocaddr - TOTAL_MALLOC_LEN; |
a733b06b SG |
231 | mem_malloc_init((ulong)map_sysmem(malloc_start, TOTAL_MALLOC_LEN), |
232 | TOTAL_MALLOC_LEN); | |
6f6430d7 SG |
233 | return 0; |
234 | } | |
235 | ||
3af86a4e SG |
236 | static int initr_of_live(void) |
237 | { | |
a652d9c7 SG |
238 | if (CONFIG_IS_ENABLED(OF_LIVE)) { |
239 | int ret; | |
a132f770 | 240 | |
a652d9c7 SG |
241 | bootstage_start(BOOTSTAGE_ID_ACCUM_OF_LIVE, "of_live"); |
242 | ret = of_live_build(gd->fdt_blob, | |
243 | (struct device_node **)gd_of_root_ptr()); | |
244 | bootstage_accum(BOOTSTAGE_ID_ACCUM_OF_LIVE); | |
245 | if (ret) | |
246 | return ret; | |
247 | } | |
a132f770 SG |
248 | |
249 | return 0; | |
3af86a4e | 250 | } |
3af86a4e | 251 | |
1ce60176 SG |
252 | #ifdef CONFIG_DM |
253 | static int initr_dm(void) | |
254 | { | |
1057e6cf SG |
255 | int ret; |
256 | ||
ab7cd627 SG |
257 | /* Save the pre-reloc driver model and start a new one */ |
258 | gd->dm_root_f = gd->dm_root; | |
259 | gd->dm_root = NULL; | |
d74d6b44 SG |
260 | #ifdef CONFIG_TIMER |
261 | gd->timer = NULL; | |
262 | #endif | |
b67eefdb | 263 | bootstage_start(BOOTSTAGE_ID_ACCUM_DM_R, "dm_r"); |
1057e6cf | 264 | ret = dm_init_and_scan(false); |
b67eefdb | 265 | bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_R); |
1057e6cf SG |
266 | if (ret) |
267 | return ret; | |
1057e6cf SG |
268 | |
269 | return 0; | |
1ce60176 SG |
270 | } |
271 | #endif | |
272 | ||
dd0edcb2 SG |
273 | static int initr_dm_devices(void) |
274 | { | |
275 | int ret; | |
276 | ||
277 | if (IS_ENABLED(CONFIG_TIMER_EARLY)) { | |
278 | ret = dm_timer_init(); | |
279 | if (ret) | |
280 | return ret; | |
281 | } | |
282 | ||
90a979d7 JJH |
283 | if (IS_ENABLED(CONFIG_MULTIPLEXER)) { |
284 | /* | |
285 | * Initialize the multiplexer controls to their default state. | |
286 | * This must be done early as other drivers may unknowingly | |
287 | * rely on it. | |
288 | */ | |
289 | ret = dm_mux_init(); | |
290 | if (ret) | |
291 | return ret; | |
292 | } | |
293 | ||
dd0edcb2 SG |
294 | return 0; |
295 | } | |
296 | ||
881c124a SG |
297 | static int initr_bootstage(void) |
298 | { | |
881c124a SG |
299 | bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r"); |
300 | ||
301 | return 0; | |
302 | } | |
303 | ||
6f6430d7 SG |
304 | __weak int power_init_board(void) |
305 | { | |
306 | return 0; | |
307 | } | |
308 | ||
309 | static int initr_announce(void) | |
310 | { | |
a0ba279a | 311 | debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr); |
6f6430d7 SG |
312 | return 0; |
313 | } | |
314 | ||
61d7b1bb AB |
315 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
316 | static int initr_manual_reloc_cmdtable(void) | |
317 | { | |
09140113 SG |
318 | fixup_cmdtable(ll_entry_start(struct cmd_tbl, cmd), |
319 | ll_entry_count(struct cmd_tbl, cmd)); | |
61d7b1bb AB |
320 | return 0; |
321 | } | |
322 | #endif | |
323 | ||
3c10dc95 SG |
324 | static int initr_binman(void) |
325 | { | |
326 | if (!CONFIG_IS_ENABLED(BINMAN_FDT)) | |
327 | return 0; | |
328 | ||
329 | return binman_init(); | |
330 | } | |
331 | ||
e856bdcf | 332 | #if defined(CONFIG_MTD_NOR_FLASH) |
62d3a58d PG |
333 | __weak int is_flash_available(void) |
334 | { | |
335 | return 1; | |
336 | } | |
337 | ||
6f6430d7 SG |
338 | static int initr_flash(void) |
339 | { | |
c2240d4d | 340 | ulong flash_size = 0; |
b75d8dc5 | 341 | struct bd_info *bd = gd->bd; |
6f6430d7 | 342 | |
62d3a58d PG |
343 | if (!is_flash_available()) |
344 | return 0; | |
345 | ||
6f6430d7 SG |
346 | puts("Flash: "); |
347 | ||
70879a92 | 348 | if (board_flash_wp_on()) |
c2240d4d | 349 | printf("Uninitialized - Write Protect On\n"); |
70879a92 | 350 | else |
c2240d4d | 351 | flash_size = flash_init(); |
70879a92 | 352 | |
6f6430d7 SG |
353 | print_size(flash_size, ""); |
354 | #ifdef CONFIG_SYS_FLASH_CHECKSUM | |
355 | /* | |
92f84b67 MS |
356 | * Compute and print flash CRC if flashchecksum is set to 'y' |
357 | * | |
358 | * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX | |
359 | */ | |
bfebc8c9 | 360 | if (env_get_yesno("flashchecksum") == 1) { |
92f84b67 MS |
361 | const uchar *flash_base = (const uchar *)CONFIG_SYS_FLASH_BASE; |
362 | ||
6f6430d7 | 363 | printf(" CRC: %08X", crc32(0, |
92f84b67 MS |
364 | flash_base, |
365 | flash_size)); | |
6f6430d7 SG |
366 | } |
367 | #endif /* CONFIG_SYS_FLASH_CHECKSUM */ | |
368 | putc('\n'); | |
369 | ||
c2240d4d SG |
370 | /* update start of FLASH memory */ |
371 | #ifdef CONFIG_SYS_FLASH_BASE | |
372 | bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; | |
373 | #endif | |
374 | /* size of FLASH memory (final value) */ | |
375 | bd->bi_flashsize = flash_size; | |
376 | ||
377 | #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE) | |
378 | /* Make a update of the Memctrl. */ | |
379 | update_flash_size(flash_size); | |
380 | #endif | |
381 | ||
c2240d4d SG |
382 | #if defined(CONFIG_OXC) || defined(CONFIG_RMU) |
383 | /* flash mapped at end of memory map */ | |
384 | bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size; | |
385 | #elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE | |
386 | bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */ | |
387 | #endif | |
388 | return 0; | |
389 | } | |
390 | #endif | |
391 | ||
6f6430d7 SG |
392 | #ifdef CONFIG_CMD_NAND |
393 | /* go init the NAND */ | |
2588ba14 | 394 | static int initr_nand(void) |
6f6430d7 SG |
395 | { |
396 | puts("NAND: "); | |
397 | nand_init(); | |
203db38a | 398 | printf("%lu MiB\n", nand_size() / 1024); |
6f6430d7 SG |
399 | return 0; |
400 | } | |
401 | #endif | |
402 | ||
403 | #if defined(CONFIG_CMD_ONENAND) | |
404 | /* go init the NAND */ | |
2588ba14 | 405 | static int initr_onenand(void) |
6f6430d7 SG |
406 | { |
407 | puts("NAND: "); | |
408 | onenand_init(); | |
409 | return 0; | |
410 | } | |
411 | #endif | |
412 | ||
4aa2ba3a | 413 | #ifdef CONFIG_MMC |
2588ba14 | 414 | static int initr_mmc(void) |
6f6430d7 SG |
415 | { |
416 | puts("MMC: "); | |
417 | mmc_initialize(gd->bd); | |
418 | return 0; | |
419 | } | |
420 | #endif | |
421 | ||
722bc5b5 AL |
422 | #ifdef CONFIG_PVBLOCK |
423 | static int initr_pvblock(void) | |
424 | { | |
425 | puts("PVBLOCK: "); | |
426 | pvblock_init(); | |
427 | return 0; | |
428 | } | |
429 | #endif | |
430 | ||
6f6430d7 SG |
431 | /* |
432 | * Tell if it's OK to load the environment early in boot. | |
433 | * | |
776babd7 | 434 | * If CONFIG_OF_CONTROL is defined, we'll check with the FDT to see |
6f6430d7 SG |
435 | * if this is OK (defaulting to saying it's OK). |
436 | * | |
437 | * NOTE: Loading the environment early can be a bad idea if security is | |
438 | * important, since no verification is done on the environment. | |
439 | * | |
440 | * @return 0 if environment should not be loaded, !=0 if it is ok to load | |
441 | */ | |
442 | static int should_load_env(void) | |
443 | { | |
9441f8cb OP |
444 | if (IS_ENABLED(CONFIG_OF_CONTROL)) |
445 | return fdtdec_get_config_int(gd->fdt_blob, | |
446 | "load-environment", 1); | |
447 | ||
448 | if (IS_ENABLED(CONFIG_DELAY_ENVIRONMENT)) | |
449 | return 0; | |
450 | ||
6f6430d7 | 451 | return 1; |
6f6430d7 SG |
452 | } |
453 | ||
454 | static int initr_env(void) | |
455 | { | |
456 | /* initialize environment */ | |
457 | if (should_load_env()) | |
458 | env_relocate(); | |
459 | else | |
0ac7d722 | 460 | env_set_default(NULL, 0); |
9441f8cb OP |
461 | |
462 | if (IS_ENABLED(CONFIG_OF_CONTROL)) | |
463 | env_set_hex("fdtcontroladdr", | |
464 | (unsigned long)map_to_sysmem(gd->fdt_blob)); | |
6f6430d7 SG |
465 | |
466 | /* Initialize from environment */ | |
bb872dd9 | 467 | image_load_addr = env_get_ulong("loadaddr", 16, image_load_addr); |
c2240d4d | 468 | |
c2240d4d SG |
469 | return 0; |
470 | } | |
471 | ||
c722f0b0 AB |
472 | #ifdef CONFIG_SYS_BOOTPARAMS_LEN |
473 | static int initr_malloc_bootparams(void) | |
474 | { | |
475 | gd->bd->bi_boot_params = (ulong)malloc(CONFIG_SYS_BOOTPARAMS_LEN); | |
476 | if (!gd->bd->bi_boot_params) { | |
477 | puts("WARNING: Cannot allocate space for boot parameters\n"); | |
478 | return -ENOMEM; | |
479 | } | |
480 | return 0; | |
481 | } | |
482 | #endif | |
483 | ||
6f6430d7 SG |
484 | #ifdef CONFIG_CMD_NET |
485 | static int initr_ethaddr(void) | |
486 | { | |
b75d8dc5 | 487 | struct bd_info *bd = gd->bd; |
c2240d4d SG |
488 | |
489 | /* kept around for legacy kernels only ... ignore the next section */ | |
35affd7a | 490 | eth_env_get_enetaddr("ethaddr", bd->bi_enetaddr); |
32d0b2df | 491 | |
c2240d4d SG |
492 | return 0; |
493 | } | |
494 | #endif /* CONFIG_CMD_NET */ | |
495 | ||
496 | #ifdef CONFIG_CMD_KGDB | |
497 | static int initr_kgdb(void) | |
498 | { | |
499 | puts("KGDB: "); | |
500 | kgdb_init(); | |
501 | return 0; | |
502 | } | |
503 | #endif | |
504 | ||
2d8d190c | 505 | #if defined(CONFIG_LED_STATUS) |
c2240d4d SG |
506 | static int initr_status_led(void) |
507 | { | |
2d8d190c UM |
508 | #if defined(CONFIG_LED_STATUS_BOOT) |
509 | status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING); | |
13cfbe51 BN |
510 | #else |
511 | status_led_init(); | |
512 | #endif | |
c2240d4d SG |
513 | return 0; |
514 | } | |
515 | #endif | |
516 | ||
e8a016b5 | 517 | #if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI) |
c2240d4d SG |
518 | static int initr_scsi(void) |
519 | { | |
c2240d4d SG |
520 | puts("SCSI: "); |
521 | scsi_init(); | |
3804f5bb | 522 | puts("\n"); |
6f6430d7 SG |
523 | |
524 | return 0; | |
525 | } | |
2c997e7a | 526 | #endif |
6f6430d7 | 527 | |
6f6430d7 SG |
528 | #ifdef CONFIG_CMD_NET |
529 | static int initr_net(void) | |
530 | { | |
531 | puts("Net: "); | |
d2eaec60 | 532 | eth_initialize(); |
6f6430d7 SG |
533 | #if defined(CONFIG_RESET_PHY_R) |
534 | debug("Reset Ethernet PHY\n"); | |
535 | reset_phy(); | |
536 | #endif | |
537 | return 0; | |
538 | } | |
539 | #endif | |
540 | ||
541 | #ifdef CONFIG_POST | |
542 | static int initr_post(void) | |
543 | { | |
544 | post_run(NULL, POST_RAM | post_bootmode_get(0)); | |
545 | return 0; | |
546 | } | |
547 | #endif | |
548 | ||
ec15d5f6 | 549 | #if defined(CONFIG_IDE) && !defined(CONFIG_BLK) |
c2240d4d SG |
550 | static int initr_ide(void) |
551 | { | |
c2240d4d | 552 | puts("IDE: "); |
c2240d4d SG |
553 | #if defined(CONFIG_START_IDE) |
554 | if (board_start_ide()) | |
555 | ide_init(); | |
556 | #else | |
557 | ide_init(); | |
558 | #endif | |
559 | return 0; | |
560 | } | |
561 | #endif | |
562 | ||
c5404b64 | 563 | #if defined(CONFIG_PRAM) |
6f6430d7 SG |
564 | /* |
565 | * Export available size of memory for Linux, taking into account the | |
566 | * protected RAM at top of memory | |
567 | */ | |
568 | int initr_mem(void) | |
569 | { | |
570 | ulong pram = 0; | |
571 | char memsz[32]; | |
572 | ||
bfebc8c9 | 573 | pram = env_get_ulong("pram", 10, CONFIG_PRAM); |
92f84b67 | 574 | sprintf(memsz, "%ldk", (long int)((gd->ram_size / 1024) - pram)); |
382bee57 | 575 | env_set("mem", memsz); |
c2240d4d SG |
576 | |
577 | return 0; | |
578 | } | |
579 | #endif | |
580 | ||
6f6430d7 SG |
581 | static int run_main_loop(void) |
582 | { | |
a733b06b SG |
583 | #ifdef CONFIG_SANDBOX |
584 | sandbox_main_loop_init(); | |
585 | #endif | |
6f6430d7 SG |
586 | /* main_loop() can return to retry autoboot, if so just run it again */ |
587 | for (;;) | |
588 | main_loop(); | |
589 | return 0; | |
590 | } | |
591 | ||
592 | /* | |
47870afa | 593 | * We hope to remove most of the driver-related init and do it if/when |
6f6430d7 | 594 | * the driver is later used. |
c2240d4d SG |
595 | * |
596 | * TODO: perhaps reset the watchdog in the initcall function after each call? | |
6f6430d7 | 597 | */ |
4acff452 | 598 | static init_fnc_t init_sequence_r[] = { |
71c52dba | 599 | initr_trace, |
6f6430d7 | 600 | initr_reloc, |
c2240d4d | 601 | /* TODO: could x86/PPC have this also perhaps? */ |
6f6430d7 SG |
602 | #ifdef CONFIG_ARM |
603 | initr_caches, | |
12eaf31c YS |
604 | /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR. |
605 | * A temporary mapping of IFC high region is since removed, | |
92f84b67 | 606 | * so environmental variables in NOR flash is not available |
12eaf31c YS |
607 | * until board_init() is called below to remap IFC to high |
608 | * region. | |
609 | */ | |
9fb02491 SG |
610 | #endif |
611 | initr_reloc_global_data, | |
fef3e25f YS |
612 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
613 | initr_unlock_ram_in_cache, | |
614 | #endif | |
9fb02491 SG |
615 | initr_barrier, |
616 | initr_malloc, | |
af1bc0cf | 617 | log_init, |
5ac44a55 | 618 | initr_bootstage, /* Needs malloc() but has its own timer */ |
51c5a2c5 OP |
619 | #if defined(CONFIG_CONSOLE_RECORD) |
620 | console_record_init, | |
621 | #endif | |
671fa63e | 622 | #ifdef CONFIG_SYS_NONCACHED_MEMORY |
42d0d422 | 623 | noncached_init, |
671fa63e | 624 | #endif |
3af86a4e | 625 | initr_of_live, |
9fb02491 SG |
626 | #ifdef CONFIG_DM |
627 | initr_dm, | |
628 | #endif | |
17585e2d PD |
629 | #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || \ |
630 | defined(CONFIG_SANDBOX) | |
6f6430d7 | 631 | board_init, /* Setup chipselects */ |
c2240d4d SG |
632 | #endif |
633 | /* | |
634 | * TODO: printing of the clock inforamtion of the board is now | |
635 | * implemented as part of bdinfo command. Currently only support for | |
636 | * davinci SOC's is added. Remove this check once all the board | |
637 | * implement this. | |
638 | */ | |
639 | #ifdef CONFIG_CLOCKS | |
640 | set_cpu_clk_info, /* Setup clock information */ | |
5d00995c AG |
641 | #endif |
642 | #ifdef CONFIG_EFI_LOADER | |
643 | efi_memory_init, | |
6f6430d7 | 644 | #endif |
3c10dc95 | 645 | initr_binman, |
fe08d39d SG |
646 | #ifdef CONFIG_FSP_VERSION2 |
647 | arch_fsp_init_r, | |
648 | #endif | |
dd0edcb2 | 649 | initr_dm_devices, |
9fb02491 | 650 | stdio_init_tables, |
bf2fb81a | 651 | serial_initialize, |
6f6430d7 | 652 | initr_announce, |
6874cb72 | 653 | #if CONFIG_IS_ENABLED(WDT) |
84b2416b WG |
654 | initr_watchdog, |
655 | #endif | |
c2240d4d | 656 | INIT_FUNC_WATCHDOG_RESET |
276b6c94 OP |
657 | #if defined(CONFIG_NEEDS_MANUAL_RELOC) && defined(CONFIG_BLOCK_CACHE) |
658 | blkcache_init, | |
659 | #endif | |
61d7b1bb AB |
660 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
661 | initr_manual_reloc_cmdtable, | |
662 | #endif | |
130845ba | 663 | arch_initr_trap, |
c2240d4d SG |
664 | #ifdef CONFIG_ADDR_MAP |
665 | initr_addr_map, | |
666 | #endif | |
667 | #if defined(CONFIG_BOARD_EARLY_INIT_R) | |
668 | board_early_init_r, | |
669 | #endif | |
670 | INIT_FUNC_WATCHDOG_RESET | |
6f6430d7 | 671 | #ifdef CONFIG_POST |
7addd3c6 | 672 | post_output_backlog, |
6f6430d7 | 673 | #endif |
c2240d4d | 674 | INIT_FUNC_WATCHDOG_RESET |
b9f6d0f7 | 675 | #if defined(CONFIG_PCI_INIT_R) && defined(CONFIG_SYS_EARLY_PCI_INIT) |
c2240d4d SG |
676 | /* |
677 | * Do early PCI configuration _before_ the flash gets initialised, | |
92f84b67 | 678 | * because PCU resources are crucial for flash access on some boards. |
c2240d4d | 679 | */ |
b9f6d0f7 | 680 | pci_init, |
c2240d4d | 681 | #endif |
6f6430d7 SG |
682 | #ifdef CONFIG_ARCH_EARLY_INIT_R |
683 | arch_early_init_r, | |
684 | #endif | |
685 | power_init_board, | |
e856bdcf | 686 | #ifdef CONFIG_MTD_NOR_FLASH |
6f6430d7 | 687 | initr_flash, |
c2240d4d SG |
688 | #endif |
689 | INIT_FUNC_WATCHDOG_RESET | |
936478e7 | 690 | #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86) |
c2240d4d SG |
691 | /* initialize higher level parts of CPU like time base and timers */ |
692 | cpu_init_r, | |
be274b99 | 693 | #endif |
6f6430d7 SG |
694 | #ifdef CONFIG_CMD_NAND |
695 | initr_nand, | |
696 | #endif | |
697 | #ifdef CONFIG_CMD_ONENAND | |
698 | initr_onenand, | |
699 | #endif | |
4aa2ba3a | 700 | #ifdef CONFIG_MMC |
6f6430d7 | 701 | initr_mmc, |
48654416 OA |
702 | #endif |
703 | #ifdef CONFIG_XEN | |
eb2825b7 | 704 | xen_init, |
722bc5b5 AL |
705 | #endif |
706 | #ifdef CONFIG_PVBLOCK | |
707 | initr_pvblock, | |
6f6430d7 SG |
708 | #endif |
709 | initr_env, | |
c722f0b0 AB |
710 | #ifdef CONFIG_SYS_BOOTPARAMS_LEN |
711 | initr_malloc_bootparams, | |
712 | #endif | |
c2240d4d | 713 | INIT_FUNC_WATCHDOG_RESET |
fb504b2c | 714 | cpu_secondary_init_r, |
c2240d4d SG |
715 | #if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET) |
716 | mac_read_from_eeprom, | |
717 | #endif | |
718 | INIT_FUNC_WATCHDOG_RESET | |
b9f6d0f7 | 719 | #if defined(CONFIG_PCI_INIT_R) && !defined(CONFIG_SYS_EARLY_PCI_INIT) |
c2240d4d SG |
720 | /* |
721 | * Do pci configuration | |
722 | */ | |
b9f6d0f7 | 723 | pci_init, |
c2240d4d | 724 | #endif |
9fb02491 | 725 | stdio_add_devices, |
01548580 | 726 | jumptable_init, |
6f6430d7 | 727 | #ifdef CONFIG_API |
ce41e735 | 728 | api_init, |
6f6430d7 SG |
729 | #endif |
730 | console_init_r, /* fully init console as a device */ | |
731 | #ifdef CONFIG_DISPLAY_BOARDINFO_LATE | |
b0895384 | 732 | console_announce_r, |
0365ffcc | 733 | show_board_info, |
6f6430d7 SG |
734 | #endif |
735 | #ifdef CONFIG_ARCH_MISC_INIT | |
736 | arch_misc_init, /* miscellaneous arch-dependent init */ | |
737 | #endif | |
738 | #ifdef CONFIG_MISC_INIT_R | |
739 | misc_init_r, /* miscellaneous platform-dependent init */ | |
c2240d4d SG |
740 | #endif |
741 | INIT_FUNC_WATCHDOG_RESET | |
742 | #ifdef CONFIG_CMD_KGDB | |
743 | initr_kgdb, | |
6f6430d7 SG |
744 | #endif |
745 | interrupt_init, | |
daab59ac | 746 | #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K) |
be274b99 SG |
747 | timer_init, /* initialize timer */ |
748 | #endif | |
2d8d190c | 749 | #if defined(CONFIG_LED_STATUS) |
c2240d4d SG |
750 | initr_status_led, |
751 | #endif | |
752 | /* PPC has a udelay(20) here dating from 2002. Why? */ | |
6f6430d7 SG |
753 | #ifdef CONFIG_CMD_NET |
754 | initr_ethaddr, | |
755 | #endif | |
49b10cb4 | 756 | #if defined(CONFIG_GPIO_HOG) |
5fc7cf8c HS |
757 | gpio_hog_probe_all, |
758 | #endif | |
6f6430d7 SG |
759 | #ifdef CONFIG_BOARD_LATE_INIT |
760 | board_late_init, | |
761 | #endif | |
e8a016b5 | 762 | #if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI) |
c2240d4d SG |
763 | INIT_FUNC_WATCHDOG_RESET |
764 | initr_scsi, | |
765 | #endif | |
6f6430d7 | 766 | #ifdef CONFIG_BITBANGMII |
c65abc70 | 767 | bb_miiphy_init, |
6f6430d7 | 768 | #endif |
fd00c53f | 769 | #ifdef CONFIG_PCI_ENDPOINT |
c343e8c0 | 770 | pci_ep_init, |
fd00c53f | 771 | #endif |
6f6430d7 | 772 | #ifdef CONFIG_CMD_NET |
c2240d4d | 773 | INIT_FUNC_WATCHDOG_RESET |
6f6430d7 SG |
774 | initr_net, |
775 | #endif | |
776 | #ifdef CONFIG_POST | |
777 | initr_post, | |
c2240d4d | 778 | #endif |
ec15d5f6 | 779 | #if defined(CONFIG_IDE) && !defined(CONFIG_BLK) |
c2240d4d SG |
780 | initr_ide, |
781 | #endif | |
782 | #ifdef CONFIG_LAST_STAGE_INIT | |
783 | INIT_FUNC_WATCHDOG_RESET | |
784 | /* | |
785 | * Some parts can be only initialized if all others (like | |
786 | * Interrupts) are up and running (i.e. the PC-style ISA | |
787 | * keyboard). | |
788 | */ | |
789 | last_stage_init, | |
790 | #endif | |
791 | #ifdef CONFIG_CMD_BEDBUG | |
792 | INIT_FUNC_WATCHDOG_RESET | |
1a4c077b | 793 | bedbug_init, |
c2240d4d | 794 | #endif |
c5404b64 | 795 | #if defined(CONFIG_PRAM) |
c2240d4d | 796 | initr_mem, |
c57c9439 AT |
797 | #endif |
798 | #ifdef CONFIG_EFI_SETUP_EARLY | |
799 | (init_fnc_t)efi_init_obj_list, | |
6f6430d7 SG |
800 | #endif |
801 | run_main_loop, | |
802 | }; | |
803 | ||
804 | void board_init_r(gd_t *new_gd, ulong dest_addr) | |
805 | { | |
fb92308b SG |
806 | /* |
807 | * Set up the new global data pointer. So far only x86 does this | |
808 | * here. | |
809 | * TODO([email protected]): Consider doing this for all archs, or | |
810 | * dropping the new_gd parameter. | |
811 | */ | |
812 | #if CONFIG_IS_ENABLED(X86_64) | |
813 | arch_setup_gd(new_gd); | |
814 | #endif | |
815 | ||
7395398a AB |
816 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
817 | int i; | |
818 | #endif | |
819 | ||
47a602ea | 820 | #if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64) |
6f6430d7 | 821 | gd = new_gd; |
be274b99 | 822 | #endif |
af1bc0cf | 823 | gd->flags &= ~GD_FLG_LOG_READY; |
7395398a AB |
824 | |
825 | #ifdef CONFIG_NEEDS_MANUAL_RELOC | |
826 | for (i = 0; i < ARRAY_SIZE(init_sequence_r); i++) | |
827 | init_sequence_r[i] += gd->reloc_off; | |
828 | #endif | |
829 | ||
6f6430d7 SG |
830 | if (initcall_run_list(init_sequence_r)) |
831 | hang(); | |
832 | ||
833 | /* NOTREACHED - run_main_loop() does not return */ | |
834 | hang(); | |
835 | } |