[J-u-boot.git] / board / CZ.NIC / turris_mox / turris_mox.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2018 Marek Behun <[email protected]>
 */

#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <net.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <clk.h>
#include <dm.h>
#include <env.h>
#include <fdt_support.h>
#include <init.h>
#include <linux/delay.h>
#include <linux/libfdt.h>
#include <linux/string.h>
#include <miiphy.h>
#include <mvebu/comphy.h>
#include <spi.h>

#include "mox_sp.h"

#define MAX_MOX_MODULES		10

#define MOX_MODULE_SFP		0x1
#define MOX_MODULE_PCI		0x2
#define MOX_MODULE_TOPAZ	0x3
#define MOX_MODULE_PERIDOT	0x4
#define MOX_MODULE_USB3		0x5
#define MOX_MODULE_PASSPCI	0x6

#define ARMADA_37XX_NB_GPIO_SEL	(MVEBU_REGISTER(0x13830))
#define ARMADA_37XX_SPI_CTRL	(MVEBU_REGISTER(0x10600))
#define ARMADA_37XX_SPI_CFG	(MVEBU_REGISTER(0x10604))
#define ARMADA_37XX_SPI_DOUT	(MVEBU_REGISTER(0x10608))
#define ARMADA_37XX_SPI_DIN	(MVEBU_REGISTER(0x1060c))

#define ETH1_PATH	"/soc/internal-regs@d0000000/ethernet@40000"
#define MDIO_PATH	"/soc/internal-regs@d0000000/mdio@32004"
#define SFP_GPIO_PATH	"/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0"
#define PCIE_PATH	"/soc/pcie@d0070000"
#define SFP_PATH	"/sfp"

DECLARE_GLOBAL_DATA_PTR;

#if defined(CONFIG_OF_BOARD_FIXUP)
int board_fix_fdt(void *blob)
{
	u8 topology[MAX_MOX_MODULES];
	int i, size, node;
	bool enable;

	/*
	 * SPI driver is not loaded in driver model yet, but we have to find out
	 * if pcie should be enabled in U-Boot's device tree. Therefore we have
	 * to read SPI by reading/writing SPI registers directly
	 */

	writel(0x10df, ARMADA_37XX_SPI_CFG);
	/* put pin from GPIO to SPI mode */
	clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
	/* enable SPI CS1 */
	setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));

	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
		udelay(1);

	for (i = 0; i < MAX_MOX_MODULES; ++i) {
		writel(0x0, ARMADA_37XX_SPI_DOUT);

		while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
			udelay(1);

		topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
		if (topology[i] == 0xff)
			break;

		topology[i] &= 0xf;
	}

	size = i;

	/* disable SPI CS1 */
	clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));

	if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
			 topology[1] == MOX_MODULE_USB3 ||
			 topology[1] == MOX_MODULE_PASSPCI))
		enable = true;
	else
		enable = false;

	node = fdt_path_offset(blob, PCIE_PATH);

	if (node < 0) {
		printf("Cannot find PCIe node in U-Boot's device tree!\n");
		return 0;
	}

	if (fdt_setprop_string(blob, node, "status",
			       enable ? "okay" : "disabled") < 0) {
		printf("Cannot %s PCIe in U-Boot's device tree!\n",
		       enable ? "enable" : "disable");
		return 0;
	}

	if (a3700_fdt_fix_pcie_regions(blob) < 0) {
		printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
		return 0;
	}

	return 0;
}
#endif

int board_init(void)
{
	/* address of boot parameters */
	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

	return 0;
}

static int mox_do_spi(u8 *in, u8 *out, size_t size)
{
	struct spi_slave *slave;
	struct udevice *dev;
	int ret;

	ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA | SPI_CPOL,
				 "spi_generic_drv", "moxtet@1", &dev,
				 &slave);
	if (ret)
		goto fail;

	ret = spi_claim_bus(slave);
	if (ret)
		goto fail_free;

	ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);

	spi_release_bus(slave);
fail_free:
	spi_free_slave(slave);
fail:
	return ret;
}

static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd)
{
	static int is_sd;
	static u8 topology[MAX_MOX_MODULES - 1];
	static int size;
	u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
	int ret, i;

	if (size) {
		if (ptopology)
			*ptopology = topology;
		if (psize)
			*psize = size;
		if (pis_sd)
			*pis_sd = is_sd;
		return 0;
	}

	memset(din, 0, MAX_MOX_MODULES);
	memset(dout, 0, MAX_MOX_MODULES);

	ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
	if (ret)
		return ret;

	if (din[0] == 0x10)
		is_sd = 1;
	else if (din[0] == 0x00)
		is_sd = 0;
	else
		return -ENODEV;

	for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
		topology[i - 1] = din[i] & 0xf;
	size = i - 1;

	if (ptopology)
		*ptopology = topology;
	if (psize)
		*psize = size;
	if (pis_sd)
		*pis_sd = is_sd;

	return 0;
}

int comphy_update_map(struct comphy_map *serdes_map, int count)
{
	int ret, i, size, sfpindex = -1, swindex = -1;
	const u8 *topology;

	ret = mox_get_topology(&topology, &size, NULL);
	if (ret)
		return ret;

	for (i = 0; i < size; ++i) {
		if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
			sfpindex = i;
		else if ((topology[i] == MOX_MODULE_TOPAZ ||
			  topology[i] == MOX_MODULE_PERIDOT) &&
			 swindex == -1)
			swindex = i;
	}

	if (sfpindex >= 0 && swindex >= 0) {
		if (sfpindex < swindex)
			serdes_map[0].speed = PHY_SPEED_1_25G;
		else
			serdes_map[0].speed = PHY_SPEED_3_125G;
	} else if (sfpindex >= 0) {
		serdes_map[0].speed = PHY_SPEED_1_25G;
	} else if (swindex >= 0) {
		serdes_map[0].speed = PHY_SPEED_3_125G;
	}

	return 0;
}

#define SW_SMI_CMD_R(d, r)	(0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
#define SW_SMI_CMD_W(d, r)	(0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))

static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
{
	bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
	mdelay(5);
	return bus->read(bus, sw, 0, 1);
}

static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
			   u16 val)
{
	bus->write(bus, sw, 0, 1, val);
	bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
	mdelay(5);
}

static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
{
	sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
	return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
}

static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
			 u16 val)
{
	sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12)
					    | (val & 0x7ff));
}

static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
{
	int i, p;
	struct {
		int port;
		u16 val;
		int wait;
	} regs[] = {
		{ 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
		{ 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
		{ 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
		{ 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
	};

	for (i = 0; i < 12; ++i) {
		for (p = 0; p < peridot; ++p) {
			sw_led_write(bus, 0x10 + p, regs[i].port, 0,
				     regs[i].val);
			sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
				     regs[i].val);
		}
		if (topaz) {
			sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
				     regs[i].val);
		}

		if (regs[i].wait)
			mdelay(75);
	}
}

static void check_switch_address(struct mii_dev *bus, int addr)
{
	if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
		printf("Check of switch MDIO address failed for 0x%02x\n",
		       addr);
}

static int sfp, pci, topaz, peridot, usb, passpci;
static int sfp_pos, peridot_pos[3];
static int module_count;

static int configure_peridots(struct gpio_desc *reset_gpio)
{
	int i, ret;
	u8 dout[MAX_MOX_MODULES];

	memset(dout, 0, MAX_MOX_MODULES);

	/* set addresses of Peridot modules */
	for (i = 0; i < peridot; ++i)
		dout[module_count - peridot_pos[i]] = (~i) & 3;

	/*
	 * if there is a SFP module connected to the last Peridot module, set
	 * the P10_SMODE to 1 for the Peridot module
	 */
	if (sfp)
		dout[module_count - peridot_pos[i - 1]] |= 1 << 3;

	dm_gpio_set_value(reset_gpio, 1);
	mdelay(10);

	ret = mox_do_spi(NULL, dout, module_count + 1);

	mdelay(10);
	dm_gpio_set_value(reset_gpio, 0);

	mdelay(50);

	return ret;
}

static int get_reset_gpio(struct gpio_desc *reset_gpio)
{
	int node;

	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
	if (node < 0) {
		printf("Cannot find Moxtet bus device node!\n");
		return -1;
	}

	gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
				   reset_gpio, GPIOD_IS_OUT);

	if (!dm_gpio_is_valid(reset_gpio)) {
		printf("Cannot find reset GPIO for Moxtet bus!\n");
		return -1;
	}

	return 0;
}

int misc_init_r(void)
{
	int ret;
	u8 mac1[6], mac2[6];

	ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
	if (ret < 0) {
		printf("Cannot read data from OTP!\n");
		return 0;
	}

	if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
		eth_env_set_enetaddr("ethaddr", mac1);

	if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
		eth_env_set_enetaddr("eth1addr", mac2);

	return 0;
}

static void mox_print_info(void)
{
	int ret, board_version, ram_size;
	u64 serial_number;
	const char *pub_key;

	ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
				     &ram_size);
	if (ret < 0)
		return;

	printf("Turris Mox:\n");
	printf("  Board version: %i\n", board_version);
	printf("  RAM size: %i MiB\n", ram_size);
	printf("  Serial Number: %016llX\n", serial_number);

	pub_key = mox_sp_get_ecdsa_public_key();
	if (pub_key)
		printf("  ECDSA Public Key: %s\n", pub_key);
	else
		printf("Cannot read ECDSA Public Key\n");
}

int last_stage_init(void)
{
	int ret, i;
	const u8 *topology;
	int is_sd;
	struct mii_dev *bus;
	struct gpio_desc reset_gpio = {};

	mox_print_info();

	ret = mox_get_topology(&topology, &module_count, &is_sd);
	if (ret) {
		printf("Cannot read module topology!\n");
		return 0;
	}

	printf("  SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");

	if (module_count)
		printf("Module Topology:\n");

	for (i = 0; i < module_count; ++i) {
		switch (topology[i]) {
		case MOX_MODULE_SFP:
			printf("% 4i: SFP Module\n", i + 1);
			break;
		case MOX_MODULE_PCI:
			printf("% 4i: Mini-PCIe Module\n", i + 1);
			break;
		case MOX_MODULE_TOPAZ:
			printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
			break;
		case MOX_MODULE_PERIDOT:
			printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
			break;
		case MOX_MODULE_USB3:
			printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
			break;
		case MOX_MODULE_PASSPCI:
			printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
			break;
		default:
			printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
		}
	}

	/* now check if modules are connected in supported mode */

	for (i = 0; i < module_count; ++i) {
		switch (topology[i]) {
		case MOX_MODULE_SFP:
			if (sfp) {
				printf("Error: Only one SFP module is supported!\n");
			} else if (topaz) {
				printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
			} else {
				sfp_pos = i;
				++sfp;
			}
			break;
		case MOX_MODULE_PCI:
			if (pci)
				printf("Error: Only one Mini-PCIe module is supported!\n");
			else if (usb)
				printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
			else if (i && (i != 1 || !passpci))
				printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
			else
				++pci;
			break;
		case MOX_MODULE_TOPAZ:
			if (topaz)
				printf("Error: Only one Topaz module is supported!\n");
			else if (peridot >= 3)
				printf("Error: At most two Peridot modules can come before Topaz module!\n");
			else
				++topaz;
			break;
		case MOX_MODULE_PERIDOT:
			if (sfp || topaz) {
				printf("Error: Peridot module must come before SFP or Topaz module!\n");
			} else if (peridot >= 3) {
				printf("Error: At most three Peridot modules are supported!\n");
			} else {
				peridot_pos[peridot] = i;
				++peridot;
			}
			break;
		case MOX_MODULE_USB3:
			if (pci)
				printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
			else if (usb)
				printf("Error: Only one USB 3.0 module is supported!\n");
			else if (i && (i != 1 || !passpci))
				printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
			else
				++usb;
			break;
		case MOX_MODULE_PASSPCI:
			if (passpci)
				printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
			else if (i != 0)
				printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
			else
				++passpci;
		}
	}

	/* now configure modules */

	if (get_reset_gpio(&reset_gpio) < 0)
		return 0;

	if (peridot > 0) {
		if (configure_peridots(&reset_gpio) < 0) {
			printf("Cannot configure Peridot modules!\n");
			peridot = 0;
		}
	} else {
		dm_gpio_set_value(&reset_gpio, 1);
		mdelay(50);
		dm_gpio_set_value(&reset_gpio, 0);
		mdelay(50);
	}

	if (peridot || topaz) {
		/*
		 * now check if the addresses are set by reading Scratch & Misc
		 * register 0x70 of Peridot (and potentially Topaz) modules
		 */

		bus = miiphy_get_dev_by_name("neta@30000");
		if (!bus) {
			printf("Cannot get MDIO bus device!\n");
		} else {
			for (i = 0; i < peridot; ++i)
				check_switch_address(bus, 0x10 + i);

			if (topaz)
				check_switch_address(bus, 0x2);

			sw_blink_leds(bus, peridot, topaz);
		}
	}

	printf("\n");

	return 0;
}

#if defined(CONFIG_OF_BOARD_SETUP)

static int vnode_by_path(void *blob, const char *fmt, va_list ap)
{
	char path[128];

	vsnprintf(path, 128, fmt, ap);
	return fdt_path_offset(blob, path);
}

static int node_by_path(void *blob, const char *fmt, ...)
{
	va_list ap;
	int res;

	va_start(ap, fmt);
	res = vnode_by_path(blob, fmt, ap);
	va_end(ap);

	return res;
}

static int phandle_by_path(void *blob, const char *fmt, ...)
{
	va_list ap;
	int node, phandle, res;

	va_start(ap, fmt);
	node = vnode_by_path(blob, fmt, ap);
	va_end(ap);

	if (node < 0)
		return node;

	phandle = fdt_get_phandle(blob, node);
	if (phandle > 0)
		return phandle;

	phandle = fdt_get_max_phandle(blob);
	if (phandle < 0)
		return phandle;

	phandle += 1;

	res = fdt_setprop_u32(blob, node, "linux,phandle", phandle);
	if (res < 0)
		return res;

	res = fdt_setprop_u32(blob, node, "phandle", phandle);
	if (res < 0)
		return res;

	return phandle;
}

static int enable_by_path(void *blob, const char *fmt, ...)
{
	va_list ap;
	int node;

	va_start(ap, fmt);
	node = vnode_by_path(blob, fmt, ap);
	va_end(ap);

	if (node < 0)
		return node;

	return fdt_setprop_string(blob, node, "status", "okay");
}

static bool is_topaz(int id)
{
	return topaz && id == peridot + topaz - 1;
}

static int switch_addr(int id)
{
	return is_topaz(id) ? 0x2 : 0x10 + id;
}

static int setup_switch(void *blob, int id)
{
	int res, addr, i, node, phandle;

	addr = switch_addr(id);

	/* first enable the switch by setting status = "okay" */
	res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr);
	if (res < 0)
		return res;

	/*
	 * now if there are more switches or a SFP module coming after,
	 * enable corresponding ports
	 */
	if (id < peridot + topaz - 1) {
		res = enable_by_path(blob,
				     MDIO_PATH "/switch%i@%x/ports/port@a",
				     id, addr);
	} else if (id == peridot - 1 && !topaz && sfp) {
		res = enable_by_path(blob,
				     MDIO_PATH "/switch%i@%x/ports/port-sfp@a",
				     id, addr);
	} else {
		res = 0;
	}
	if (res < 0)
		return res;

	if (id >= peridot + topaz - 1)
		return 0;

	/* finally change link property if needed */
	node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id,
			    addr);
	if (node < 0)
		return node;

	for (i = id + 1; i < peridot + topaz; ++i) {
		phandle = phandle_by_path(blob,
					  MDIO_PATH "/switch%i@%x/ports/port@%x",
					  i, switch_addr(i),
					  is_topaz(i) ? 5 : 9);
		if (phandle < 0)
			return phandle;

		if (i == id + 1)
			res = fdt_setprop_u32(blob, node, "link", phandle);
		else
			res = fdt_appendprop_u32(blob, node, "link", phandle);
		if (res < 0)
			return res;
	}

	return 0;
}

static int remove_disabled_nodes(void *blob)
{
	while (1) {
		int res, offset;

		offset = fdt_node_offset_by_prop_value(blob, -1, "status",
						       "disabled", 9);
		if (offset < 0)
			break;

		res = fdt_del_node(blob, offset);
		if (res < 0)
			return res;
	}

	return 0;
}

int ft_board_setup(void *blob, struct bd_info *bd)
{
	int node, phandle, res;

	/*
	 * If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are
	 * connected, enable the PCIe node.
	 */
	if (pci || usb || passpci) {
		node = fdt_path_offset(blob, PCIE_PATH);
		if (node < 0)
			return node;

		res = fdt_setprop_string(blob, node, "status", "okay");
		if (res < 0)
			return res;

		/* Fix PCIe regions for devices with 4 GB RAM */
		res = a3700_fdt_fix_pcie_regions(blob);
		if (res < 0)
			return res;
	}

	/*
	 * If MOX C (Topaz switch) and/or MOX E (Peridot switch) are connected,
	 * enable the eth1 node and setup the switches.
	 */
	if (peridot || topaz) {
		int i;

		res = enable_by_path(blob, ETH1_PATH);
		if (res < 0)
			return res;

		for (i = 0; i < peridot + topaz; ++i) {
			res = setup_switch(blob, i);
			if (res < 0)
				return res;
		}
	}

	/*
	 * If MOX D (SFP cage module) is connected, enable the SFP node and eth1
	 * node. If there is no Peridot switch between MOX A and MOX D, add link
	 * to the SFP node to eth1 node.
	 * Also enable and configure SFP GPIO controller node.
	 */
	if (sfp) {
		res = enable_by_path(blob, SFP_PATH);
		if (res < 0)
			return res;

		res = enable_by_path(blob, ETH1_PATH);
		if (res < 0)
			return res;

		if (!peridot) {
			phandle = phandle_by_path(blob, SFP_PATH);
			if (phandle < 0)
				return res;

			node = node_by_path(blob, ETH1_PATH);
			if (node < 0)
				return node;

			res = fdt_setprop_u32(blob, node, "sfp", phandle);
			if (res < 0)
				return res;

			res = fdt_setprop_string(blob, node, "phy-mode",
						 "sgmii");
			if (res < 0)
				return res;
		}

		res = enable_by_path(blob, SFP_GPIO_PATH);
		if (res < 0)
			return res;

		if (sfp_pos) {
			char newname[16];

			/* moxtet-sfp is on non-zero position, change default */
			node = node_by_path(blob, SFP_GPIO_PATH);
			if (node < 0)
				return node;

			res = fdt_setprop_u32(blob, node, "reg", sfp_pos);
			if (res < 0)
				return res;

			sprintf(newname, "gpio@%x", sfp_pos);

			res = fdt_set_name(blob, node, newname);
			if (res < 0)
				return res;
		}
	}

	fdt_fixup_ethernet(blob);

	/* Finally remove disabled nodes, as per Rob Herring's request. */
	remove_disabled_nodes(blob);

	return 0;
}

#endif
Commit	Line	Data
80af1a9e MB	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Copyright (C) 2018 Marek Behun <[email protected]>
	4	*/
	5
	6	#include <common.h>
c64ac3b3	7	#include <asm/arch/cpu.h>
96578410	8	#include <asm/arch/soc.h>
90526e9f	9	#include <net.h>
401d1c4f	10	#include <asm/global_data.h>
863949e3	11	#include <asm/io.h>
c8a185a8	12	#include <asm/gpio.h>
80af1a9e	13	#include <clk.h>
c8a185a8	14	#include <dm.h>
9fb625ce	15	#include <env.h>
863949e3	16	#include <fdt_support.h>
c8a185a8	17	#include <init.h>
c05ed00a	18	#include <linux/delay.h>
c8a185a8 MB	19	#include <linux/libfdt.h>
	20	#include <linux/string.h>
	21	#include <miiphy.h>
	22	#include <mvebu/comphy.h>
	23	#include <spi.h>
80af1a9e	24
c87b8700 MB	25	#include "mox_sp.h"
c87b8700 MB	26
863949e3 MB	27	#define MAX_MOX_MODULES 10
	28
	29	#define MOX_MODULE_SFP 0x1
	30	#define MOX_MODULE_PCI 0x2
	31	#define MOX_MODULE_TOPAZ 0x3
	32	#define MOX_MODULE_PERIDOT 0x4
	33	#define MOX_MODULE_USB3 0x5
	34	#define MOX_MODULE_PASSPCI 0x6
	35
96578410 MB	36	#define ARMADA_37XX_NB_GPIO_SEL (MVEBU_REGISTER(0x13830))
	37	#define ARMADA_37XX_SPI_CTRL (MVEBU_REGISTER(0x10600))
	38	#define ARMADA_37XX_SPI_CFG (MVEBU_REGISTER(0x10604))
	39	#define ARMADA_37XX_SPI_DOUT (MVEBU_REGISTER(0x10608))
	40	#define ARMADA_37XX_SPI_DIN (MVEBU_REGISTER(0x1060c))
863949e3	41
2b3f2dd1 MB	42	#define ETH1_PATH "/soc/internal-regs@d0000000/ethernet@40000"
	43	#define MDIO_PATH "/soc/internal-regs@d0000000/mdio@32004"
	44	#define SFP_GPIO_PATH "/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0"
863949e3	45	#define PCIE_PATH "/soc/pcie@d0070000"
2b3f2dd1	46	#define SFP_PATH "/sfp"
863949e3	47
80af1a9e MB	48	DECLARE_GLOBAL_DATA_PTR;
80af1a9e MB	49
863949e3 MB	50	#if defined(CONFIG_OF_BOARD_FIXUP)
	51	int board_fix_fdt(void *blob)
	52	{
	53	u8 topology[MAX_MOX_MODULES];
	54	int i, size, node;
	55	bool enable;
	56
	57	/*
	58	* SPI driver is not loaded in driver model yet, but we have to find out
	59	* if pcie should be enabled in U-Boot's device tree. Therefore we have
	60	* to read SPI by reading/writing SPI registers directly
	61	*/
	62
863949e3	63	writel(0x10df, ARMADA_37XX_SPI_CFG);
b80ca817 MB	64	/* put pin from GPIO to SPI mode */
	65	clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
	66	/* enable SPI CS1 */
	67	setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
863949e3 MB	68
	69	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
	70	udelay(1);
	71
	72	for (i = 0; i < MAX_MOX_MODULES; ++i) {
	73	writel(0x0, ARMADA_37XX_SPI_DOUT);
	74
	75	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
	76	udelay(1);
	77
	78	topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
	79	if (topology[i] == 0xff)
	80	break;
	81
	82	topology[i] &= 0xf;
	83	}
	84
	85	size = i;
	86
b80ca817 MB	87	/* disable SPI CS1 */
b80ca817 MB	88	clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
863949e3 MB	89
	90	if (size > 1 && (topology[1] == MOX_MODULE_PCI \|\|
	91	topology[1] == MOX_MODULE_USB3 \|\|
	92	topology[1] == MOX_MODULE_PASSPCI))
	93	enable = true;
	94	else
	95	enable = false;
	96
	97	node = fdt_path_offset(blob, PCIE_PATH);
	98
	99	if (node < 0) {
	100	printf("Cannot find PCIe node in U-Boot's device tree!\n");
	101	return 0;
	102	}
	103
	104	if (fdt_setprop_string(blob, node, "status",
	105	enable ? "okay" : "disabled") < 0) {
	106	printf("Cannot %s PCIe in U-Boot's device tree!\n",
	107	enable ? "enable" : "disable");
	108	return 0;
	109	}
	110
c64ac3b3 MB	111	if (a3700_fdt_fix_pcie_regions(blob) < 0) {
	112	printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
	113	return 0;
	114	}
	115
863949e3 MB	116	return 0;
	117	}
	118	#endif
	119
80af1a9e MB	120	int board_init(void)
	121	{
	122	/* address of boot parameters */
	123	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
	124
80af1a9e MB	125	return 0;
	126	}
	127
296c64ea	128	static int mox_do_spi(u8 in, u8 out, size_t size)
80af1a9e MB	129	{
	130	struct spi_slave *slave;
	131	struct udevice *dev;
296c64ea	132	int ret;
80af1a9e	133
296c64ea MB	134	ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA \| SPI_CPOL,
	135	"spi_generic_drv", "moxtet@1", &dev,
	136	&slave);
80af1a9e MB	137	if (ret)
	138	goto fail;
	139
	140	ret = spi_claim_bus(slave);
	141	if (ret)
	142	goto fail_free;
	143
296c64ea MB	144	ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);
	145
	146	spi_release_bus(slave);
	147	fail_free:
	148	spi_free_slave(slave);
	149	fail:
	150	return ret;
	151	}
	152
	153	static int mox_get_topology(const u8 *ptopology, int psize, int *pis_sd)
	154	{
	155	static int is_sd;
	156	static u8 topology[MAX_MOX_MODULES - 1];
	157	static int size;
	158	u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
	159	int ret, i;
80af1a9e	160
296c64ea MB	161	if (size) {
	162	if (ptopology)
	163	*ptopology = topology;
	164	if (psize)
	165	*psize = size;
	166	if (pis_sd)
	167	*pis_sd = is_sd;
	168	return 0;
	169	}
	170
	171	memset(din, 0, MAX_MOX_MODULES);
	172	memset(dout, 0, MAX_MOX_MODULES);
	173
	174	ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
80af1a9e	175	if (ret)
296c64ea MB	176	return ret;
	177
	178	if (din[0] == 0x10)
	179	is_sd = 1;
	180	else if (din[0] == 0x00)
	181	is_sd = 0;
	182	else
	183	return -ENODEV;
	184
	185	for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
	186	topology[i - 1] = din[i] & 0xf;
	187	size = i - 1;
	188
	189	if (ptopology)
	190	*ptopology = topology;
	191	if (psize)
	192	*psize = size;
	193	if (pis_sd)
	194	*pis_sd = is_sd;
	195
9433cd11 MB	196	return 0;
	197	}
	198
	199	int comphy_update_map(struct comphy_map *serdes_map, int count)
	200	{
	201	int ret, i, size, sfpindex = -1, swindex = -1;
	202	const u8 *topology;
	203
	204	ret = mox_get_topology(&topology, &size, NULL);
	205	if (ret)
	206	return ret;
	207
	208	for (i = 0; i < size; ++i) {
	209	if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
	210	sfpindex = i;
	211	else if ((topology[i] == MOX_MODULE_TOPAZ \|\|
	212	topology[i] == MOX_MODULE_PERIDOT) &&
	213	swindex == -1)
	214	swindex = i;
	215	}
	216
	217	if (sfpindex >= 0 && swindex >= 0) {
	218	if (sfpindex < swindex)
	219	serdes_map[0].speed = PHY_SPEED_1_25G;
	220	else
	221	serdes_map[0].speed = PHY_SPEED_3_125G;
	222	} else if (sfpindex >= 0) {
	223	serdes_map[0].speed = PHY_SPEED_1_25G;
	224	} else if (swindex >= 0) {
	225	serdes_map[0].speed = PHY_SPEED_3_125G;
	226	}
	227
296c64ea MB	228	return 0;
296c64ea MB	229	}
80af1a9e	230
7dd7c2e7 MB	231	#define SW_SMI_CMD_R(d, r) (0x9800 \| (((d) & 0x1f) << 5) \| ((r) & 0x1f))
	232	#define SW_SMI_CMD_W(d, r) (0x9400 \| (((d) & 0x1f) << 5) \| ((r) & 0x1f))
	233
	234	static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
	235	{
	236	bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
	237	mdelay(5);
	238	return bus->read(bus, sw, 0, 1);
	239	}
	240
	241	static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
	242	u16 val)
	243	{
	244	bus->write(bus, sw, 0, 1, val);
	245	bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
	246	mdelay(5);
	247	}
	248
	249	static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
	250	{
	251	sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
	252	return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
	253	}
	254
	255	static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
	256	u16 val)
	257	{
	258	sw_multi_write(bus, sw, port, 0x16, 0x8000 \| ((reg & 7) << 12)
	259	\| (val & 0x7ff));
	260	}
	261
	262	static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
	263	{
	264	int i, p;
	265	struct {
	266	int port;
	267	u16 val;
	268	int wait;
	269	} regs[] = {
	270	{ 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
	271	{ 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
	272	{ 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
	273	{ 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
	274	};
	275
	276	for (i = 0; i < 12; ++i) {
	277	for (p = 0; p < peridot; ++p) {
	278	sw_led_write(bus, 0x10 + p, regs[i].port, 0,
	279	regs[i].val);
	280	sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
	281	regs[i].val);
	282	}
	283	if (topaz) {
	284	sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
	285	regs[i].val);
	286	}
	287
	288	if (regs[i].wait)
	289	mdelay(75);
	290	}
	291	}
	292
	293	static void check_switch_address(struct mii_dev *bus, int addr)
	294	{
295	if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
296	printf("Check of switch MDIO address failed for 0x%02x\n",
297	addr);
298	}
299
300	static int sfp, pci, topaz, peridot, usb, passpci;
301	static int sfp_pos, peridot_pos[3];
302	static int module_count;
303
304	static int configure_peridots(struct gpio_desc *reset_gpio)
305	{
306	int i, ret;
307	u8 dout[MAX_MOX_MODULES];
308
309	memset(dout, 0, MAX_MOX_MODULES);
310
311	/* set addresses of Peridot modules */
312	for (i = 0; i < peridot; ++i)
313	dout[module_count - peridot_pos[i]] = (~i) & 3;
314
315	/*
316	* if there is a SFP module connected to the last Peridot module, set
317	* the P10_SMODE to 1 for the Peridot module
318	*/
319	if (sfp)
320	dout[module_count - peridot_pos[i - 1]] \|= 1 << 3;
321
322	dm_gpio_set_value(reset_gpio, 1);
323	mdelay(10);
324
325	ret = mox_do_spi(NULL, dout, module_count + 1);
326
327	mdelay(10);
328	dm_gpio_set_value(reset_gpio, 0);
329
330	mdelay(50);
331
332	return ret;
333	}
334
335	static int get_reset_gpio(struct gpio_desc *reset_gpio)
336	{
337	int node;
338
339	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
340	if (node < 0) {
341	printf("Cannot find Moxtet bus device node!\n");
342	return -1;
343	}
344
345	gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
346	reset_gpio, GPIOD_IS_OUT);
347
348	if (!dm_gpio_is_valid(reset_gpio)) {
349	printf("Cannot find reset GPIO for Moxtet bus!\n");
350	return -1;
351	}
352
353	return 0;
354	}
355
c87b8700 MB	356	int misc_init_r(void)
	357	{
	358	int ret;
	359	u8 mac1[6], mac2[6];
	360
	361	ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
	362	if (ret < 0) {
	363	printf("Cannot read data from OTP!\n");
	364	return 0;
	365	}
	366
	367	if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
	368	eth_env_set_enetaddr("ethaddr", mac1);
	369
	370	if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
	371	eth_env_set_enetaddr("eth1addr", mac2);
	372
	373	return 0;
	374	}
	375
	376	static void mox_print_info(void)
	377	{
	378	int ret, board_version, ram_size;
	379	u64 serial_number;
	380	const char *pub_key;
	381
	382	ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
	383	&ram_size);
	384	if (ret < 0)
	385	return;
	386
	387	printf("Turris Mox:\n");
	388	printf(" Board version: %i\n", board_version);
	389	printf(" RAM size: %i MiB\n", ram_size);
	390	printf(" Serial Number: %016llX\n", serial_number);
	391
	392	pub_key = mox_sp_get_ecdsa_public_key();
	393	if (pub_key)
	394	printf(" ECDSA Public Key: %s\n", pub_key);
	395	else
	396	printf("Cannot read ECDSA Public Key\n");
	397	}
	398
296c64ea MB	399	int last_stage_init(void)
	400	{
	401	int ret, i;
	402	const u8 *topology;
7dd7c2e7 MB	403	int is_sd;
	404	struct mii_dev *bus;
	405	struct gpio_desc reset_gpio = {};
296c64ea	406
c87b8700 MB	407	mox_print_info();
c87b8700 MB	408
296c64ea MB	409	ret = mox_get_topology(&topology, &module_count, &is_sd);
	410	if (ret) {
	411	printf("Cannot read module topology!\n");
	412	return 0;
	413	}
80af1a9e	414
c87b8700 MB	415	printf(" SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");
	416
	417	if (module_count)
	418	printf("Module Topology:\n");
	419
296c64ea MB	420	for (i = 0; i < module_count; ++i) {
	421	switch (topology[i]) {
	422	case MOX_MODULE_SFP:
	423	printf("% 4i: SFP Module\n", i + 1);
	424	break;
	425	case MOX_MODULE_PCI:
	426	printf("% 4i: Mini-PCIe Module\n", i + 1);
	427	break;
	428	case MOX_MODULE_TOPAZ:
	429	printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
80af1a9e	430	break;
296c64ea MB	431	case MOX_MODULE_PERIDOT:
296c64ea MB	432	printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
80af1a9e	433	break;
296c64ea MB	434	case MOX_MODULE_USB3:
	435	printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
	436	break;
	437	case MOX_MODULE_PASSPCI:
	438	printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
80af1a9e MB	439	break;
80af1a9e MB	440	default:
296c64ea	441	printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
80af1a9e MB	442	}
80af1a9e MB	443	}
80af1a9e	444
7dd7c2e7 MB	445	/* now check if modules are connected in supported mode */
	446
	447	for (i = 0; i < module_count; ++i) {
	448	switch (topology[i]) {
	449	case MOX_MODULE_SFP:
	450	if (sfp) {
	451	printf("Error: Only one SFP module is supported!\n");
	452	} else if (topaz) {
	453	printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
	454	} else {
	455	sfp_pos = i;
	456	++sfp;
	457	}
	458	break;
	459	case MOX_MODULE_PCI:
2b3f2dd1	460	if (pci)
7dd7c2e7	461	printf("Error: Only one Mini-PCIe module is supported!\n");
2b3f2dd1	462	else if (usb)
7dd7c2e7	463	printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
2b3f2dd1	464	else if (i && (i != 1 \|\| !passpci))
7dd7c2e7	465	printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
2b3f2dd1	466	else
7dd7c2e7	467	++pci;
7dd7c2e7 MB	468	break;
7dd7c2e7 MB	469	case MOX_MODULE_TOPAZ:
2b3f2dd1	470	if (topaz)
7dd7c2e7	471	printf("Error: Only one Topaz module is supported!\n");
2b3f2dd1	472	else if (peridot >= 3)
7dd7c2e7	473	printf("Error: At most two Peridot modules can come before Topaz module!\n");
2b3f2dd1	474	else
7dd7c2e7	475	++topaz;
7dd7c2e7 MB	476	break;
	477	case MOX_MODULE_PERIDOT:
	478	if (sfp \|\| topaz) {
	479	printf("Error: Peridot module must come before SFP or Topaz module!\n");
	480	} else if (peridot >= 3) {
	481	printf("Error: At most three Peridot modules are supported!\n");
	482	} else {
	483	peridot_pos[peridot] = i;
	484	++peridot;
	485	}
	486	break;
	487	case MOX_MODULE_USB3:
2b3f2dd1	488	if (pci)
7dd7c2e7	489	printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
2b3f2dd1	490	else if (usb)
7dd7c2e7	491	printf("Error: Only one USB 3.0 module is supported!\n");
2b3f2dd1	492	else if (i && (i != 1 \|\| !passpci))
7dd7c2e7	493	printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
2b3f2dd1	494	else
7dd7c2e7	495	++usb;
7dd7c2e7 MB	496	break;
7dd7c2e7 MB	497	case MOX_MODULE_PASSPCI:
2b3f2dd1	498	if (passpci)
7dd7c2e7	499	printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
2b3f2dd1	500	else if (i != 0)
7dd7c2e7	501	printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
2b3f2dd1	502	else
7dd7c2e7	503	++passpci;
7dd7c2e7 MB	504	}
	505	}
	506
	507	/* now configure modules */
	508
	509	if (get_reset_gpio(&reset_gpio) < 0)
	510	return 0;
	511
	512	if (peridot > 0) {
	513	if (configure_peridots(&reset_gpio) < 0) {
	514	printf("Cannot configure Peridot modules!\n");
	515	peridot = 0;
	516	}
	517	} else {
	518	dm_gpio_set_value(&reset_gpio, 1);
	519	mdelay(50);
	520	dm_gpio_set_value(&reset_gpio, 0);
	521	mdelay(50);
	522	}
	523
	524	if (peridot \|\| topaz) {
	525	/*
	526	* now check if the addresses are set by reading Scratch & Misc
	527	* register 0x70 of Peridot (and potentially Topaz) modules
	528	*/
	529
	530	bus = miiphy_get_dev_by_name("neta@30000");
	531	if (!bus) {
	532	printf("Cannot get MDIO bus device!\n");
	533	} else {
	534	for (i = 0; i < peridot; ++i)
	535	check_switch_address(bus, 0x10 + i);
	536
	537	if (topaz)
	538	check_switch_address(bus, 0x2);
	539
	540	sw_blink_leds(bus, peridot, topaz);
	541	}
	542	}
	543
296c64ea	544	printf("\n");
80af1a9e	545
296c64ea	546	return 0;
80af1a9e	547	}
2b3f2dd1 MB	548
	549	#if defined(CONFIG_OF_BOARD_SETUP)
	550
	551	static int vnode_by_path(void blob, const char fmt, va_list ap)
	552	{
	553	char path[128];
	554
	555	vsnprintf(path, 128, fmt, ap);
	556	return fdt_path_offset(blob, path);
	557	}
	558
	559	static int node_by_path(void blob, const char fmt, ...)
	560	{
	561	va_list ap;
	562	int res;
	563
	564	va_start(ap, fmt);
	565	res = vnode_by_path(blob, fmt, ap);
	566	va_end(ap);
	567
	568	return res;
	569	}
	570
	571	static int phandle_by_path(void blob, const char fmt, ...)
	572	{
	573	va_list ap;
	574	int node, phandle, res;
	575
	576	va_start(ap, fmt);
	577	node = vnode_by_path(blob, fmt, ap);
	578	va_end(ap);
	579
	580	if (node < 0)
	581	return node;
	582
	583	phandle = fdt_get_phandle(blob, node);
	584	if (phandle > 0)
	585	return phandle;
	586
	587	phandle = fdt_get_max_phandle(blob);
	588	if (phandle < 0)
	589	return phandle;
	590
	591	phandle += 1;
	592
	593	res = fdt_setprop_u32(blob, node, "linux,phandle", phandle);
	594	if (res < 0)
	595	return res;
	596
	597	res = fdt_setprop_u32(blob, node, "phandle", phandle);
	598	if (res < 0)
	599	return res;
	600
	601	return phandle;
	602	}
	603
	604	static int enable_by_path(void blob, const char fmt, ...)
	605	{
	606	va_list ap;
	607	int node;
	608
	609	va_start(ap, fmt);
	610	node = vnode_by_path(blob, fmt, ap);
	611	va_end(ap);
612
613	if (node < 0)
614	return node;
615
616	return fdt_setprop_string(blob, node, "status", "okay");
617	}
618
619	static bool is_topaz(int id)
620	{
621	return topaz && id == peridot + topaz - 1;
622	}
623
624	static int switch_addr(int id)
625	{
626	return is_topaz(id) ? 0x2 : 0x10 + id;
627	}
628
629	static int setup_switch(void *blob, int id)
630	{
631	int res, addr, i, node, phandle;
632
633	addr = switch_addr(id);
634
635	/* first enable the switch by setting status = "okay" */
636	res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr);
637	if (res < 0)
638	return res;
639
640	/*
641	* now if there are more switches or a SFP module coming after,
642	* enable corresponding ports
643	*/
644	if (id < peridot + topaz - 1) {
645	res = enable_by_path(blob,
646	MDIO_PATH "/switch%i@%x/ports/port@a",
647	id, addr);
648	} else if (id == peridot - 1 && !topaz && sfp) {
649	res = enable_by_path(blob,
650	MDIO_PATH "/switch%i@%x/ports/port-sfp@a",
651	id, addr);
652	} else {
653	res = 0;
654	}
655	if (res < 0)
656	return res;
657
658	if (id >= peridot + topaz - 1)
659	return 0;
660
661	/* finally change link property if needed */
662	node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id,
663	addr);
664	if (node < 0)
665	return node;
666
667	for (i = id + 1; i < peridot + topaz; ++i) {
668	phandle = phandle_by_path(blob,
669	MDIO_PATH "/switch%i@%x/ports/port@%x",
670	i, switch_addr(i),
671	is_topaz(i) ? 5 : 9);
672	if (phandle < 0)
673	return phandle;
674
675	if (i == id + 1)
676	res = fdt_setprop_u32(blob, node, "link", phandle);
677	else
678	res = fdt_appendprop_u32(blob, node, "link", phandle);
679	if (res < 0)
680	return res;
681	}
682
683	return 0;
684	}
685
686	static int remove_disabled_nodes(void *blob)
687	{
688	while (1) {
689	int res, offset;
690
691	offset = fdt_node_offset_by_prop_value(blob, -1, "status",
692	"disabled", 9);
693	if (offset < 0)
694	break;
695
696	res = fdt_del_node(blob, offset);
697	if (res < 0)
698	return res;
699	}
700
701	return 0;
702	}
703
b75d8dc5	704	int ft_board_setup(void blob, struct bd_info bd)
2b3f2dd1 MB	705	{
	706	int node, phandle, res;
	707
	708	/*
	709	* If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are
	710	* connected, enable the PCIe node.
	711	*/
	712	if (pci \|\| usb \|\| passpci) {
	713	node = fdt_path_offset(blob, PCIE_PATH);
	714	if (node < 0)
	715	return node;
	716
	717	res = fdt_setprop_string(blob, node, "status", "okay");
	718	if (res < 0)
	719	return res;
c64ac3b3 MB	720
	721	/* Fix PCIe regions for devices with 4 GB RAM */
	722	res = a3700_fdt_fix_pcie_regions(blob);
	723	if (res < 0)
	724	return res;
2b3f2dd1 MB	725	}
	726
	727	/*
	728	* If MOX C (Topaz switch) and/or MOX E (Peridot switch) are connected,
	729	* enable the eth1 node and setup the switches.
	730	*/
	731	if (peridot \|\| topaz) {
	732	int i;
	733
	734	res = enable_by_path(blob, ETH1_PATH);
	735	if (res < 0)
	736	return res;
	737
	738	for (i = 0; i < peridot + topaz; ++i) {
	739	res = setup_switch(blob, i);
	740	if (res < 0)
	741	return res;
	742	}
	743	}
	744
	745	/*
	746	* If MOX D (SFP cage module) is connected, enable the SFP node and eth1
	747	* node. If there is no Peridot switch between MOX A and MOX D, add link
	748	* to the SFP node to eth1 node.
	749	* Also enable and configure SFP GPIO controller node.
	750	*/
	751	if (sfp) {
	752	res = enable_by_path(blob, SFP_PATH);
	753	if (res < 0)
	754	return res;
	755
	756	res = enable_by_path(blob, ETH1_PATH);
	757	if (res < 0)
	758	return res;
	759
	760	if (!peridot) {
	761	phandle = phandle_by_path(blob, SFP_PATH);
	762	if (phandle < 0)
	763	return res;
	764
	765	node = node_by_path(blob, ETH1_PATH);
	766	if (node < 0)
	767	return node;
	768
	769	res = fdt_setprop_u32(blob, node, "sfp", phandle);
	770	if (res < 0)
	771	return res;
	772
	773	res = fdt_setprop_string(blob, node, "phy-mode",
	774	"sgmii");
	775	if (res < 0)
	776	return res;
	777	}
	778
	779	res = enable_by_path(blob, SFP_GPIO_PATH);
	780	if (res < 0)
	781	return res;
	782
	783	if (sfp_pos) {
	784	char newname[16];
	785
	786	/* moxtet-sfp is on non-zero position, change default */
	787	node = node_by_path(blob, SFP_GPIO_PATH);
	788	if (node < 0)
789	return node;
790
791	res = fdt_setprop_u32(blob, node, "reg", sfp_pos);
792	if (res < 0)
793	return res;
794
795	sprintf(newname, "gpio@%x", sfp_pos);
796
797	res = fdt_set_name(blob, node, newname);
798	if (res < 0)
799	return res;
800	}
801	}
802
803	fdt_fixup_ethernet(blob);
804
805	/* Finally remove disabled nodes, as per Rob Herring's request. */
806	remove_disabled_nodes(blob);
807
808	return 0;
809	}
810
811	#endif