[J-u-boot.git] / drivers / rtc / rx8025.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2007
 * Matthias Fuchs, esd gmbh, [email protected].
 */

/*
 * Epson RX8025 RTC driver.
 */

#include <command.h>
#include <dm.h>
#include <i2c.h>
#include <rtc.h>

/*---------------------------------------------------------------------*/
#undef DEBUG_RTC

#ifdef DEBUG_RTC
#define DEBUGR(fmt,args...) printf(fmt ,##args)
#else
#define DEBUGR(fmt,args...)
#endif
/*---------------------------------------------------------------------*/

enum rx_model {
	model_rx_8025,
	model_rx_8035,
};

/*
 * RTC register addresses
 */
#define RTC_SEC_REG_ADDR	0x00
#define RTC_MIN_REG_ADDR	0x01
#define RTC_HR_REG_ADDR		0x02
#define RTC_DAY_REG_ADDR	0x03
#define RTC_DATE_REG_ADDR	0x04
#define RTC_MON_REG_ADDR	0x05
#define RTC_YR_REG_ADDR		0x06
#define RTC_OFFSET_REG_ADDR	0x07

#define RTC_CTL1_REG_ADDR	0x0e
#define RTC_CTL2_REG_ADDR	0x0f

/*
 * Control register 1 bits
 */
#define RTC_CTL1_BIT_2412	0x20

/*
 * Control register 2 bits
 */
#define RTC_CTL2_BIT_PON	0x10
#define RTC_CTL2_BIT_VDET	0x40
#define RTC_CTL2_BIT_XST	0x20
#define RTC_CTL2_BIT_VDSL	0x80

/*
 * Note: the RX8025 I2C RTC requires register
 * reads and write to consist of a single bus
 * cycle. It is not allowed to write the register
 * address in a first cycle that is terminated by
 * a STOP condition. The chips needs a 'restart'
 * sequence (start sequence without a prior stop).
 */

#define rtc_read(reg) buf[(reg) & 0xf]

static int rtc_write(struct udevice *dev, uchar reg, uchar val);

static int rx8025_is_osc_stopped(enum rx_model model, int ctrl2)
{
	int xstp = ctrl2 & RTC_CTL2_BIT_XST;
	/* XSTP bit has different polarity on RX-8025 vs RX-8035.
	 * RX-8025: 0 == oscillator stopped
	 * RX-8035: 1 == oscillator stopped
	 */

	if (model == model_rx_8025)
		xstp = !xstp;

	return xstp;
}

/*
 * Get the current time from the RTC
 */
static int rx8025_rtc_get(struct udevice *dev, struct rtc_time *tmp)
{
	int rel = 0;
	uchar sec, min, hour, mday, wday, mon, year, ctl2;
	uchar buf[16];

	if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
		printf("Error reading from RTC\n");
		return -EIO;
	}

	sec = rtc_read(RTC_SEC_REG_ADDR);
	min = rtc_read(RTC_MIN_REG_ADDR);
	hour = rtc_read(RTC_HR_REG_ADDR);
	wday = rtc_read(RTC_DAY_REG_ADDR);
	mday = rtc_read(RTC_DATE_REG_ADDR);
	mon = rtc_read(RTC_MON_REG_ADDR);
	year = rtc_read(RTC_YR_REG_ADDR);

	DEBUGR("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	       "hr: %02x min: %02x sec: %02x\n",
	       year, mon, mday, wday, hour, min, sec);

	/* dump status */
	ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
	if (ctl2 & RTC_CTL2_BIT_PON) {
		printf("RTC: power-on detected\n");
		rel = -1;
	}

	if (ctl2 & RTC_CTL2_BIT_VDET) {
		printf("RTC: voltage drop detected\n");
		rel = -1;
	}
	if (rx8025_is_osc_stopped(dev->driver_data, ctl2)) {
		printf("RTC: oscillator stop detected\n");
		rel = -1;
	}

	tmp->tm_sec  = bcd2bin(sec & 0x7F);
	tmp->tm_min  = bcd2bin(min & 0x7F);
	if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
		tmp->tm_hour = bcd2bin(hour & 0x3F);
	else
		tmp->tm_hour = bcd2bin(hour & 0x1F) % 12 +
			       ((hour & 0x20) ? 12 : 0);

	tmp->tm_mday = bcd2bin (mday & 0x3F);
	tmp->tm_mon  = bcd2bin (mon & 0x1F);
	tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
	tmp->tm_wday = bcd2bin (wday & 0x07);
	tmp->tm_yday = 0;
	tmp->tm_isdst= 0;

	DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return rel;
}

/*
 * Set the RTC
 */
static int rx8025_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
{
	/* To work around the read/write cycle issue mentioned
	 * at the top of this file, write all the time registers
	 * in one I2C transaction
	 */
	u8 write_op[8];

	/* 2412 flag must be set before doing a RTC write,
	 * otherwise the seconds and minute register
	 * will be cleared when the flag is set
	 */
	if (rtc_write(dev, RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412))
		return -EIO;

	DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
		printf("WARNING: year should be between 1970 and 2069!\n");

	write_op[RTC_SEC_REG_ADDR]  = bin2bcd(tmp->tm_sec);
	write_op[RTC_MIN_REG_ADDR]  = bin2bcd(tmp->tm_min);
	write_op[RTC_HR_REG_ADDR]   = bin2bcd(tmp->tm_hour);
	write_op[RTC_DAY_REG_ADDR]	= bin2bcd(tmp->tm_wday);
	write_op[RTC_DATE_REG_ADDR]	= bin2bcd(tmp->tm_mday);
	write_op[RTC_MON_REG_ADDR]  = bin2bcd(tmp->tm_mon);
	write_op[RTC_YR_REG_ADDR]	= bin2bcd(tmp->tm_year % 100);
	write_op[RTC_OFFSET_REG_ADDR] = 0;

	return dm_i2c_write(dev, 0, &write_op[0], 8);
}

/*
 * Reset the RTC
 */
static int rx8025_rtc_reset(struct udevice *dev)
{
	uchar buf[16];
	uchar ctl2;

	if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
		printf("Error reading from RTC\n");
		return -EIO;
	}

	ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
	ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);

	if (dev->driver_data == model_rx_8035)
		ctl2 &= ~(RTC_CTL2_BIT_XST);
	else
		ctl2 |= RTC_CTL2_BIT_XST;

	return rtc_write(dev, RTC_CTL2_REG_ADDR, ctl2);
}

/*
 * Helper functions
 */
static int rtc_write(struct udevice *dev, uchar reg, uchar val)
{
	/* The RX8025/RX8035 uses the top 4 bits of the
	 * 'offset' byte as the start register address,
	 * and the bottom 4 bits as a 'transfer' mode setting
	 * (only applicable for reads)
	 */
	u8 offset = (reg << 4);

	if (dm_i2c_reg_write(dev, offset, val)) {
		printf("Error writing to RTC\n");
		return -EIO;
	}

	return 0;
}

static int rx8025_probe(struct udevice *dev)
{
	uchar buf[16];
	int ret = 0;

	if (i2c_get_chip_offset_len(dev) != 1)
		ret = i2c_set_chip_offset_len(dev, 1);

	if (ret)
		return ret;

	return dm_i2c_read(dev, 0, buf, sizeof(buf));
}

static const struct rtc_ops rx8025_rtc_ops = {
	.get = rx8025_rtc_get,
	.set = rx8025_rtc_set,
	.reset = rx8025_rtc_reset,
};

static const struct udevice_id rx8025_rtc_ids[] = {
	{ .compatible = "epson,rx8025", .data = model_rx_8025 },
	{ .compatible = "epson,rx8035", .data = model_rx_8035 },
	{ }
};

U_BOOT_DRIVER(rx8025_rtc) = {
	.name	  = "rx8025_rtc",
	.id	      = UCLASS_RTC,
	.probe    = rx8025_probe,
	.of_match = rx8025_rtc_ids,
	.ops	  = &rx8025_rtc_ops,
};
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
95c6bc7d MF	2	/*
	3	* (C) Copyright 2007
	4	* Matthias Fuchs, esd gmbh, [email protected].
95c6bc7d MF	5	*/
	6
	7	/*
	8	* Epson RX8025 RTC driver.
	9	*/
	10
95c6bc7d	11	#include <command.h>
0c4e81e0	12	#include <dm.h>
95c6bc7d	13	#include <i2c.h>
0c4e81e0	14	#include <rtc.h>
95c6bc7d	15
95c6bc7d MF	16	/---------------------------------------------------------------------/
	17	#undef DEBUG_RTC
	18
	19	#ifdef DEBUG_RTC
	20	#define DEBUGR(fmt,args...) printf(fmt ,##args)
	21	#else
	22	#define DEBUGR(fmt,args...)
	23	#endif
	24	/---------------------------------------------------------------------/
	25
9ca4ae2d MM	26	enum rx_model {
	27	model_rx_8025,
	28	model_rx_8035,
	29	};
	30
95c6bc7d MF	31	/*
	32	* RTC register addresses
	33	*/
	34	#define RTC_SEC_REG_ADDR 0x00
	35	#define RTC_MIN_REG_ADDR 0x01
	36	#define RTC_HR_REG_ADDR 0x02
	37	#define RTC_DAY_REG_ADDR 0x03
	38	#define RTC_DATE_REG_ADDR 0x04
	39	#define RTC_MON_REG_ADDR 0x05
	40	#define RTC_YR_REG_ADDR 0x06
771fc0c0	41	#define RTC_OFFSET_REG_ADDR 0x07
95c6bc7d MF	42
	43	#define RTC_CTL1_REG_ADDR 0x0e
	44	#define RTC_CTL2_REG_ADDR 0x0f
	45
	46	/*
	47	* Control register 1 bits
	48	*/
	49	#define RTC_CTL1_BIT_2412 0x20
	50
	51	/*
	52	* Control register 2 bits
	53	*/
	54	#define RTC_CTL2_BIT_PON 0x10
	55	#define RTC_CTL2_BIT_VDET 0x40
	56	#define RTC_CTL2_BIT_XST 0x20
	57	#define RTC_CTL2_BIT_VDSL 0x80
	58
	59	/*
	60	* Note: the RX8025 I2C RTC requires register
	61	* reads and write to consist of a single bus
	62	* cycle. It is not allowed to write the register
	63	* address in a first cycle that is terminated by
	64	* a STOP condition. The chips needs a 'restart'
	65	* sequence (start sequence without a prior stop).
95c6bc7d MF	66	*/
95c6bc7d MF	67
0c4e81e0	68	#define rtc_read(reg) buf[(reg) & 0xf]
95c6bc7d	69
152ef916	70	static int rtc_write(struct udevice *dev, uchar reg, uchar val);
95c6bc7d	71
9ca4ae2d MM	72	static int rx8025_is_osc_stopped(enum rx_model model, int ctrl2)
	73	{
	74	int xstp = ctrl2 & RTC_CTL2_BIT_XST;
	75	/* XSTP bit has different polarity on RX-8025 vs RX-8035.
	76	* RX-8025: 0 == oscillator stopped
	77	* RX-8035: 1 == oscillator stopped
	78	*/
	79
	80	if (model == model_rx_8025)
	81	xstp = !xstp;
	82
	83	return xstp;
	84	}
	85
95c6bc7d MF	86	/*
	87	* Get the current time from the RTC
	88	*/
152ef916	89	static int rx8025_rtc_get(struct udevice dev, struct rtc_time tmp)
95c6bc7d	90	{
b73a19e1	91	int rel = 0;
95c6bc7d MF	92	uchar sec, min, hour, mday, wday, mon, year, ctl2;
	93	uchar buf[16];
	94
0c4e81e0	95	if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
95c6bc7d	96	printf("Error reading from RTC\n");
0c4e81e0 HS	97	return -EIO;
0c4e81e0 HS	98	}
95c6bc7d MF	99
	100	sec = rtc_read(RTC_SEC_REG_ADDR);
	101	min = rtc_read(RTC_MIN_REG_ADDR);
	102	hour = rtc_read(RTC_HR_REG_ADDR);
	103	wday = rtc_read(RTC_DAY_REG_ADDR);
	104	mday = rtc_read(RTC_DATE_REG_ADDR);
	105	mon = rtc_read(RTC_MON_REG_ADDR);
	106	year = rtc_read(RTC_YR_REG_ADDR);
	107
f91fb724 HS	108	DEBUGR("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	109	"hr: %02x min: %02x sec: %02x\n",
	110	year, mon, mday, wday, hour, min, sec);
95c6bc7d MF	111
	112	/* dump status */
	113	ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
b73a19e1	114	if (ctl2 & RTC_CTL2_BIT_PON) {
95c6bc7d	115	printf("RTC: power-on detected\n");
b73a19e1 YT	116	rel = -1;
b73a19e1 YT	117	}
95c6bc7d	118
b73a19e1	119	if (ctl2 & RTC_CTL2_BIT_VDET) {
95c6bc7d	120	printf("RTC: voltage drop detected\n");
b73a19e1 YT	121	rel = -1;
b73a19e1 YT	122	}
9ca4ae2d	123	if (rx8025_is_osc_stopped(dev->driver_data, ctl2)) {
95c6bc7d	124	printf("RTC: oscillator stop detected\n");
b73a19e1 YT	125	rel = -1;
b73a19e1 YT	126	}
95c6bc7d	127
f91fb724 HS	128	tmp->tm_sec = bcd2bin(sec & 0x7F);
f91fb724 HS	129	tmp->tm_min = bcd2bin(min & 0x7F);
5875d358	130	if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
f91fb724	131	tmp->tm_hour = bcd2bin(hour & 0x3F);
5875d358	132	else
f91fb724	133	tmp->tm_hour = bcd2bin(hour & 0x1F) % 12 +
5875d358	134	((hour & 0x20) ? 12 : 0);
f91fb724	135
95c6bc7d MF	136	tmp->tm_mday = bcd2bin (mday & 0x3F);
	137	tmp->tm_mon = bcd2bin (mon & 0x1F);
	138	tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
	139	tmp->tm_wday = bcd2bin (wday & 0x07);
	140	tmp->tm_yday = 0;
	141	tmp->tm_isdst= 0;
	142
f91fb724 HS	143	DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	144	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	145	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
b73a19e1 YT	146
b73a19e1 YT	147	return rel;
95c6bc7d MF	148	}
95c6bc7d MF	149
95c6bc7d MF	150	/*
	151	* Set the RTC
	152	*/
152ef916	153	static int rx8025_rtc_set(struct udevice dev, const struct rtc_time tmp)
95c6bc7d	154	{
771fc0c0 MM	155	/* To work around the read/write cycle issue mentioned
	156	* at the top of this file, write all the time registers
	157	* in one I2C transaction
	158	*/
	159	u8 write_op[8];
	160
	161	/* 2412 flag must be set before doing a RTC write,
	162	* otherwise the seconds and minute register
	163	* will be cleared when the flag is set
	164	*/
	165	if (rtc_write(dev, RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412))
	166	return -EIO;
	167
f91fb724 HS	168	DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	169	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	170	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
95c6bc7d MF	171
	172	if (tmp->tm_year < 1970 \|\| tmp->tm_year > 2069)
	173	printf("WARNING: year should be between 1970 and 2069!\n");
	174
771fc0c0 MM	175	write_op[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec);
	176	write_op[RTC_MIN_REG_ADDR] = bin2bcd(tmp->tm_min);
	177	write_op[RTC_HR_REG_ADDR] = bin2bcd(tmp->tm_hour);
	178	write_op[RTC_DAY_REG_ADDR] = bin2bcd(tmp->tm_wday);
	179	write_op[RTC_DATE_REG_ADDR] = bin2bcd(tmp->tm_mday);
	180	write_op[RTC_MON_REG_ADDR] = bin2bcd(tmp->tm_mon);
	181	write_op[RTC_YR_REG_ADDR] = bin2bcd(tmp->tm_year % 100);
	182	write_op[RTC_OFFSET_REG_ADDR] = 0;
0c4e81e0	183
771fc0c0	184	return dm_i2c_write(dev, 0, &write_op[0], 8);
95c6bc7d MF	185	}
95c6bc7d MF	186
95c6bc7d	187	/*
402c8fd5	188	* Reset the RTC
95c6bc7d	189	*/
152ef916	190	static int rx8025_rtc_reset(struct udevice *dev)
95c6bc7d	191	{
95c6bc7d MF	192	uchar buf[16];
	193	uchar ctl2;
	194
0c4e81e0	195	if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
95c6bc7d	196	printf("Error reading from RTC\n");
0c4e81e0 HS	197	return -EIO;
0c4e81e0 HS	198	}
95c6bc7d MF	199
	200	ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
	201	ctl2 &= ~(RTC_CTL2_BIT_PON \| RTC_CTL2_BIT_VDET);
9ca4ae2d MM	202
	203	if (dev->driver_data == model_rx_8035)
	204	ctl2 &= ~(RTC_CTL2_BIT_XST);
	205	else
	206	ctl2 \|= RTC_CTL2_BIT_XST;
0c4e81e0 HS	207
0c4e81e0 HS	208	return rtc_write(dev, RTC_CTL2_REG_ADDR, ctl2);
95c6bc7d MF	209	}
95c6bc7d MF	210
95c6bc7d MF	211	/*
	212	* Helper functions
	213	*/
152ef916	214	static int rtc_write(struct udevice *dev, uchar reg, uchar val)
95c6bc7d	215	{
701c04f3 MM	216	/* The RX8025/RX8035 uses the top 4 bits of the
	217	* 'offset' byte as the start register address,
	218	* and the bottom 4 bits as a 'transfer' mode setting
	219	* (only applicable for reads)
	220	*/
	221	u8 offset = (reg << 4);
0c4e81e0	222
701c04f3	223	if (dm_i2c_reg_write(dev, offset, val)) {
95c6bc7d	224	printf("Error writing to RTC\n");
0c4e81e0 HS	225	return -EIO;
	226	}
	227
	228	return 0;
	229	}
	230
0c4e81e0 HS	231	static int rx8025_probe(struct udevice *dev)
	232	{
	233	uchar buf[16];
	234	int ret = 0;
	235
	236	if (i2c_get_chip_offset_len(dev) != 1)
	237	ret = i2c_set_chip_offset_len(dev, 1);
	238
	239	if (ret)
	240	return ret;
	241
	242	return dm_i2c_read(dev, 0, buf, sizeof(buf));
	243	}
	244
	245	static const struct rtc_ops rx8025_rtc_ops = {
	246	.get = rx8025_rtc_get,
	247	.set = rx8025_rtc_set,
	248	.reset = rx8025_rtc_reset,
	249	};
	250
	251	static const struct udevice_id rx8025_rtc_ids[] = {
9ca4ae2d MM	252	{ .compatible = "epson,rx8025", .data = model_rx_8025 },
9ca4ae2d MM	253	{ .compatible = "epson,rx8035", .data = model_rx_8035 },
0c4e81e0 HS	254	{ }
	255	};
	256
9ca4ae2d	257	U_BOOT_DRIVER(rx8025_rtc) = {
0c4e81e0 HS	258	.name = "rx8025_rtc",
	259	.id = UCLASS_RTC,
	260	.probe = rx8025_probe,
	261	.of_match = rx8025_rtc_ids,
	262	.ops = &rx8025_rtc_ops,
	263	};