[J-u-boot.git] / drivers / rtc / rx8025.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2007
 * Matthias Fuchs, esd gmbh, [email protected].
 */

/*
 * Epson RX8025 RTC driver.
 */

#include <common.h>
#include <command.h>
#include <dm.h>
#include <i2c.h>
#include <rtc.h>

/*---------------------------------------------------------------------*/
#undef DEBUG_RTC

#ifdef DEBUG_RTC
#define DEBUGR(fmt,args...) printf(fmt ,##args)
#else
#define DEBUGR(fmt,args...)
#endif
/*---------------------------------------------------------------------*/

#ifndef CONFIG_SYS_I2C_RTC_ADDR
# define CONFIG_SYS_I2C_RTC_ADDR	0x32
#endif

#ifdef CONFIG_DM_RTC
#define DEV_TYPE struct udevice
#else
/* Local udevice */
struct ludevice {
	u8 chip;
};

#define DEV_TYPE struct ludevice

#endif

/*
 * RTC register addresses
 */
#define RTC_SEC_REG_ADDR	0x00
#define RTC_MIN_REG_ADDR	0x01
#define RTC_HR_REG_ADDR		0x02
#define RTC_DAY_REG_ADDR	0x03
#define RTC_DATE_REG_ADDR	0x04
#define RTC_MON_REG_ADDR	0x05
#define RTC_YR_REG_ADDR		0x06

#define RTC_CTL1_REG_ADDR	0x0e
#define RTC_CTL2_REG_ADDR	0x0f

/*
 * Control register 1 bits
 */
#define RTC_CTL1_BIT_2412	0x20

/*
 * Control register 2 bits
 */
#define RTC_CTL2_BIT_PON	0x10
#define RTC_CTL2_BIT_VDET	0x40
#define RTC_CTL2_BIT_XST	0x20
#define RTC_CTL2_BIT_VDSL	0x80

/*
 * Note: the RX8025 I2C RTC requires register
 * reads and write to consist of a single bus
 * cycle. It is not allowed to write the register
 * address in a first cycle that is terminated by
 * a STOP condition. The chips needs a 'restart'
 * sequence (start sequence without a prior stop).
 * This driver has been written for a 4xx board.
 * U-Boot's 4xx i2c driver is currently not capable
 * to generate such cycles to some work arounds
 * are used.
 */

/* static uchar rtc_read (uchar reg); */
#ifdef CONFIG_DM_RTC
/*
 * on mpc85xx based board with DM and offset len 1
 * accessing rtc works fine. May we can drop this ?
 */
#define rtc_read(reg) buf[(reg) & 0xf]
#else
#define rtc_read(reg) buf[((reg) + 1) & 0xf]
#endif

static int rtc_write(DEV_TYPE *dev, uchar reg, uchar val);

/*
 * Get the current time from the RTC
 */
static int rx8025_rtc_get(DEV_TYPE *dev, struct rtc_time *tmp)
{
	int rel = 0;
	uchar sec, min, hour, mday, wday, mon, year, ctl2;
	uchar buf[16];

#ifdef CONFIG_DM_RTC
	if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
#else
	if (i2c_read(dev->chip, 0, 0, buf, 16)) {
#endif
		printf("Error reading from RTC\n");
		return -EIO;
	}

	sec = rtc_read(RTC_SEC_REG_ADDR);
	min = rtc_read(RTC_MIN_REG_ADDR);
	hour = rtc_read(RTC_HR_REG_ADDR);
	wday = rtc_read(RTC_DAY_REG_ADDR);
	mday = rtc_read(RTC_DATE_REG_ADDR);
	mon = rtc_read(RTC_MON_REG_ADDR);
	year = rtc_read(RTC_YR_REG_ADDR);

	DEBUGR("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	       "hr: %02x min: %02x sec: %02x\n",
	       year, mon, mday, wday, hour, min, sec);

	/* dump status */
	ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
	if (ctl2 & RTC_CTL2_BIT_PON) {
		printf("RTC: power-on detected\n");
		rel = -1;
	}

	if (ctl2 & RTC_CTL2_BIT_VDET) {
		printf("RTC: voltage drop detected\n");
		rel = -1;
	}

	if (!(ctl2 & RTC_CTL2_BIT_XST)) {
		printf("RTC: oscillator stop detected\n");
		rel = -1;
	}

	tmp->tm_sec  = bcd2bin(sec & 0x7F);
	tmp->tm_min  = bcd2bin(min & 0x7F);
	if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
		tmp->tm_hour = bcd2bin(hour & 0x3F);
	else
		tmp->tm_hour = bcd2bin(hour & 0x1F) % 12 +
			       ((hour & 0x20) ? 12 : 0);

	tmp->tm_mday = bcd2bin (mday & 0x3F);
	tmp->tm_mon  = bcd2bin (mon & 0x1F);
	tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
	tmp->tm_wday = bcd2bin (wday & 0x07);
	tmp->tm_yday = 0;
	tmp->tm_isdst= 0;

	DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return rel;
}

/*
 * Set the RTC
 */
static int rx8025_rtc_set(DEV_TYPE *dev, const struct rtc_time *tmp)
{
	DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
		printf("WARNING: year should be between 1970 and 2069!\n");

	if (rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100)))
		return -EIO;

	if (rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon)))
		return -EIO;

	if (rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday)))
		return -EIO;

	if (rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday)))
		return -EIO;

	if (rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour)))
		return -EIO;

	if (rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min)))
		return -EIO;

	if (rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec)))
		return -EIO;

	return rtc_write(dev, RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412);
}

/*
 * Reset the RTC
 */
static int rx8025_rtc_reset(DEV_TYPE *dev)
{
	uchar buf[16];
	uchar ctl2;

#ifdef CONFIG_DM_RTC
	if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
#else
	if (i2c_read(dev->chip, 0, 0, buf, 16)) {
#endif
		printf("Error reading from RTC\n");
		return -EIO;
	}

	ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
	ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);
	ctl2 |= RTC_CTL2_BIT_XST | RTC_CTL2_BIT_VDSL;

	return rtc_write(dev, RTC_CTL2_REG_ADDR, ctl2);
}

/*
 * Helper functions
 */
static int rtc_write(DEV_TYPE *dev, uchar reg, uchar val)
{
	uchar buf[2];
	buf[0] = reg << 4;
	buf[1] = val;

#ifdef CONFIG_DM_RTC
	if (dm_i2c_write(dev, 0, buf, 2)) {
#else
	if (i2c_write(dev->chip, 0, 0, buf, 2) != 0) {
#endif
		printf("Error writing to RTC\n");
		return -EIO;
	}

	return 0;
}

#ifdef CONFIG_DM_RTC
static int rx8025_probe(struct udevice *dev)
{
	uchar buf[16];
	int ret = 0;

	if (i2c_get_chip_offset_len(dev) != 1)
		ret = i2c_set_chip_offset_len(dev, 1);

	if (ret)
		return ret;

	return dm_i2c_read(dev, 0, buf, sizeof(buf));
}

static const struct rtc_ops rx8025_rtc_ops = {
	.get = rx8025_rtc_get,
	.set = rx8025_rtc_set,
	.reset = rx8025_rtc_reset,
};

static const struct udevice_id rx8025_rtc_ids[] = {
	{ .compatible = "epson,rx8025" },
	{ }
};

U_BOOT_DRIVER(rx8010sj_rtc) = {
	.name	  = "rx8025_rtc",
	.id	      = UCLASS_RTC,
	.probe    = rx8025_probe,
	.of_match = rx8025_rtc_ids,
	.ops	  = &rx8025_rtc_ops,
};
#else
int rtc_get(struct rtc_time *tm)
{
	struct ludevice dev = {
		.chip = CONFIG_SYS_I2C_RTC_ADDR,
	};

	return rx8025_rtc_get(&dev, tm);
}

int rtc_set(struct rtc_time *tm)
{
	struct ludevice dev = {
		.chip = CONFIG_SYS_I2C_RTC_ADDR,
	};

	return rx8025_rtc_set(&dev, tm);
}

void rtc_reset(void)
{
	struct ludevice dev = {
		.chip = CONFIG_SYS_I2C_RTC_ADDR,
	};

	rx8025_rtc_reset(&dev);
}
#endif
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
95c6bc7d MF	2	/*
	3	* (C) Copyright 2007
	4	* Matthias Fuchs, esd gmbh, [email protected].
95c6bc7d MF	5	*/
	6
	7	/*
	8	* Epson RX8025 RTC driver.
	9	*/
	10
	11	#include <common.h>
	12	#include <command.h>
0c4e81e0	13	#include <dm.h>
95c6bc7d	14	#include <i2c.h>
0c4e81e0	15	#include <rtc.h>
95c6bc7d	16
95c6bc7d MF	17	/---------------------------------------------------------------------/
	18	#undef DEBUG_RTC
	19
	20	#ifdef DEBUG_RTC
	21	#define DEBUGR(fmt,args...) printf(fmt ,##args)
	22	#else
	23	#define DEBUGR(fmt,args...)
	24	#endif
	25	/---------------------------------------------------------------------/
	26
6d0f6bcf JCPV	27	#ifndef CONFIG_SYS_I2C_RTC_ADDR
6d0f6bcf JCPV	28	# define CONFIG_SYS_I2C_RTC_ADDR 0x32
95c6bc7d MF	29	#endif
95c6bc7d MF	30
0c4e81e0 HS	31	#ifdef CONFIG_DM_RTC
	32	#define DEV_TYPE struct udevice
	33	#else
	34	/* Local udevice */
	35	struct ludevice {
	36	u8 chip;
	37	};
	38
	39	#define DEV_TYPE struct ludevice
	40
	41	#endif
	42
95c6bc7d MF	43	/*
	44	* RTC register addresses
	45	*/
	46	#define RTC_SEC_REG_ADDR 0x00
	47	#define RTC_MIN_REG_ADDR 0x01
	48	#define RTC_HR_REG_ADDR 0x02
	49	#define RTC_DAY_REG_ADDR 0x03
	50	#define RTC_DATE_REG_ADDR 0x04
	51	#define RTC_MON_REG_ADDR 0x05
	52	#define RTC_YR_REG_ADDR 0x06
	53
	54	#define RTC_CTL1_REG_ADDR 0x0e
	55	#define RTC_CTL2_REG_ADDR 0x0f
	56
	57	/*
	58	* Control register 1 bits
	59	*/
	60	#define RTC_CTL1_BIT_2412 0x20
	61
	62	/*
	63	* Control register 2 bits
	64	*/
	65	#define RTC_CTL2_BIT_PON 0x10
	66	#define RTC_CTL2_BIT_VDET 0x40
	67	#define RTC_CTL2_BIT_XST 0x20
	68	#define RTC_CTL2_BIT_VDSL 0x80
	69
	70	/*
	71	* Note: the RX8025 I2C RTC requires register
	72	* reads and write to consist of a single bus
	73	* cycle. It is not allowed to write the register
	74	* address in a first cycle that is terminated by
	75	* a STOP condition. The chips needs a 'restart'
	76	* sequence (start sequence without a prior stop).
	77	* This driver has been written for a 4xx board.
	78	* U-Boot's 4xx i2c driver is currently not capable
	79	* to generate such cycles to some work arounds
	80	* are used.
	81	*/
	82
	83	/* static uchar rtc_read (uchar reg); */
0c4e81e0 HS	84	#ifdef CONFIG_DM_RTC
	85	/*
	86	* on mpc85xx based board with DM and offset len 1
	87	* accessing rtc works fine. May we can drop this ?
	88	*/
	89	#define rtc_read(reg) buf[(reg) & 0xf]
	90	#else
95c6bc7d	91	#define rtc_read(reg) buf[((reg) + 1) & 0xf]
0c4e81e0	92	#endif
95c6bc7d	93
0c4e81e0	94	static int rtc_write(DEV_TYPE *dev, uchar reg, uchar val);
95c6bc7d MF	95
	96	/*
	97	* Get the current time from the RTC
	98	*/
0c4e81e0	99	static int rx8025_rtc_get(DEV_TYPE dev, struct rtc_time tmp)
95c6bc7d	100	{
b73a19e1	101	int rel = 0;
95c6bc7d MF	102	uchar sec, min, hour, mday, wday, mon, year, ctl2;
	103	uchar buf[16];
	104
0c4e81e0 HS	105	#ifdef CONFIG_DM_RTC
	106	if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
	107	#else
	108	if (i2c_read(dev->chip, 0, 0, buf, 16)) {
	109	#endif
95c6bc7d	110	printf("Error reading from RTC\n");
0c4e81e0 HS	111	return -EIO;
0c4e81e0 HS	112	}
95c6bc7d MF	113
	114	sec = rtc_read(RTC_SEC_REG_ADDR);
	115	min = rtc_read(RTC_MIN_REG_ADDR);
	116	hour = rtc_read(RTC_HR_REG_ADDR);
	117	wday = rtc_read(RTC_DAY_REG_ADDR);
	118	mday = rtc_read(RTC_DATE_REG_ADDR);
	119	mon = rtc_read(RTC_MON_REG_ADDR);
	120	year = rtc_read(RTC_YR_REG_ADDR);
	121
f91fb724 HS	122	DEBUGR("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	123	"hr: %02x min: %02x sec: %02x\n",
	124	year, mon, mday, wday, hour, min, sec);
95c6bc7d MF	125
	126	/* dump status */
	127	ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
b73a19e1	128	if (ctl2 & RTC_CTL2_BIT_PON) {
95c6bc7d	129	printf("RTC: power-on detected\n");
b73a19e1 YT	130	rel = -1;
b73a19e1 YT	131	}
95c6bc7d	132
b73a19e1	133	if (ctl2 & RTC_CTL2_BIT_VDET) {
95c6bc7d	134	printf("RTC: voltage drop detected\n");
b73a19e1 YT	135	rel = -1;
b73a19e1 YT	136	}
95c6bc7d	137
b73a19e1	138	if (!(ctl2 & RTC_CTL2_BIT_XST)) {
95c6bc7d	139	printf("RTC: oscillator stop detected\n");
b73a19e1 YT	140	rel = -1;
b73a19e1 YT	141	}
95c6bc7d	142
f91fb724 HS	143	tmp->tm_sec = bcd2bin(sec & 0x7F);
f91fb724 HS	144	tmp->tm_min = bcd2bin(min & 0x7F);
5875d358	145	if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
f91fb724	146	tmp->tm_hour = bcd2bin(hour & 0x3F);
5875d358	147	else
f91fb724	148	tmp->tm_hour = bcd2bin(hour & 0x1F) % 12 +
5875d358	149	((hour & 0x20) ? 12 : 0);
f91fb724	150
95c6bc7d MF	151	tmp->tm_mday = bcd2bin (mday & 0x3F);
	152	tmp->tm_mon = bcd2bin (mon & 0x1F);
	153	tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
	154	tmp->tm_wday = bcd2bin (wday & 0x07);
	155	tmp->tm_yday = 0;
	156	tmp->tm_isdst= 0;
	157
f91fb724 HS	158	DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	159	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	160	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
b73a19e1 YT	161
b73a19e1 YT	162	return rel;
95c6bc7d MF	163	}
95c6bc7d MF	164
95c6bc7d MF	165	/*
	166	* Set the RTC
	167	*/
0c4e81e0	168	static int rx8025_rtc_set(DEV_TYPE dev, const struct rtc_time tmp)
95c6bc7d	169	{
f91fb724 HS	170	DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	171	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	172	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
95c6bc7d MF	173
	174	if (tmp->tm_year < 1970 \|\| tmp->tm_year > 2069)
	175	printf("WARNING: year should be between 1970 and 2069!\n");
	176
0c4e81e0 HS	177	if (rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100)))
0c4e81e0 HS	178	return -EIO;
95c6bc7d	179
0c4e81e0 HS	180	if (rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon)))
0c4e81e0 HS	181	return -EIO;
d1e23194	182
0c4e81e0 HS	183	if (rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday)))
	184	return -EIO;
	185
	186	if (rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday)))
	187	return -EIO;
	188
	189	if (rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour)))
	190	return -EIO;
	191
	192	if (rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min)))
	193	return -EIO;
	194
	195	if (rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec)))
	196	return -EIO;
	197
	198	return rtc_write(dev, RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412);
95c6bc7d MF	199	}
95c6bc7d MF	200
95c6bc7d	201	/*
402c8fd5	202	* Reset the RTC
95c6bc7d	203	*/
0c4e81e0	204	static int rx8025_rtc_reset(DEV_TYPE *dev)
95c6bc7d	205	{
95c6bc7d MF	206	uchar buf[16];
	207	uchar ctl2;
	208
0c4e81e0 HS	209	#ifdef CONFIG_DM_RTC
	210	if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
	211	#else
	212	if (i2c_read(dev->chip, 0, 0, buf, 16)) {
	213	#endif
95c6bc7d	214	printf("Error reading from RTC\n");
0c4e81e0 HS	215	return -EIO;
0c4e81e0 HS	216	}
95c6bc7d MF	217
	218	ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
	219	ctl2 &= ~(RTC_CTL2_BIT_PON \| RTC_CTL2_BIT_VDET);
	220	ctl2 \|= RTC_CTL2_BIT_XST \| RTC_CTL2_BIT_VDSL;
0c4e81e0 HS	221
0c4e81e0 HS	222	return rtc_write(dev, RTC_CTL2_REG_ADDR, ctl2);
95c6bc7d MF	223	}
95c6bc7d MF	224
95c6bc7d MF	225	/*
	226	* Helper functions
	227	*/
0c4e81e0	228	static int rtc_write(DEV_TYPE *dev, uchar reg, uchar val)
95c6bc7d MF	229	{
	230	uchar buf[2];
	231	buf[0] = reg << 4;
	232	buf[1] = val;
0c4e81e0 HS	233
	234	#ifdef CONFIG_DM_RTC
	235	if (dm_i2c_write(dev, 0, buf, 2)) {
	236	#else
	237	if (i2c_write(dev->chip, 0, 0, buf, 2) != 0) {
	238	#endif
95c6bc7d	239	printf("Error writing to RTC\n");
0c4e81e0 HS	240	return -EIO;
	241	}
	242
	243	return 0;
	244	}
	245
	246	#ifdef CONFIG_DM_RTC
	247	static int rx8025_probe(struct udevice *dev)
	248	{
	249	uchar buf[16];
	250	int ret = 0;
	251
	252	if (i2c_get_chip_offset_len(dev) != 1)
	253	ret = i2c_set_chip_offset_len(dev, 1);
	254
	255	if (ret)
	256	return ret;
	257
	258	return dm_i2c_read(dev, 0, buf, sizeof(buf));
	259	}
	260
	261	static const struct rtc_ops rx8025_rtc_ops = {
	262	.get = rx8025_rtc_get,
	263	.set = rx8025_rtc_set,
	264	.reset = rx8025_rtc_reset,
	265	};
	266
	267	static const struct udevice_id rx8025_rtc_ids[] = {
	268	{ .compatible = "epson,rx8025" },
	269	{ }
	270	};
	271
	272	U_BOOT_DRIVER(rx8010sj_rtc) = {
	273	.name = "rx8025_rtc",
	274	.id = UCLASS_RTC,
	275	.probe = rx8025_probe,
	276	.of_match = rx8025_rtc_ids,
	277	.ops = &rx8025_rtc_ops,
	278	};
	279	#else
	280	int rtc_get(struct rtc_time *tm)
	281	{
	282	struct ludevice dev = {
	283	.chip = CONFIG_SYS_I2C_RTC_ADDR,
	284	};
	285
	286	return rx8025_rtc_get(&dev, tm);
	287	}
	288
	289	int rtc_set(struct rtc_time *tm)
	290	{
	291	struct ludevice dev = {
	292	.chip = CONFIG_SYS_I2C_RTC_ADDR,
	293	};
	294
	295	return rx8025_rtc_set(&dev, tm);
95c6bc7d	296	}
0c4e81e0 HS	297
	298	void rtc_reset(void)
	299	{
	300	struct ludevice dev = {
	301	.chip = CONFIG_SYS_I2C_RTC_ADDR,
	302	};
	303
	304	rx8025_rtc_reset(&dev);
	305	}
	306	#endif