[J-u-boot.git] / scripts / Makefile.build

# ==========================================================================
# Building
# ==========================================================================

src := $(obj)

PHONY := __build
__build:

# Init all relevant variables used in kbuild files so
# 1) they have correct type
# 2) they do not inherit any value from the environment
obj-y :=
obj-m :=
lib-y :=
lib-m :=
always :=
targets :=
subdir-y :=
subdir-m :=
EXTRA_AFLAGS   :=
EXTRA_CFLAGS   :=
EXTRA_CPPFLAGS :=
EXTRA_LDFLAGS  :=
asflags-y  :=
ccflags-y  :=
cppflags-y :=
ldflags-y  :=

subdir-asflags-y :=
subdir-ccflags-y :=

# Read auto.conf if it exists, otherwise ignore
-include include/config/auto.conf

include scripts/Kbuild.include

# For backward compatibility check that these variables do not change
save-cflags := $(CFLAGS)

# The filename Kbuild has precedence over Makefile
kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
include $(kbuild-file)

# If the save-* variables changed error out
ifeq ($(KBUILD_NOPEDANTIC),)
        ifneq ("$(save-cflags)","$(CFLAGS)")
                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
        endif
endif

#
# make W=... settings
#
# W=1 - warnings that may be relevant and does not occur too often
# W=2 - warnings that occur quite often but may still be relevant
# W=3 - the more obscure warnings, can most likely be ignored
#
# $(call cc-option, -W...) handles gcc -W.. options which
# are not supported by all versions of the compiler
ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS
warning-  := $(empty)

warning-1 := -Wextra -Wunused -Wno-unused-parameter
warning-1 += -Wmissing-declarations
warning-1 += -Wmissing-format-attribute
warning-1 += -Wmissing-prototypes
warning-1 += -Wold-style-definition
warning-1 += $(call cc-option, -Wmissing-include-dirs)
warning-1 += $(call cc-option, -Wunused-but-set-variable)
warning-1 += $(call cc-disable-warning, missing-field-initializers)

warning-2 := -Waggregate-return
warning-2 += -Wcast-align
warning-2 += -Wdisabled-optimization
warning-2 += -Wnested-externs
warning-2 += -Wshadow
warning-2 += $(call cc-option, -Wlogical-op)
warning-2 += $(call cc-option, -Wmissing-field-initializers)

warning-3 := -Wbad-function-cast
warning-3 += -Wcast-qual
warning-3 += -Wconversion
warning-3 += -Wpacked
warning-3 += -Wpadded
warning-3 += -Wpointer-arith
warning-3 += -Wredundant-decls
warning-3 += -Wswitch-default
warning-3 += $(call cc-option, -Wpacked-bitfield-compat)
warning-3 += $(call cc-option, -Wvla)

warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))

ifeq ("$(strip $(warning))","")
        $(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)
endif

KBUILD_CFLAGS += $(warning)
endif

include scripts/Makefile.lib

ifdef host-progs
ifneq ($(hostprogs-y),$(host-progs))
$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
hostprogs-y += $(host-progs)
endif
endif

# Do not include host rules unless needed
ifneq ($(hostprogs-y)$(hostprogs-m),)
include scripts/Makefile.host
endif

ifneq ($(KBUILD_SRC),)
# Create output directory if not already present
_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))

# Create directories for object files if directory does not exist
# Needed when obj-y := dir/file.o syntax is used
_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
endif

ifndef obj
$(warning kbuild: Makefile.build is included improperly)
endif

# ===========================================================================

ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
lib-target := $(obj)/lib.a
endif

ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
builtin-target := $(obj)/built-in.o
endif

modorder-target := $(obj)/modules.order

# We keep a list of all modules in $(MODVERDIR)

__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
	 $(subdir-ym) $(always)
	@:

# Linus' kernel sanity checking tool
ifneq ($(KBUILD_CHECKSRC),0)
  ifeq ($(KBUILD_CHECKSRC),2)
    quiet_cmd_force_checksrc = CHECK   $<
          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  else
      quiet_cmd_checksrc     = CHECK   $<
            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  endif
endif

# Do section mismatch analysis for each module/built-in.o
ifdef CONFIG_DEBUG_SECTION_MISMATCH
  cmd_secanalysis = ; scripts/mod/modpost $@
endif

# Compile C sources (.c)
# ---------------------------------------------------------------------------

# Default is built-in, unless we know otherwise
modkern_cflags =                                          \
	$(if $(part-of-module),                           \
		$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
		$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
quiet_modtag := $(empty)   $(empty)

$(real-objs-m)        : part-of-module := y
$(real-objs-m:.o=.i)  : part-of-module := y
$(real-objs-m:.o=.s)  : part-of-module := y
$(real-objs-m:.o=.lst): part-of-module := y

$(real-objs-m)        : quiet_modtag := [M]
$(real-objs-m:.o=.i)  : quiet_modtag := [M]
$(real-objs-m:.o=.s)  : quiet_modtag := [M]
$(real-objs-m:.o=.lst): quiet_modtag := [M]

$(obj-m)              : quiet_modtag := [M]

# Default for not multi-part modules
modname = $(basetarget)

$(multi-objs-m)         : modname = $(modname-multi)
$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
$(multi-objs-y)         : modname = $(modname-multi)
$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
$(multi-objs-y:.o=.lst) : modname = $(modname-multi)

quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<

$(obj)/%.s: $(src)/%.c FORCE
	$(call if_changed_dep,cc_s_c)

quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<

$(obj)/%.i: $(src)/%.c FORCE
	$(call if_changed_dep,cc_i_c)

cmd_gensymtypes =                                                           \
    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
    $(GENKSYMS) $(if $(1), -T $(2))                                         \
     $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX))             \
     $(if $(KBUILD_PRESERVE),-p)                                            \
     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))

quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
cmd_cc_symtypes_c =                                                         \
    set -e;                                                                 \
    $(call cmd_gensymtypes,true,$@) >/dev/null;                             \
    test -s $@ || rm -f $@

$(obj)/%.symtypes : $(src)/%.c FORCE
	$(call cmd,cc_symtypes_c)

# C (.c) files
# The C file is compiled and updated dependency information is generated.
# (See cmd_cc_o_c + relevant part of rule_cc_o_c)

quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@

ifndef CONFIG_MODVERSIONS
cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<

else
# When module versioning is enabled the following steps are executed:
# o compile a .tmp_<file>.o from <file>.c
# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
#   are done.
# o otherwise, we calculate symbol versions using the good old
#   genksyms on the preprocessed source and postprocess them in a way
#   that they are usable as a linker script
# o generate <file>.o from .tmp_<file>.o using the linker to
#   replace the unresolved symbols __crc_exported_symbol with
#   the actual value of the checksum generated by genksyms

cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
cmd_modversions =								\
	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then		\
		$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))	\
		    > $(@D)/.tmp_$(@F:.o=.ver);					\
										\
		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 			\
			-T $(@D)/.tmp_$(@F:.o=.ver);				\
		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);		\
	else									\
		mv -f $(@D)/.tmp_$(@F) $@;					\
	fi;
endif

ifdef CONFIG_FTRACE_MCOUNT_RECORD
ifdef BUILD_C_RECORDMCOUNT
ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  RECORDMCOUNT_FLAGS = -w
endif
# Due to recursion, we must skip empty.o.
# The empty.o file is created in the make process in order to determine
#  the target endianness and word size. It is made before all other C
#  files, including recordmcount.
sub_cmd_record_mcount =					\
	if [ $(@) != "scripts/mod/empty.o" ]; then	\
		$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)";	\
	fi;
recordmcount_source := $(srctree)/scripts/recordmcount.c \
		    $(srctree)/scripts/recordmcount.h
else
sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
	"$(if $(CONFIG_64BIT),64,32)" \
	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
	"$(if $(part-of-module),1,0)" "$(@)";
recordmcount_source := $(srctree)/scripts/recordmcount.pl
endif
cmd_record_mcount = 						\
	if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then	\
		$(sub_cmd_record_mcount)			\
	fi;
endif

define rule_cc_o_c
	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
	$(cmd_modversions)						  \
	$(call echo-cmd,record_mcount)					  \
	$(cmd_record_mcount)						  \
	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
	                                              $(dot-target).tmp;  \
	rm -f $(depfile);						  \
	mv -f $(dot-target).tmp $(dot-target).cmd
endef

# Built-in and composite module parts
$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)

# Single-part modules are special since we need to mark them in $(MODVERDIR)

$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)
	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)

quiet_cmd_cc_lst_c = MKLST   $@
      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
				     System.map $(OBJDUMP) > $@

$(obj)/%.lst: $(src)/%.c FORCE
	$(call if_changed_dep,cc_lst_c)

# Compile assembler sources (.S)
# ---------------------------------------------------------------------------

modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)

$(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)

quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $< 

$(obj)/%.s: $(src)/%.S FORCE
	$(call if_changed_dep,as_s_S)

quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<

$(obj)/%.o: $(src)/%.S FORCE
	$(call if_changed_dep,as_o_S)

targets += $(real-objs-y) $(real-objs-m) $(lib-y)
targets += $(extra-y) $(MAKECMDGOALS) $(always)

# Linker scripts preprocessor (.lds.S -> .lds)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds_S = LDS     $@
      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<

$(obj)/%.lds: $(src)/%.lds.S FORCE
	$(call if_changed_dep,cpp_lds_S)

# ASN.1 grammar
# ---------------------------------------------------------------------------
quiet_cmd_asn1_compiler = ASN.1   $@
      cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
				$(subst .h,.c,$@) $(subst .c,.h,$@)

.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h

$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
	$(call cmd,asn1_compiler)

# Build the compiled-in targets
# ---------------------------------------------------------------------------

# To build objects in subdirs, we need to descend into the directories
$(sort $(subdir-obj-y)): $(subdir-ym) ;

#
# Rule to compile a set of .o files into one .o file
#
ifdef builtin-target
quiet_cmd_link_o_target = LD      $@
# If the list of objects to link is empty, just create an empty built-in.o
cmd_link_o_target = $(if $(strip $(obj-y)),\
		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
		      $(cmd_secanalysis),\
		      rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)

$(builtin-target): $(obj-y) FORCE
	$(call if_changed,link_o_target)

targets += $(builtin-target)
endif # builtin-target

#
# Rule to create modules.order file
#
# Create commands to either record .ko file or cat modules.order from
# a subdirectory
modorder-cmds =						\
	$(foreach m, $(modorder),			\
		$(if $(filter %/modules.order, $m),	\
			cat $m;, echo kernel/$m;))

$(modorder-target): $(subdir-ym) FORCE
	$(Q)(cat /dev/null; $(modorder-cmds)) > $@

#
# Rule to compile a set of .o files into one .a file
#
ifdef lib-target
quiet_cmd_link_l_target = AR      $@
cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)

$(lib-target): $(lib-y) FORCE
	$(call if_changed,link_l_target)

targets += $(lib-target)
endif

#
# Rule to link composite objects
#
#  Composite objects are specified in kbuild makefile as follows:
#    <composite-object>-objs := <list of .o files>
#  or
#    <composite-object>-y    := <list of .o files>
link_multi_deps =                     \
$(filter $(addprefix $(obj)/,         \
$($(subst $(obj)/,,$(@:.o=-objs)))    \
$($(subst $(obj)/,,$(@:.o=-y)))), $^)
 
quiet_cmd_link_multi-y = LD      $@
cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)

quiet_cmd_link_multi-m = LD [M]  $@
cmd_link_multi-m = $(cmd_link_multi-y)

# We would rather have a list of rules like
# 	foo.o: $(foo-objs)
# but that's not so easy, so we rather make all composite objects depend
# on the set of all their parts
$(multi-used-y) : %.o: $(multi-objs-y) FORCE
	$(call if_changed,link_multi-y)

$(multi-used-m) : %.o: $(multi-objs-m) FORCE
	$(call if_changed,link_multi-m)
	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)

targets += $(multi-used-y) $(multi-used-m)


# Descending
# ---------------------------------------------------------------------------

PHONY += $(subdir-ym)
$(subdir-ym):
	$(Q)$(MAKE) $(build)=$@

# Add FORCE to the prequisites of a target to force it to be always rebuilt.
# ---------------------------------------------------------------------------

PHONY += FORCE

FORCE:

# Read all saved command lines and dependencies for the $(targets) we
# may be building above, using $(if_changed{,_dep}). As an
# optimization, we don't need to read them if the target does not
# exist, we will rebuild anyway in that case.

targets := $(wildcard $(sort $(targets)))
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))

ifneq ($(cmd_files),)
  include $(cmd_files)
endif

# Declare the contents of the .PHONY variable as phony.  We keep that
# information in a variable se we can use it in if_changed and friends.

.PHONY: $(PHONY)
Commit	Line	Data
22433fc5 MY	1	# ==========================================================================
	2	# Building
	3	# ==========================================================================
	4
	5	src := $(obj)
	6
	7	PHONY := __build
	8	__build:
	9
	10	# Init all relevant variables used in kbuild files so
	11	# 1) they have correct type
	12	# 2) they do not inherit any value from the environment
	13	obj-y :=
	14	obj-m :=
	15	lib-y :=
	16	lib-m :=
	17	always :=
	18	targets :=
	19	subdir-y :=
	20	subdir-m :=
	21	EXTRA_AFLAGS :=
	22	EXTRA_CFLAGS :=
	23	EXTRA_CPPFLAGS :=
	24	EXTRA_LDFLAGS :=
	25	asflags-y :=
	26	ccflags-y :=
	27	cppflags-y :=
	28	ldflags-y :=
	29
	30	subdir-asflags-y :=
	31	subdir-ccflags-y :=
	32
	33	# Read auto.conf if it exists, otherwise ignore
	34	-include include/config/auto.conf
	35
	36	include scripts/Kbuild.include
	37
	38	# For backward compatibility check that these variables do not change
	39	save-cflags := $(CFLAGS)
	40
	41	# The filename Kbuild has precedence over Makefile
	42	kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
	43	kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
	44	include $(kbuild-file)
	45
	46	# If the save-* variables changed error out
	47	ifeq ($(KBUILD_NOPEDANTIC),)
	48	ifneq ("$(save-cflags)","$(CFLAGS)")
	49	$(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
	50	endif
	51	endif
	52
	53	#
	54	# make W=... settings
	55	#
	56	# W=1 - warnings that may be relevant and does not occur too often
	57	# W=2 - warnings that occur quite often but may still be relevant
	58	# W=3 - the more obscure warnings, can most likely be ignored
	59	#
	60	# $(call cc-option, -W...) handles gcc -W.. options which
	61	# are not supported by all versions of the compiler
	62	ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS
	63	warning- := $(empty)
	64
65	warning-1 := -Wextra -Wunused -Wno-unused-parameter
66	warning-1 += -Wmissing-declarations
67	warning-1 += -Wmissing-format-attribute
68	warning-1 += -Wmissing-prototypes
69	warning-1 += -Wold-style-definition
70	warning-1 += $(call cc-option, -Wmissing-include-dirs)
71	warning-1 += $(call cc-option, -Wunused-but-set-variable)
72	warning-1 += $(call cc-disable-warning, missing-field-initializers)
73
74	warning-2 := -Waggregate-return
75	warning-2 += -Wcast-align
76	warning-2 += -Wdisabled-optimization
77	warning-2 += -Wnested-externs
78	warning-2 += -Wshadow
79	warning-2 += $(call cc-option, -Wlogical-op)
80	warning-2 += $(call cc-option, -Wmissing-field-initializers)
81
82	warning-3 := -Wbad-function-cast
83	warning-3 += -Wcast-qual
84	warning-3 += -Wconversion
85	warning-3 += -Wpacked
86	warning-3 += -Wpadded
87	warning-3 += -Wpointer-arith
88	warning-3 += -Wredundant-decls
89	warning-3 += -Wswitch-default
90	warning-3 += $(call cc-option, -Wpacked-bitfield-compat)
91	warning-3 += $(call cc-option, -Wvla)
92
93	warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
94	warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
95	warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
96
97	ifeq ("$(strip $(warning))","")
98	$(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)
99	endif
100
101	KBUILD_CFLAGS += $(warning)
102	endif
103
104	include scripts/Makefile.lib
105
106	ifdef host-progs
107	ifneq ($(hostprogs-y),$(host-progs))
108	$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
109	hostprogs-y += $(host-progs)
110	endif
111	endif
112
113	# Do not include host rules unless needed
114	ifneq ($(hostprogs-y)$(hostprogs-m),)
115	include scripts/Makefile.host
116	endif
117
118	ifneq ($(KBUILD_SRC),)
119	# Create output directory if not already present
120	_dummy := $(shell [ -d $(obj) ] \|\| mkdir -p $(obj))
121
122	# Create directories for object files if directory does not exist
123	# Needed when obj-y := dir/file.o syntax is used
124	_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] \|\| mkdir -p $(d)))
125	endif
126
127	ifndef obj
128	$(warning kbuild: Makefile.build is included improperly)
129	endif
130
131	# ===========================================================================
132
133	ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
134	lib-target := $(obj)/lib.a
135	endif
136
137	ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
138	builtin-target := $(obj)/built-in.o
139	endif
140
141	modorder-target := $(obj)/modules.order
142
143	# We keep a list of all modules in $(MODVERDIR)
144
145	__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
146	$(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
147	$(subdir-ym) $(always)
148	@:
149
150	# Linus' kernel sanity checking tool
151	ifneq ($(KBUILD_CHECKSRC),0)
152	ifeq ($(KBUILD_CHECKSRC),2)
153	quiet_cmd_force_checksrc = CHECK $<
154	cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
155	else
156	quiet_cmd_checksrc = CHECK $<
157	cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
158	endif
159	endif
160
161	# Do section mismatch analysis for each module/built-in.o
162	ifdef CONFIG_DEBUG_SECTION_MISMATCH
163	cmd_secanalysis = ; scripts/mod/modpost $@
164	endif
165
166	# Compile C sources (.c)
167	# ---------------------------------------------------------------------------
168
169	# Default is built-in, unless we know otherwise
170	modkern_cflags = \
171	$(if $(part-of-module), \
172	$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
173	$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
174	quiet_modtag := $(empty) $(empty)
175
176	$(real-objs-m) : part-of-module := y
177	$(real-objs-m:.o=.i) : part-of-module := y
178	$(real-objs-m:.o=.s) : part-of-module := y
179	$(real-objs-m:.o=.lst): part-of-module := y
180
181	$(real-objs-m) : quiet_modtag := [M]
182	$(real-objs-m:.o=.i) : quiet_modtag := [M]
183	$(real-objs-m:.o=.s) : quiet_modtag := [M]
184	$(real-objs-m:.o=.lst): quiet_modtag := [M]
185
186	$(obj-m) : quiet_modtag := [M]
187
188	# Default for not multi-part modules
189	modname = $(basetarget)
190
191	$(multi-objs-m) : modname = $(modname-multi)
192	$(multi-objs-m:.o=.i) : modname = $(modname-multi)
193	$(multi-objs-m:.o=.s) : modname = $(modname-multi)
194	$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
195	$(multi-objs-y) : modname = $(modname-multi)
196	$(multi-objs-y:.o=.i) : modname = $(modname-multi)
197	$(multi-objs-y:.o=.s) : modname = $(modname-multi)
198	$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
199
200	quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
201	cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
202
203	$(obj)/%.s: $(src)/%.c FORCE
204	$(call if_changed_dep,cc_s_c)
205
206	quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
207	cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
208
209	$(obj)/%.i: $(src)/%.c FORCE
210	$(call if_changed_dep,cc_i_c)
211
212	cmd_gensymtypes = \
213	$(CPP) -D__GENKSYMS__ $(c_flags) $< \| \
214	$(GENKSYMS) $(if $(1), -T $(2)) \
215	$(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
216	$(if $(KBUILD_PRESERVE),-p) \
217	-r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
218
219	quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
220	cmd_cc_symtypes_c = \
221	set -e; \
222	$(call cmd_gensymtypes,true,$@) >/dev/null; \
223	test -s $@ \|\| rm -f $@
224
225	$(obj)/%.symtypes : $(src)/%.c FORCE
226	$(call cmd,cc_symtypes_c)
227
228	# C (.c) files
229	# The C file is compiled and updated dependency information is generated.
230	# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
231
232	quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
233
234	ifndef CONFIG_MODVERSIONS
235	cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
236
237	else
238	# When module versioning is enabled the following steps are executed:
239	# o compile a .tmp_<file>.o from <file>.c
240	# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
241	# not export symbols, we just rename .tmp_<file>.o to <file>.o and
242	# are done.
243	# o otherwise, we calculate symbol versions using the good old
244	# genksyms on the preprocessed source and postprocess them in a way
245	# that they are usable as a linker script
246	# o generate <file>.o from .tmp_<file>.o using the linker to
247	# replace the unresolved symbols __crc_exported_symbol with
248	# the actual value of the checksum generated by genksyms
249
250	cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
251	cmd_modversions = \
252	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) \| grep -q __ksymtab; then \
253	$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
254	> $(@D)/.tmp_$(@F:.o=.ver); \
255	\
256	$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
257	-T $(@D)/.tmp_$(@F:.o=.ver); \
258	rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
259	else \
260	mv -f $(@D)/.tmp_$(@F) $@; \
261	fi;
262	endif
263
264	ifdef CONFIG_FTRACE_MCOUNT_RECORD
265	ifdef BUILD_C_RECORDMCOUNT
266	ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
267	RECORDMCOUNT_FLAGS = -w
268	endif
269	# Due to recursion, we must skip empty.o.
270	# The empty.o file is created in the make process in order to determine
271	# the target endianness and word size. It is made before all other C
272	# files, including recordmcount.
273	sub_cmd_record_mcount = \
274	if [ $(@) != "scripts/mod/empty.o" ]; then \
275	$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
276	fi;
277	recordmcount_source := $(srctree)/scripts/recordmcount.c \
278	$(srctree)/scripts/recordmcount.h
279	else
280	sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
281	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
282	"$(if $(CONFIG_64BIT),64,32)" \
283	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
284	"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
285	"$(if $(part-of-module),1,0)" "$(@)";
286	recordmcount_source := $(srctree)/scripts/recordmcount.pl
287	endif
288	cmd_record_mcount = \
289	if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
290	$(sub_cmd_record_mcount) \
291	fi;
292	endif
293
294	define rule_cc_o_c
295	$(call echo-cmd,checksrc) $(cmd_checksrc) \
296	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
297	$(cmd_modversions) \
298	$(call echo-cmd,record_mcount) \
299	$(cmd_record_mcount) \
300	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
301	$(dot-target).tmp; \
302	rm -f $(depfile); \
303	mv -f $(dot-target).tmp $(dot-target).cmd
304	endef
305
306	# Built-in and composite module parts
307	$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
308	$(call cmd,force_checksrc)
309	$(call if_changed_rule,cc_o_c)
310
311	# Single-part modules are special since we need to mark them in $(MODVERDIR)
312
313	$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
314	$(call cmd,force_checksrc)
315	$(call if_changed_rule,cc_o_c)
316	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
317
318	quiet_cmd_cc_lst_c = MKLST $@
319	cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
320	$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
321	System.map $(OBJDUMP) > $@
322
323	$(obj)/%.lst: $(src)/%.c FORCE
324	$(call if_changed_dep,cc_lst_c)
325
326	# Compile assembler sources (.S)
327	# ---------------------------------------------------------------------------
328
329	modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
330
331	$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
332	$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
333
334	quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
335	cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
336
337	$(obj)/%.s: $(src)/%.S FORCE
338	$(call if_changed_dep,as_s_S)
339
340	quiet_cmd_as_o_S = AS $(quiet_modtag) $@
341	cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
342
343	$(obj)/%.o: $(src)/%.S FORCE
344	$(call if_changed_dep,as_o_S)
345
346	targets += $(real-objs-y) $(real-objs-m) $(lib-y)
347	targets += $(extra-y) $(MAKECMDGOALS) $(always)
348
349	# Linker scripts preprocessor (.lds.S -> .lds)
350	# ---------------------------------------------------------------------------
351	quiet_cmd_cpp_lds_S = LDS $@
352	cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
353	-D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
354
355	$(obj)/%.lds: $(src)/%.lds.S FORCE
356	$(call if_changed_dep,cpp_lds_S)
357
358	# ASN.1 grammar
359	# ---------------------------------------------------------------------------
360	quiet_cmd_asn1_compiler = ASN.1 $@
361	cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
362	$(subst .h,.c,$@) $(subst .c,.h,$@)
363
364	.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
365
366	$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
367	$(call cmd,asn1_compiler)
368
369	# Build the compiled-in targets
370	# ---------------------------------------------------------------------------
371
372	# To build objects in subdirs, we need to descend into the directories
373	$(sort $(subdir-obj-y)): $(subdir-ym) ;
374
375	#
376	# Rule to compile a set of .o files into one .o file
377	#
378	ifdef builtin-target
379	quiet_cmd_link_o_target = LD $@
380	# If the list of objects to link is empty, just create an empty built-in.o
381	cmd_link_o_target = $(if $(strip $(obj-y)),\
382	$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
383	$(cmd_secanalysis),\
384	rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
385
386	$(builtin-target): $(obj-y) FORCE
387	$(call if_changed,link_o_target)
388
389	targets += $(builtin-target)
390	endif # builtin-target
391
392	#
393	# Rule to create modules.order file
394	#
395	# Create commands to either record .ko file or cat modules.order from
396	# a subdirectory
397	modorder-cmds = \
398	$(foreach m, $(modorder), \
399	$(if $(filter %/modules.order, $m), \
400	cat $m;, echo kernel/$m;))
401
402	$(modorder-target): $(subdir-ym) FORCE
403	$(Q)(cat /dev/null; $(modorder-cmds)) > $@
404
405	#
406	# Rule to compile a set of .o files into one .a file
407	#
408	ifdef lib-target
409	quiet_cmd_link_l_target = AR $@
410	cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
411
412	$(lib-target): $(lib-y) FORCE
413	$(call if_changed,link_l_target)
414
415	targets += $(lib-target)
416	endif
417
418	#
419	# Rule to link composite objects
420	#
421	# Composite objects are specified in kbuild makefile as follows:
422	# <composite-object>-objs := <list of .o files>
423	# or
424	# <composite-object>-y := <list of .o files>
425	link_multi_deps = \
426	$(filter $(addprefix $(obj)/, \
427	$($(subst $(obj)/,,$(@:.o=-objs))) \
428	$($(subst $(obj)/,,$(@:.o=-y)))), $^)
429
430	quiet_cmd_link_multi-y = LD $@
431	cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
432
433	quiet_cmd_link_multi-m = LD [M] $@
434	cmd_link_multi-m = $(cmd_link_multi-y)
435
436	# We would rather have a list of rules like
437	# foo.o: $(foo-objs)
438	# but that's not so easy, so we rather make all composite objects depend
439	# on the set of all their parts
440	$(multi-used-y) : %.o: $(multi-objs-y) FORCE
441	$(call if_changed,link_multi-y)
442
443	$(multi-used-m) : %.o: $(multi-objs-m) FORCE
444	$(call if_changed,link_multi-m)
445	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
446
447	targets += $(multi-used-y) $(multi-used-m)
448
449
450	# Descending
451	# ---------------------------------------------------------------------------
452
453	PHONY += $(subdir-ym)
454	$(subdir-ym):
455	$(Q)$(MAKE) $(build)=$@
456
457	# Add FORCE to the prequisites of a target to force it to be always rebuilt.
458	# ---------------------------------------------------------------------------
459
460	PHONY += FORCE
461
462	FORCE:
463
464	# Read all saved command lines and dependencies for the $(targets) we
465	# may be building above, using $(if_changed{,_dep}). As an
466	# optimization, we don't need to read them if the target does not
467	# exist, we will rebuild anyway in that case.
468
469	targets := $(wildcard $(sort $(targets)))
470	cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
471
472	ifneq ($(cmd_files),)
473	include $(cmd_files)
474	endif
475
476	# Declare the contents of the .PHONY variable as phony. We keep that
477	# information in a variable se we can use it in if_changed and friends.
478
479	.PHONY: $(PHONY)