[J-u-boot.git] / common / cmd_mii.c

/*
 * (C) Copyright 2001
 * Gerald Van Baren, Custom IDEAS, [email protected]
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * MII Utilities
 */

#include <common.h>
#include <command.h>
#include <miiphy.h>

typedef struct _MII_reg_desc_t {
	ushort regno;
	char * name;
} MII_reg_desc_t;

static const MII_reg_desc_t reg_0_5_desc_tbl[] = {
	{ MII_BMCR,      "PHY control register" },
	{ MII_BMSR,      "PHY status register" },
	{ MII_PHYSID1,   "PHY ID 1 register" },
	{ MII_PHYSID2,   "PHY ID 2 register" },
	{ MII_ADVERTISE, "Autonegotiation advertisement register" },
	{ MII_LPA,       "Autonegotiation partner abilities register" },
};

typedef struct _MII_field_desc_t {
	ushort hi;
	ushort lo;
	ushort mask;
	char * name;
} MII_field_desc_t;

static const MII_field_desc_t reg_0_desc_tbl[] = {
	{ 15, 15, 0x01, "reset"                        },
	{ 14, 14, 0x01, "loopback"                     },
	{ 13,  6, 0x81, "speed selection"              }, /* special */
	{ 12, 12, 0x01, "A/N enable"                   },
	{ 11, 11, 0x01, "power-down"                   },
	{ 10, 10, 0x01, "isolate"                      },
	{  9,  9, 0x01, "restart A/N"                  },
	{  8,  8, 0x01, "duplex"                       }, /* special */
	{  7,  7, 0x01, "collision test enable"        },
	{  5,  0, 0x3f, "(reserved)"                   }
};

static const MII_field_desc_t reg_1_desc_tbl[] = {
	{ 15, 15, 0x01, "100BASE-T4 able"              },
	{ 14, 14, 0x01, "100BASE-X  full duplex able"  },
	{ 13, 13, 0x01, "100BASE-X  half duplex able"  },
	{ 12, 12, 0x01, "10 Mbps    full duplex able"  },
	{ 11, 11, 0x01, "10 Mbps    half duplex able"  },
	{ 10, 10, 0x01, "100BASE-T2 full duplex able"  },
	{  9,  9, 0x01, "100BASE-T2 half duplex able"  },
	{  8,  8, 0x01, "extended status"              },
	{  7,  7, 0x01, "(reserved)"                   },
	{  6,  6, 0x01, "MF preamble suppression"      },
	{  5,  5, 0x01, "A/N complete"                 },
	{  4,  4, 0x01, "remote fault"                 },
	{  3,  3, 0x01, "A/N able"                     },
	{  2,  2, 0x01, "link status"                  },
	{  1,  1, 0x01, "jabber detect"                },
	{  0,  0, 0x01, "extended capabilities"        },
};

static const MII_field_desc_t reg_2_desc_tbl[] = {
	{ 15,  0, 0xffff, "OUI portion"                },
};

static const MII_field_desc_t reg_3_desc_tbl[] = {
	{ 15, 10, 0x3f, "OUI portion"                },
	{  9,  4, 0x3f, "manufacturer part number"   },
	{  3,  0, 0x0f, "manufacturer rev. number"   },
};

static const MII_field_desc_t reg_4_desc_tbl[] = {
	{ 15, 15, 0x01, "next page able"               },
	{ 14, 14, 0x01, "reserved"                     },
	{ 13, 13, 0x01, "remote fault"                 },
	{ 12, 12, 0x01, "reserved"                     },
	{ 11, 11, 0x01, "asymmetric pause"             },
	{ 10, 10, 0x01, "pause enable"                 },
	{  9,  9, 0x01, "100BASE-T4 able"              },
	{  8,  8, 0x01, "100BASE-TX full duplex able"  },
	{  7,  7, 0x01, "100BASE-TX able"              },
	{  6,  6, 0x01, "10BASE-T   full duplex able"  },
	{  5,  5, 0x01, "10BASE-T   able"              },
	{  4,  0, 0x1f, "xxx to do"                    },
};

static const MII_field_desc_t reg_5_desc_tbl[] = {
	{ 15, 15, 0x01, "next page able"               },
	{ 14, 14, 0x01, "acknowledge"                  },
	{ 13, 13, 0x01, "remote fault"                 },
	{ 12, 12, 0x01, "(reserved)"                   },
	{ 11, 11, 0x01, "asymmetric pause able"        },
	{ 10, 10, 0x01, "pause able"                   },
	{  9,  9, 0x01, "100BASE-T4 able"              },
	{  8,  8, 0x01, "100BASE-X full duplex able"   },
	{  7,  7, 0x01, "100BASE-TX able"              },
	{  6,  6, 0x01, "10BASE-T full duplex able"    },
	{  5,  5, 0x01, "10BASE-T able"                },
	{  4,  0, 0x1f, "xxx to do"                    },
};
typedef struct _MII_field_desc_and_len_t {
	const MII_field_desc_t *pdesc;
	ushort len;
} MII_field_desc_and_len_t;

static const MII_field_desc_and_len_t desc_and_len_tbl[] = {
	{ reg_0_desc_tbl, ARRAY_SIZE(reg_0_desc_tbl)   },
	{ reg_1_desc_tbl, ARRAY_SIZE(reg_1_desc_tbl)   },
	{ reg_2_desc_tbl, ARRAY_SIZE(reg_2_desc_tbl)   },
	{ reg_3_desc_tbl, ARRAY_SIZE(reg_3_desc_tbl)   },
	{ reg_4_desc_tbl, ARRAY_SIZE(reg_4_desc_tbl)   },
	{ reg_5_desc_tbl, ARRAY_SIZE(reg_5_desc_tbl)   },
};

static void dump_reg(
	ushort             regval,
	const MII_reg_desc_t *prd,
	const MII_field_desc_and_len_t *pdl);

static int special_field(
	ushort regno,
	const MII_field_desc_t *pdesc,
	ushort regval);

static void MII_dump_0_to_5(
	ushort regvals[6],
	uchar reglo,
	uchar reghi)
{
	ulong i;

	for (i = 0; i < 6; i++) {
		if ((reglo <= i) && (i <= reghi))
			dump_reg(regvals[i], &reg_0_5_desc_tbl[i],
				&desc_and_len_tbl[i]);
	}
}

static void dump_reg(
	ushort             regval,
	const MII_reg_desc_t *prd,
	const MII_field_desc_and_len_t *pdl)
{
	ulong i;
	ushort mask_in_place;
	const MII_field_desc_t *pdesc;

	printf("%u.     (%04hx)                 -- %s --\n",
		prd->regno, regval, prd->name);

	for (i = 0; i < pdl->len; i++) {
		pdesc = &pdl->pdesc[i];

		mask_in_place = pdesc->mask << pdesc->lo;

		printf("  (%04hx:%04hx) %u.",
			mask_in_place,
			regval & mask_in_place,
			prd->regno);

		if (special_field(prd->regno, pdesc, regval)) {
		}
		else {
			if (pdesc->hi == pdesc->lo)
				printf("%2u   ", pdesc->lo);
			else
				printf("%2u-%2u", pdesc->hi, pdesc->lo);
			printf(" = %5u    %s",
				(regval & mask_in_place) >> pdesc->lo,
				pdesc->name);
		}
		printf("\n");

	}
	printf("\n");
}

/* Special fields:
** 0.6,13
** 0.8
** 2.15-0
** 3.15-0
** 4.4-0
** 5.4-0
*/

static int special_field(
	ushort regno,
	const MII_field_desc_t *pdesc,
	ushort regval)
{
	if ((regno == MII_BMCR) && (pdesc->lo == 6)) {
		ushort speed_bits = regval & (BMCR_SPEED1000 | BMCR_SPEED100);
		printf("%2u,%2u =   b%u%u    speed selection = %s Mbps",
			6, 13,
			(regval >>  6) & 1,
			(regval >> 13) & 1,
			speed_bits == BMCR_SPEED1000 ? "1000" :
			speed_bits == BMCR_SPEED100  ? "100" :
			"10");
		return 1;
	}

	else if ((regno == MII_BMCR) && (pdesc->lo == 8)) {
		printf("%2u    = %5u    duplex = %s",
			pdesc->lo,
			(regval >>  pdesc->lo) & 1,
			((regval >> pdesc->lo) & 1) ? "full" : "half");
		return 1;
	}

	else if ((regno == MII_ADVERTISE) && (pdesc->lo == 0)) {
		ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
		printf("%2u-%2u = %5u    selector = %s",
			pdesc->hi, pdesc->lo, sel_bits,
			sel_bits == PHY_ANLPAR_PSB_802_3 ?
				"IEEE 802.3" :
			sel_bits == PHY_ANLPAR_PSB_802_9 ?
				"IEEE 802.9 ISLAN-16T" :
			"???");
		return 1;
	}

	else if ((regno == MII_LPA) && (pdesc->lo == 0)) {
		ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
		printf("%2u-%2u =     %u    selector = %s",
			pdesc->hi, pdesc->lo, sel_bits,
			sel_bits == PHY_ANLPAR_PSB_802_3 ?
				"IEEE 802.3" :
			sel_bits == PHY_ANLPAR_PSB_802_9 ?
				"IEEE 802.9 ISLAN-16T" :
			"???");
		return 1;
	}

	return 0;
}

static char last_op[2];
static uint last_data;
static uint last_addr_lo;
static uint last_addr_hi;
static uint last_reg_lo;
static uint last_reg_hi;

static void extract_range(
	char * input,
	unsigned char * plo,
	unsigned char * phi)
{
	char * end;
	*plo = simple_strtoul(input, &end, 16);
	if (*end == '-') {
		end++;
		*phi = simple_strtoul(end, NULL, 16);
	}
	else {
		*phi = *plo;
	}
}

/* ---------------------------------------------------------------- */
static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	char		op[2];
	unsigned char	addrlo, addrhi, reglo, reghi;
	unsigned char	addr, reg;
	unsigned short	data;
	int		rcode = 0;
	const char	*devname;

	if (argc < 2)
		return CMD_RET_USAGE;

#if defined(CONFIG_MII_INIT)
	mii_init ();
#endif

	/*
	 * We use the last specified parameters, unless new ones are
	 * entered.
	 */
	op[0] = last_op[0];
	op[1] = last_op[1];
	addrlo = last_addr_lo;
	addrhi = last_addr_hi;
	reglo  = last_reg_lo;
	reghi  = last_reg_hi;
	data   = last_data;

	if ((flag & CMD_FLAG_REPEAT) == 0) {
		op[0] = argv[1][0];
		if (strlen(argv[1]) > 1)
			op[1] = argv[1][1];
		else
			op[1] = '\0';

		if (argc >= 3)
			extract_range(argv[2], &addrlo, &addrhi);
		if (argc >= 4)
			extract_range(argv[3], &reglo, &reghi);
		if (argc >= 5)
			data = simple_strtoul (argv[4], NULL, 16);
	}

	/* use current device */
	devname = miiphy_get_current_dev();

	/*
	 * check info/read/write.
	 */
	if (op[0] == 'i') {
		unsigned char j, start, end;
		unsigned int oui;
		unsigned char model;
		unsigned char rev;

		/*
		 * Look for any and all PHYs.  Valid addresses are 0..31.
		 */
		if (argc >= 3) {
			start = addrlo; end = addrhi;
		} else {
			start = 0; end = 31;
		}

		for (j = start; j <= end; j++) {
			if (miiphy_info (devname, j, &oui, &model, &rev) == 0) {
				printf("PHY 0x%02X: "
					"OUI = 0x%04X, "
					"Model = 0x%02X, "
					"Rev = 0x%02X, "
					"%3dbase%s, %s\n",
					j, oui, model, rev,
					miiphy_speed (devname, j),
					miiphy_is_1000base_x (devname, j)
						? "X" : "T",
					(miiphy_duplex (devname, j) == FULL)
						? "FDX" : "HDX");
			}
		}
	} else if (op[0] == 'r') {
		for (addr = addrlo; addr <= addrhi; addr++) {
			for (reg = reglo; reg <= reghi; reg++) {
				data = 0xffff;
				if (miiphy_read (devname, addr, reg, &data) != 0) {
					printf(
					"Error reading from the PHY addr=%02x reg=%02x\n",
						addr, reg);
					rcode = 1;
				} else {
					if ((addrlo != addrhi) || (reglo != reghi))
						printf("addr=%02x reg=%02x data=",
							(uint)addr, (uint)reg);
					printf("%04X\n", data & 0x0000FFFF);
				}
			}
			if ((addrlo != addrhi) && (reglo != reghi))
				printf("\n");
		}
	} else if (op[0] == 'w') {
		for (addr = addrlo; addr <= addrhi; addr++) {
			for (reg = reglo; reg <= reghi; reg++) {
				if (miiphy_write (devname, addr, reg, data) != 0) {
					printf("Error writing to the PHY addr=%02x reg=%02x\n",
						addr, reg);
					rcode = 1;
				}
			}
		}
	} else if (strncmp(op, "du", 2) == 0) {
		ushort regs[6];
		int ok = 1;
		if ((reglo > 5) || (reghi > 5)) {
			printf(
				"The MII dump command only formats the "
				"standard MII registers, 0-5.\n");
			return 1;
		}
		for (addr = addrlo; addr <= addrhi; addr++) {
			for (reg = reglo; reg < reghi + 1; reg++) {
				if (miiphy_read(devname, addr, reg, &regs[reg]) != 0) {
					ok = 0;
					printf(
					"Error reading from the PHY addr=%02x reg=%02x\n",
						addr, reg);
					rcode = 1;
				}
			}
			if (ok)
				MII_dump_0_to_5(regs, reglo, reghi);
			printf("\n");
		}
	} else if (strncmp(op, "de", 2) == 0) {
		if (argc == 2)
			miiphy_listdev ();
		else
			miiphy_set_current_dev (argv[2]);
	} else {
		return CMD_RET_USAGE;
	}

	/*
	 * Save the parameters for repeats.
	 */
	last_op[0] = op[0];
	last_op[1] = op[1];
	last_addr_lo = addrlo;
	last_addr_hi = addrhi;
	last_reg_lo  = reglo;
	last_reg_hi  = reghi;
	last_data    = data;

	return rcode;
}

/***************************************************/

U_BOOT_CMD(
	mii,	5,	1,	do_mii,
	"MII utility commands",
	"device                     - list available devices\n"
	"mii device <devname>           - set current device\n"
	"mii info   <addr>              - display MII PHY info\n"
	"mii read   <addr> <reg>        - read  MII PHY <addr> register <reg>\n"
	"mii write  <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
	"mii dump   <addr> <reg>        - pretty-print <addr> <reg> (0-5 only)\n"
	"Addr and/or reg may be ranges, e.g. 2-7."
);
Commit	Line	Data
dd7d41f0 WD	1	/*
	2	* (C) Copyright 2001
	3	* Gerald Van Baren, Custom IDEAS, [email protected]
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	/*
	25	* MII Utilities
	26	*/
	27
	28	#include <common.h>
	29	#include <command.h>
e35745bb WD	30	#include <miiphy.h>
e35745bb WD	31
2471111d WD	32	typedef struct _MII_reg_desc_t {
	33	ushort regno;
	34	char * name;
	35	} MII_reg_desc_t;
	36
3a5ee0b1	37	static const MII_reg_desc_t reg_0_5_desc_tbl[] = {
8ef583a0 MF	38	{ MII_BMCR, "PHY control register" },
	39	{ MII_BMSR, "PHY status register" },
	40	{ MII_PHYSID1, "PHY ID 1 register" },
	41	{ MII_PHYSID2, "PHY ID 2 register" },
	42	{ MII_ADVERTISE, "Autonegotiation advertisement register" },
	43	{ MII_LPA, "Autonegotiation partner abilities register" },
2471111d WD	44	};
	45
	46	typedef struct _MII_field_desc_t {
	47	ushort hi;
	48	ushort lo;
	49	ushort mask;
	50	char * name;
	51	} MII_field_desc_t;
	52
3a5ee0b1	53	static const MII_field_desc_t reg_0_desc_tbl[] = {
2471111d WD	54	{ 15, 15, 0x01, "reset" },
	55	{ 14, 14, 0x01, "loopback" },
	56	{ 13, 6, 0x81, "speed selection" }, /* special */
	57	{ 12, 12, 0x01, "A/N enable" },
	58	{ 11, 11, 0x01, "power-down" },
	59	{ 10, 10, 0x01, "isolate" },
	60	{ 9, 9, 0x01, "restart A/N" },
	61	{ 8, 8, 0x01, "duplex" }, /* special */
	62	{ 7, 7, 0x01, "collision test enable" },
	63	{ 5, 0, 0x3f, "(reserved)" }
	64	};
	65
3a5ee0b1	66	static const MII_field_desc_t reg_1_desc_tbl[] = {
2471111d WD	67	{ 15, 15, 0x01, "100BASE-T4 able" },
	68	{ 14, 14, 0x01, "100BASE-X full duplex able" },
	69	{ 13, 13, 0x01, "100BASE-X half duplex able" },
	70	{ 12, 12, 0x01, "10 Mbps full duplex able" },
	71	{ 11, 11, 0x01, "10 Mbps half duplex able" },
	72	{ 10, 10, 0x01, "100BASE-T2 full duplex able" },
	73	{ 9, 9, 0x01, "100BASE-T2 half duplex able" },
	74	{ 8, 8, 0x01, "extended status" },
	75	{ 7, 7, 0x01, "(reserved)" },
	76	{ 6, 6, 0x01, "MF preamble suppression" },
	77	{ 5, 5, 0x01, "A/N complete" },
	78	{ 4, 4, 0x01, "remote fault" },
	79	{ 3, 3, 0x01, "A/N able" },
	80	{ 2, 2, 0x01, "link status" },
	81	{ 1, 1, 0x01, "jabber detect" },
	82	{ 0, 0, 0x01, "extended capabilities" },
	83	};
	84
3a5ee0b1	85	static const MII_field_desc_t reg_2_desc_tbl[] = {
2471111d WD	86	{ 15, 0, 0xffff, "OUI portion" },
	87	};
	88
3a5ee0b1	89	static const MII_field_desc_t reg_3_desc_tbl[] = {
2471111d WD	90	{ 15, 10, 0x3f, "OUI portion" },
	91	{ 9, 4, 0x3f, "manufacturer part number" },
	92	{ 3, 0, 0x0f, "manufacturer rev. number" },
	93	};
	94
3a5ee0b1	95	static const MII_field_desc_t reg_4_desc_tbl[] = {
2471111d WD	96	{ 15, 15, 0x01, "next page able" },
	97	{ 14, 14, 0x01, "reserved" },
	98	{ 13, 13, 0x01, "remote fault" },
	99	{ 12, 12, 0x01, "reserved" },
	100	{ 11, 11, 0x01, "asymmetric pause" },
	101	{ 10, 10, 0x01, "pause enable" },
	102	{ 9, 9, 0x01, "100BASE-T4 able" },
	103	{ 8, 8, 0x01, "100BASE-TX full duplex able" },
	104	{ 7, 7, 0x01, "100BASE-TX able" },
	105	{ 6, 6, 0x01, "10BASE-T full duplex able" },
	106	{ 5, 5, 0x01, "10BASE-T able" },
	107	{ 4, 0, 0x1f, "xxx to do" },
	108	};
	109
3a5ee0b1	110	static const MII_field_desc_t reg_5_desc_tbl[] = {
2471111d WD	111	{ 15, 15, 0x01, "next page able" },
	112	{ 14, 14, 0x01, "acknowledge" },
	113	{ 13, 13, 0x01, "remote fault" },
	114	{ 12, 12, 0x01, "(reserved)" },
	115	{ 11, 11, 0x01, "asymmetric pause able" },
	116	{ 10, 10, 0x01, "pause able" },
	117	{ 9, 9, 0x01, "100BASE-T4 able" },
	118	{ 8, 8, 0x01, "100BASE-X full duplex able" },
	119	{ 7, 7, 0x01, "100BASE-TX able" },
	120	{ 6, 6, 0x01, "10BASE-T full duplex able" },
	121	{ 5, 5, 0x01, "10BASE-T able" },
	122	{ 4, 0, 0x1f, "xxx to do" },
	123	};
2471111d	124	typedef struct _MII_field_desc_and_len_t {
3a5ee0b1	125	const MII_field_desc_t *pdesc;
2471111d WD	126	ushort len;
	127	} MII_field_desc_and_len_t;
	128
3a5ee0b1 MF	129	static const MII_field_desc_and_len_t desc_and_len_tbl[] = {
	130	{ reg_0_desc_tbl, ARRAY_SIZE(reg_0_desc_tbl) },
	131	{ reg_1_desc_tbl, ARRAY_SIZE(reg_1_desc_tbl) },
	132	{ reg_2_desc_tbl, ARRAY_SIZE(reg_2_desc_tbl) },
	133	{ reg_3_desc_tbl, ARRAY_SIZE(reg_3_desc_tbl) },
	134	{ reg_4_desc_tbl, ARRAY_SIZE(reg_4_desc_tbl) },
	135	{ reg_5_desc_tbl, ARRAY_SIZE(reg_5_desc_tbl) },
2471111d WD	136	};
	137
	138	static void dump_reg(
	139	ushort regval,
3a5ee0b1 MF	140	const MII_reg_desc_t *prd,
3a5ee0b1 MF	141	const MII_field_desc_and_len_t *pdl);
2471111d WD	142
	143	static int special_field(
	144	ushort regno,
3a5ee0b1	145	const MII_field_desc_t *pdesc,
2471111d WD	146	ushort regval);
2471111d WD	147
3a5ee0b1	148	static void MII_dump_0_to_5(
2471111d WD	149	ushort regvals[6],
	150	uchar reglo,
	151	uchar reghi)
	152	{
	153	ulong i;
	154
	155	for (i = 0; i < 6; i++) {
	156	if ((reglo <= i) && (i <= reghi))
	157	dump_reg(regvals[i], &reg_0_5_desc_tbl[i],
	158	&desc_and_len_tbl[i]);
	159	}
	160	}
	161
	162	static void dump_reg(
	163	ushort regval,
3a5ee0b1 MF	164	const MII_reg_desc_t *prd,
3a5ee0b1 MF	165	const MII_field_desc_and_len_t *pdl)
2471111d WD	166	{
	167	ulong i;
	168	ushort mask_in_place;
3a5ee0b1	169	const MII_field_desc_t *pdesc;
2471111d WD	170
	171	printf("%u. (%04hx) -- %s --\n",
	172	prd->regno, regval, prd->name);
	173
	174	for (i = 0; i < pdl->len; i++) {
	175	pdesc = &pdl->pdesc[i];
	176
	177	mask_in_place = pdesc->mask << pdesc->lo;
	178
	179	printf(" (%04hx:%04hx) %u.",
	180	mask_in_place,
	181	regval & mask_in_place,
	182	prd->regno);
	183
	184	if (special_field(prd->regno, pdesc, regval)) {
	185	}
	186	else {
	187	if (pdesc->hi == pdesc->lo)
	188	printf("%2u ", pdesc->lo);
	189	else
	190	printf("%2u-%2u", pdesc->hi, pdesc->lo);
	191	printf(" = %5u %s",
	192	(regval & mask_in_place) >> pdesc->lo,
	193	pdesc->name);
	194	}
	195	printf("\n");
	196
	197	}
	198	printf("\n");
	199	}
	200
	201	/* Special fields:
	202	** 0.6,13
	203	** 0.8
	204	** 2.15-0
	205	** 3.15-0
	206	** 4.4-0
	207	** 5.4-0
	208	*/
	209
	210	static int special_field(
	211	ushort regno,
3a5ee0b1	212	const MII_field_desc_t *pdesc,
2471111d WD	213	ushort regval)
2471111d WD	214	{
8ef583a0 MF	215	if ((regno == MII_BMCR) && (pdesc->lo == 6)) {
8ef583a0 MF	216	ushort speed_bits = regval & (BMCR_SPEED1000 \| BMCR_SPEED100);
2471111d WD	217	printf("%2u,%2u = b%u%u speed selection = %s Mbps",
	218	6, 13,
	219	(regval >> 6) & 1,
	220	(regval >> 13) & 1,
8ef583a0 MF	221	speed_bits == BMCR_SPEED1000 ? "1000" :
	222	speed_bits == BMCR_SPEED100 ? "100" :
	223	"10");
2471111d WD	224	return 1;
	225	}
	226
8ef583a0	227	else if ((regno == MII_BMCR) && (pdesc->lo == 8)) {
2471111d WD	228	printf("%2u = %5u duplex = %s",
	229	pdesc->lo,
	230	(regval >> pdesc->lo) & 1,
	231	((regval >> pdesc->lo) & 1) ? "full" : "half");
	232	return 1;
	233	}
	234
8ef583a0	235	else if ((regno == MII_ADVERTISE) && (pdesc->lo == 0)) {
2471111d WD	236	ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
	237	printf("%2u-%2u = %5u selector = %s",
	238	pdesc->hi, pdesc->lo, sel_bits,
b9711de1	239	sel_bits == PHY_ANLPAR_PSB_802_3 ?
2471111d	240	"IEEE 802.3" :
b9711de1	241	sel_bits == PHY_ANLPAR_PSB_802_9 ?
2471111d WD	242	"IEEE 802.9 ISLAN-16T" :
	243	"???");
	244	return 1;
	245	}
	246
8ef583a0	247	else if ((regno == MII_LPA) && (pdesc->lo == 0)) {
2471111d WD	248	ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
	249	printf("%2u-%2u = %u selector = %s",
	250	pdesc->hi, pdesc->lo, sel_bits,
b9711de1	251	sel_bits == PHY_ANLPAR_PSB_802_3 ?
2471111d	252	"IEEE 802.3" :
b9711de1	253	sel_bits == PHY_ANLPAR_PSB_802_9 ?
2471111d WD	254	"IEEE 802.9 ISLAN-16T" :
	255	"???");
	256	return 1;
	257	}
	258
	259	return 0;
	260	}
	261
3a5ee0b1 MF	262	static char last_op[2];
	263	static uint last_data;
	264	static uint last_addr_lo;
	265	static uint last_addr_hi;
	266	static uint last_reg_lo;
	267	static uint last_reg_hi;
2471111d WD	268
	269	static void extract_range(
	270	char * input,
	271	unsigned char * plo,
	272	unsigned char * phi)
	273	{
	274	char * end;
	275	*plo = simple_strtoul(input, &end, 16);
	276	if (*end == '-') {
	277	end++;
	278	*phi = simple_strtoul(end, NULL, 16);
	279	}
	280	else {
	281	phi = plo;
	282	}
	283	}
	284
5cf91d6b	285	/* ---------------------------------------------------------------- */
3a5ee0b1	286	static int do_mii(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
2471111d	287	{
63ff004c	288	char op[2];
2471111d	289	unsigned char addrlo, addrhi, reglo, reghi;
2b792afc	290	unsigned char addr, reg;
2471111d WD	291	unsigned short data;
2471111d WD	292	int rcode = 0;
5700bb63	293	const char *devname;
2471111d	294
47e26b1b	295	if (argc < 2)
4c12eeb8	296	return CMD_RET_USAGE;
b9173af7	297
0f3ba7e9	298	#if defined(CONFIG_MII_INIT)
2471111d WD	299	mii_init ();
	300	#endif
	301
	302	/*
	303	* We use the last specified parameters, unless new ones are
	304	* entered.
	305	*/
63ff004c MB	306	op[0] = last_op[0];
63ff004c MB	307	op[1] = last_op[1];
2471111d WD	308	addrlo = last_addr_lo;
	309	addrhi = last_addr_hi;
	310	reglo = last_reg_lo;
	311	reghi = last_reg_hi;
	312	data = last_data;
	313
	314	if ((flag & CMD_FLAG_REPEAT) == 0) {
63ff004c MB	315	op[0] = argv[1][0];
	316	if (strlen(argv[1]) > 1)
	317	op[1] = argv[1][1];
	318	else
	319	op[1] = '\0';
	320
2471111d WD	321	if (argc >= 3)
	322	extract_range(argv[2], &addrlo, &addrhi);
	323	if (argc >= 4)
	324	extract_range(argv[3], &reglo, &reghi);
	325	if (argc >= 5)
	326	data = simple_strtoul (argv[4], NULL, 16);
	327	}
	328
63ff004c MB	329	/* use current device */
	330	devname = miiphy_get_current_dev();
	331
2471111d WD	332	/*
	333	* check info/read/write.
	334	*/
63ff004c	335	if (op[0] == 'i') {
2471111d WD	336	unsigned char j, start, end;
	337	unsigned int oui;
	338	unsigned char model;
	339	unsigned char rev;
	340
	341	/*
	342	* Look for any and all PHYs. Valid addresses are 0..31.
	343	*/
	344	if (argc >= 3) {
2b792afc	345	start = addrlo; end = addrhi;
2471111d	346	} else {
2b792afc	347	start = 0; end = 31;
2471111d WD	348	}
2471111d WD	349
2b792afc	350	for (j = start; j <= end; j++) {
63ff004c	351	if (miiphy_info (devname, j, &oui, &model, &rev) == 0) {
2471111d WD	352	printf("PHY 0x%02X: "
	353	"OUI = 0x%04X, "
	354	"Model = 0x%02X, "
	355	"Rev = 0x%02X, "
71bc6e64	356	"%3dbase%s, %s\n",
2471111d	357	j, oui, model, rev,
63ff004c	358	miiphy_speed (devname, j),
71bc6e64 LJ	359	miiphy_is_1000base_x (devname, j)
71bc6e64 LJ	360	? "X" : "T",
63ff004c MB	361	(miiphy_duplex (devname, j) == FULL)
63ff004c MB	362	? "FDX" : "HDX");
2471111d WD	363	}
2471111d WD	364	}
63ff004c	365	} else if (op[0] == 'r') {
2471111d WD	366	for (addr = addrlo; addr <= addrhi; addr++) {
	367	for (reg = reglo; reg <= reghi; reg++) {
	368	data = 0xffff;
63ff004c	369	if (miiphy_read (devname, addr, reg, &data) != 0) {
2471111d WD	370	printf(
	371	"Error reading from the PHY addr=%02x reg=%02x\n",
	372	addr, reg);
	373	rcode = 1;
2b792afc	374	} else {
2471111d WD	375	if ((addrlo != addrhi) \|\| (reglo != reghi))
	376	printf("addr=%02x reg=%02x data=",
	377	(uint)addr, (uint)reg);
	378	printf("%04X\n", data & 0x0000FFFF);
	379	}
	380	}
	381	if ((addrlo != addrhi) && (reglo != reghi))
	382	printf("\n");
	383	}
63ff004c	384	} else if (op[0] == 'w') {
2471111d WD	385	for (addr = addrlo; addr <= addrhi; addr++) {
2471111d WD	386	for (reg = reglo; reg <= reghi; reg++) {
63ff004c	387	if (miiphy_write (devname, addr, reg, data) != 0) {
2471111d WD	388	printf("Error writing to the PHY addr=%02x reg=%02x\n",
	389	addr, reg);
	390	rcode = 1;
	391	}
	392	}
	393	}
63ff004c	394	} else if (strncmp(op, "du", 2) == 0) {
2471111d WD	395	ushort regs[6];
	396	int ok = 1;
	397	if ((reglo > 5) \|\| (reghi > 5)) {
	398	printf(
	399	"The MII dump command only formats the "
	400	"standard MII registers, 0-5.\n");
	401	return 1;
	402	}
	403	for (addr = addrlo; addr <= addrhi; addr++) {
63ff004c MB	404	for (reg = reglo; reg < reghi + 1; reg++) {
63ff004c MB	405	if (miiphy_read(devname, addr, reg, &regs[reg]) != 0) {
2471111d WD	406	ok = 0;
	407	printf(
	408	"Error reading from the PHY addr=%02x reg=%02x\n",
	409	addr, reg);
	410	rcode = 1;
	411	}
	412	}
	413	if (ok)
	414	MII_dump_0_to_5(regs, reglo, reghi);
	415	printf("\n");
	416	}
63ff004c MB	417	} else if (strncmp(op, "de", 2) == 0) {
	418	if (argc == 2)
	419	miiphy_listdev ();
	420	else
	421	miiphy_set_current_dev (argv[2]);
2471111d	422	} else {
4c12eeb8	423	return CMD_RET_USAGE;
2471111d WD	424	}
	425
	426	/*
	427	* Save the parameters for repeats.
	428	*/
63ff004c MB	429	last_op[0] = op[0];
63ff004c MB	430	last_op[1] = op[1];
2471111d WD	431	last_addr_lo = addrlo;
	432	last_addr_hi = addrhi;
	433	last_reg_lo = reglo;
	434	last_reg_hi = reghi;
	435	last_data = data;
	436
	437	return rcode;
	438	}
	439
	440	/***************************************************/
	441
	442	U_BOOT_CMD(
	443	mii, 5, 1, do_mii,
2fb2604d	444	"MII utility commands",
63ff004c MB	445	"device - list available devices\n"
	446	"mii device <devname> - set current device\n"
	447	"mii info <addr> - display MII PHY info\n"
	448	"mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
	449	"mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
	450	"mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
a89c33db	451	"Addr and/or reg may be ranges, e.g. 2-7."
2471111d	452	);