[J-u-boot.git] / common / cmd_mii.c

/*
 * (C) Copyright 2001
 * Gerald Van Baren, Custom IDEAS, [email protected]
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * MII Utilities
 */

#include <common.h>
#include <command.h>
#include <miiphy.h>

typedef struct _MII_reg_desc_t {
	ushort regno;
	char * name;
} MII_reg_desc_t;

MII_reg_desc_t reg_0_5_desc_tbl[] = {
	{ 0,   "PHY control register"                },
	{ 1,   "PHY status register"                 },
	{ 2,   "PHY ID 1 register"                   },
	{ 3,   "PHY ID 2 register"                   },
	{ 4,   "Autonegotiation advertisement register" },
	{ 5,   "Autonegotiation partner abilities register" },
};

typedef struct _MII_field_desc_t {
	ushort hi;
	ushort lo;
	ushort mask;
	char * name;
} MII_field_desc_t;

MII_field_desc_t reg_0_desc_tbl[] = {
	{ 15, 15, 0x01, "reset"                        },
	{ 14, 14, 0x01, "loopback"                     },
	{ 13,  6, 0x81, "speed selection"              }, /* special */
	{ 12, 12, 0x01, "A/N enable"                   },
	{ 11, 11, 0x01, "power-down"                   },
	{ 10, 10, 0x01, "isolate"                      },
	{  9,  9, 0x01, "restart A/N"                  },
	{  8,  8, 0x01, "duplex"                       }, /* special */
	{  7,  7, 0x01, "collision test enable"        },
	{  5,  0, 0x3f, "(reserved)"                   }
};

MII_field_desc_t reg_1_desc_tbl[] = {
	{ 15, 15, 0x01, "100BASE-T4 able"              },
	{ 14, 14, 0x01, "100BASE-X  full duplex able"  },
	{ 13, 13, 0x01, "100BASE-X  half duplex able"  },
	{ 12, 12, 0x01, "10 Mbps    full duplex able"  },
	{ 11, 11, 0x01, "10 Mbps    half duplex able"  },
	{ 10, 10, 0x01, "100BASE-T2 full duplex able"  },
	{  9,  9, 0x01, "100BASE-T2 half duplex able"  },
	{  8,  8, 0x01, "extended status"              },
	{  7,  7, 0x01, "(reserved)"                   },
	{  6,  6, 0x01, "MF preamble suppression"      },
	{  5,  5, 0x01, "A/N complete"                 },
	{  4,  4, 0x01, "remote fault"                 },
	{  3,  3, 0x01, "A/N able"                     },
	{  2,  2, 0x01, "link status"                  },
	{  1,  1, 0x01, "jabber detect"                },
	{  0,  0, 0x01, "extended capabilities"        },
};

MII_field_desc_t reg_2_desc_tbl[] = {
	{ 15,  0, 0xffff, "OUI portion"                },
};

MII_field_desc_t reg_3_desc_tbl[] = {
	{ 15, 10, 0x3f, "OUI portion"                },
	{  9,  4, 0x3f, "manufacturer part number"   },
	{  3,  0, 0x0f, "manufacturer rev. number"   },
};

MII_field_desc_t reg_4_desc_tbl[] = {
	{ 15, 15, 0x01, "next page able"               },
	{ 14, 14, 0x01, "reserved"                     },
	{ 13, 13, 0x01, "remote fault"                 },
	{ 12, 12, 0x01, "reserved"                     },
	{ 11, 11, 0x01, "asymmetric pause"             },
	{ 10, 10, 0x01, "pause enable"                 },
	{  9,  9, 0x01, "100BASE-T4 able"              },
	{  8,  8, 0x01, "100BASE-TX full duplex able"  },
	{  7,  7, 0x01, "100BASE-TX able"              },
	{  6,  6, 0x01, "10BASE-T   full duplex able"  },
	{  5,  5, 0x01, "10BASE-T   able"              },
	{  4,  0, 0x1f, "xxx to do"                    },
};

MII_field_desc_t reg_5_desc_tbl[] = {
	{ 15, 15, 0x01, "next page able"               },
	{ 14, 14, 0x01, "acknowledge"                  },
	{ 13, 13, 0x01, "remote fault"                 },
	{ 12, 12, 0x01, "(reserved)"                   },
	{ 11, 11, 0x01, "asymmetric pause able"        },
	{ 10, 10, 0x01, "pause able"                   },
	{  9,  9, 0x01, "100BASE-T4 able"              },
	{  8,  8, 0x01, "100BASE-X full duplex able"   },
	{  7,  7, 0x01, "100BASE-TX able"              },
	{  6,  6, 0x01, "10BASE-T full duplex able"    },
	{  5,  5, 0x01, "10BASE-T able"                },
	{  4,  0, 0x1f, "xxx to do"                    },
};

#define DESC0LEN (sizeof(reg_0_desc_tbl)/sizeof(reg_0_desc_tbl[0]))
#define DESC1LEN (sizeof(reg_1_desc_tbl)/sizeof(reg_1_desc_tbl[0]))
#define DESC2LEN (sizeof(reg_2_desc_tbl)/sizeof(reg_2_desc_tbl[0]))
#define DESC3LEN (sizeof(reg_3_desc_tbl)/sizeof(reg_3_desc_tbl[0]))
#define DESC4LEN (sizeof(reg_4_desc_tbl)/sizeof(reg_4_desc_tbl[0]))
#define DESC5LEN (sizeof(reg_5_desc_tbl)/sizeof(reg_5_desc_tbl[0]))

typedef struct _MII_field_desc_and_len_t {
	MII_field_desc_t * pdesc;
	ushort len;
} MII_field_desc_and_len_t;

MII_field_desc_and_len_t desc_and_len_tbl[] = {
	{ reg_0_desc_tbl, DESC0LEN },
	{ reg_1_desc_tbl, DESC1LEN },
	{ reg_2_desc_tbl, DESC2LEN },
	{ reg_3_desc_tbl, DESC3LEN },
	{ reg_4_desc_tbl, DESC4LEN },
	{ reg_5_desc_tbl, DESC5LEN },
};

static void dump_reg(
	ushort             regval,
	MII_reg_desc_t   * prd,
	MII_field_desc_and_len_t * pdl);

static int special_field(
	ushort regno,
	MII_field_desc_t * pdesc,
	ushort regval);

void MII_dump_0_to_5(
	ushort regvals[6],
	uchar reglo,
	uchar reghi)
{
	ulong i;

	for (i = 0; i < 6; i++) {
		if ((reglo <= i) && (i <= reghi))
			dump_reg(regvals[i], &reg_0_5_desc_tbl[i],
				&desc_and_len_tbl[i]);
	}
}

static void dump_reg(
	ushort             regval,
	MII_reg_desc_t   * prd,
	MII_field_desc_and_len_t * pdl)
{
	ulong i;
	ushort mask_in_place;
	MII_field_desc_t * pdesc;

	printf("%u.     (%04hx)                 -- %s --\n",
		prd->regno, regval, prd->name);

	for (i = 0; i < pdl->len; i++) {
		pdesc = &pdl->pdesc[i];

		mask_in_place = pdesc->mask << pdesc->lo;

		printf("  (%04hx:%04hx) %u.",
			mask_in_place,
			regval & mask_in_place,
			prd->regno);

		if (special_field(prd->regno, pdesc, regval)) {
		}
		else {
			if (pdesc->hi == pdesc->lo)
				printf("%2u   ", pdesc->lo);
			else
				printf("%2u-%2u", pdesc->hi, pdesc->lo);
			printf(" = %5u    %s",
				(regval & mask_in_place) >> pdesc->lo,
				pdesc->name);
		}
		printf("\n");

	}
	printf("\n");
}

/* Special fields:
** 0.6,13
** 0.8
** 2.15-0
** 3.15-0
** 4.4-0
** 5.4-0
*/

static int special_field(
	ushort regno,
	MII_field_desc_t * pdesc,
	ushort regval)
{
	if ((regno == 0) && (pdesc->lo == 6)) {
		ushort speed_bits = regval & PHY_BMCR_SPEED_MASK;
		printf("%2u,%2u =   b%u%u    speed selection = %s Mbps",
			6, 13,
			(regval >>  6) & 1,
			(regval >> 13) & 1,
			speed_bits == PHY_BMCR_1000_MBPS ? "1000" :
			speed_bits == PHY_BMCR_100_MBPS  ? "100" :
			speed_bits == PHY_BMCR_10_MBPS   ? "10" :
			"???");
		return 1;
	}

	else if ((regno == 0) && (pdesc->lo == 8)) {
		printf("%2u    = %5u    duplex = %s",
			pdesc->lo,
			(regval >>  pdesc->lo) & 1,
			((regval >> pdesc->lo) & 1) ? "full" : "half");
		return 1;
	}

	else if ((regno == 4) && (pdesc->lo == 0)) {
		ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
		printf("%2u-%2u = %5u    selector = %s",
			pdesc->hi, pdesc->lo, sel_bits,
			sel_bits == PHY_ANLPAR_PSB_802_3 ?
				"IEEE 802.3" :
			sel_bits == PHY_ANLPAR_PSB_802_9 ?
				"IEEE 802.9 ISLAN-16T" :
			"???");
		return 1;
	}

	else if ((regno == 5) && (pdesc->lo == 0)) {
		ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
		printf("%2u-%2u =     %u    selector = %s",
			pdesc->hi, pdesc->lo, sel_bits,
			sel_bits == PHY_ANLPAR_PSB_802_3 ?
				"IEEE 802.3" :
			sel_bits == PHY_ANLPAR_PSB_802_9 ?
				"IEEE 802.9 ISLAN-16T" :
			"???");
		return 1;
	}

	return 0;
}

char last_op[2];
uint last_data;
uint last_addr_lo;
uint last_addr_hi;
uint last_reg_lo;
uint last_reg_hi;

static void extract_range(
	char * input,
	unsigned char * plo,
	unsigned char * phi)
{
	char * end;
	*plo = simple_strtoul(input, &end, 16);
	if (*end == '-') {
		end++;
		*phi = simple_strtoul(end, NULL, 16);
	}
	else {
		*phi = *plo;
	}
}

/* ---------------------------------------------------------------- */
int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
	char		op[2];
	unsigned char	addrlo, addrhi, reglo, reghi;
	unsigned char	addr, reg;
	unsigned short	data;
	int		rcode = 0;
	char		*devname;

	if (argc < 2)
		return cmd_usage(cmdtp);

#if defined(CONFIG_MII_INIT)
	mii_init ();
#endif

	/*
	 * We use the last specified parameters, unless new ones are
	 * entered.
	 */
	op[0] = last_op[0];
	op[1] = last_op[1];
	addrlo = last_addr_lo;
	addrhi = last_addr_hi;
	reglo  = last_reg_lo;
	reghi  = last_reg_hi;
	data   = last_data;

	if ((flag & CMD_FLAG_REPEAT) == 0) {
		op[0] = argv[1][0];
		if (strlen(argv[1]) > 1)
			op[1] = argv[1][1];
		else
			op[1] = '\0';

		if (argc >= 3)
			extract_range(argv[2], &addrlo, &addrhi);
		if (argc >= 4)
			extract_range(argv[3], &reglo, &reghi);
		if (argc >= 5)
			data = simple_strtoul (argv[4], NULL, 16);
	}

	/* use current device */
	devname = miiphy_get_current_dev();

	/*
	 * check info/read/write.
	 */
	if (op[0] == 'i') {
		unsigned char j, start, end;
		unsigned int oui;
		unsigned char model;
		unsigned char rev;

		/*
		 * Look for any and all PHYs.  Valid addresses are 0..31.
		 */
		if (argc >= 3) {
			start = addrlo; end = addrhi;
		} else {
			start = 0; end = 31;
		}

		for (j = start; j <= end; j++) {
			if (miiphy_info (devname, j, &oui, &model, &rev) == 0) {
				printf("PHY 0x%02X: "
					"OUI = 0x%04X, "
					"Model = 0x%02X, "
					"Rev = 0x%02X, "
					"%3dbase%s, %s\n",
					j, oui, model, rev,
					miiphy_speed (devname, j),
					miiphy_is_1000base_x (devname, j)
						? "X" : "T",
					(miiphy_duplex (devname, j) == FULL)
						? "FDX" : "HDX");
			}
		}
	} else if (op[0] == 'r') {
		for (addr = addrlo; addr <= addrhi; addr++) {
			for (reg = reglo; reg <= reghi; reg++) {
				data = 0xffff;
				if (miiphy_read (devname, addr, reg, &data) != 0) {
					printf(
					"Error reading from the PHY addr=%02x reg=%02x\n",
						addr, reg);
					rcode = 1;
				} else {
					if ((addrlo != addrhi) || (reglo != reghi))
						printf("addr=%02x reg=%02x data=",
							(uint)addr, (uint)reg);
					printf("%04X\n", data & 0x0000FFFF);
				}
			}
			if ((addrlo != addrhi) && (reglo != reghi))
				printf("\n");
		}
	} else if (op[0] == 'w') {
		for (addr = addrlo; addr <= addrhi; addr++) {
			for (reg = reglo; reg <= reghi; reg++) {
				if (miiphy_write (devname, addr, reg, data) != 0) {
					printf("Error writing to the PHY addr=%02x reg=%02x\n",
						addr, reg);
					rcode = 1;
				}
			}
		}
	} else if (strncmp(op, "du", 2) == 0) {
		ushort regs[6];
		int ok = 1;
		if ((reglo > 5) || (reghi > 5)) {
			printf(
				"The MII dump command only formats the "
				"standard MII registers, 0-5.\n");
			return 1;
		}
		for (addr = addrlo; addr <= addrhi; addr++) {
			for (reg = reglo; reg < reghi + 1; reg++) {
				if (miiphy_read(devname, addr, reg, &regs[reg]) != 0) {
					ok = 0;
					printf(
					"Error reading from the PHY addr=%02x reg=%02x\n",
						addr, reg);
					rcode = 1;
				}
			}
			if (ok)
				MII_dump_0_to_5(regs, reglo, reghi);
			printf("\n");
		}
	} else if (strncmp(op, "de", 2) == 0) {
		if (argc == 2)
			miiphy_listdev ();
		else
			miiphy_set_current_dev (argv[2]);
	} else {
		return cmd_usage(cmdtp);
	}

	/*
	 * Save the parameters for repeats.
	 */
	last_op[0] = op[0];
	last_op[1] = op[1];
	last_addr_lo = addrlo;
	last_addr_hi = addrhi;
	last_reg_lo  = reglo;
	last_reg_hi  = reghi;
	last_data    = data;

	return rcode;
}

/***************************************************/

U_BOOT_CMD(
	mii,	5,	1,	do_mii,
	"MII utility commands",
	"device                     - list available devices\n"
	"mii device <devname>           - set current device\n"
	"mii info   <addr>              - display MII PHY info\n"
	"mii read   <addr> <reg>        - read  MII PHY <addr> register <reg>\n"
	"mii write  <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
	"mii dump   <addr> <reg>        - pretty-print <addr> <reg> (0-5 only)\n"
	"Addr and/or reg may be ranges, e.g. 2-7."
);
Commit	Line	Data
dd7d41f0 WD	1	/*
	2	* (C) Copyright 2001
	3	* Gerald Van Baren, Custom IDEAS, [email protected]
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	/*
	25	* MII Utilities
	26	*/
	27
	28	#include <common.h>
	29	#include <command.h>
e35745bb WD	30	#include <miiphy.h>
e35745bb WD	31
2471111d WD	32	typedef struct _MII_reg_desc_t {
	33	ushort regno;
	34	char * name;
	35	} MII_reg_desc_t;
	36
	37	MII_reg_desc_t reg_0_5_desc_tbl[] = {
	38	{ 0, "PHY control register" },
	39	{ 1, "PHY status register" },
	40	{ 2, "PHY ID 1 register" },
	41	{ 3, "PHY ID 2 register" },
	42	{ 4, "Autonegotiation advertisement register" },
	43	{ 5, "Autonegotiation partner abilities register" },
	44	};
	45
	46	typedef struct _MII_field_desc_t {
	47	ushort hi;
	48	ushort lo;
	49	ushort mask;
	50	char * name;
	51	} MII_field_desc_t;
	52
	53	MII_field_desc_t reg_0_desc_tbl[] = {
	54	{ 15, 15, 0x01, "reset" },
	55	{ 14, 14, 0x01, "loopback" },
	56	{ 13, 6, 0x81, "speed selection" }, /* special */
	57	{ 12, 12, 0x01, "A/N enable" },
	58	{ 11, 11, 0x01, "power-down" },
	59	{ 10, 10, 0x01, "isolate" },
	60	{ 9, 9, 0x01, "restart A/N" },
	61	{ 8, 8, 0x01, "duplex" }, /* special */
	62	{ 7, 7, 0x01, "collision test enable" },
	63	{ 5, 0, 0x3f, "(reserved)" }
	64	};
	65
	66	MII_field_desc_t reg_1_desc_tbl[] = {
	67	{ 15, 15, 0x01, "100BASE-T4 able" },
	68	{ 14, 14, 0x01, "100BASE-X full duplex able" },
	69	{ 13, 13, 0x01, "100BASE-X half duplex able" },
	70	{ 12, 12, 0x01, "10 Mbps full duplex able" },
	71	{ 11, 11, 0x01, "10 Mbps half duplex able" },
	72	{ 10, 10, 0x01, "100BASE-T2 full duplex able" },
	73	{ 9, 9, 0x01, "100BASE-T2 half duplex able" },
	74	{ 8, 8, 0x01, "extended status" },
	75	{ 7, 7, 0x01, "(reserved)" },
	76	{ 6, 6, 0x01, "MF preamble suppression" },
	77	{ 5, 5, 0x01, "A/N complete" },
	78	{ 4, 4, 0x01, "remote fault" },
	79	{ 3, 3, 0x01, "A/N able" },
	80	{ 2, 2, 0x01, "link status" },
	81	{ 1, 1, 0x01, "jabber detect" },
	82	{ 0, 0, 0x01, "extended capabilities" },
	83	};
	84
	85	MII_field_desc_t reg_2_desc_tbl[] = {
	86	{ 15, 0, 0xffff, "OUI portion" },
	87	};
	88
	89	MII_field_desc_t reg_3_desc_tbl[] = {
	90	{ 15, 10, 0x3f, "OUI portion" },
	91	{ 9, 4, 0x3f, "manufacturer part number" },
	92	{ 3, 0, 0x0f, "manufacturer rev. number" },
	93	};
	94
	95	MII_field_desc_t reg_4_desc_tbl[] = {
96	{ 15, 15, 0x01, "next page able" },
97	{ 14, 14, 0x01, "reserved" },
98	{ 13, 13, 0x01, "remote fault" },
99	{ 12, 12, 0x01, "reserved" },
100	{ 11, 11, 0x01, "asymmetric pause" },
101	{ 10, 10, 0x01, "pause enable" },
102	{ 9, 9, 0x01, "100BASE-T4 able" },
103	{ 8, 8, 0x01, "100BASE-TX full duplex able" },
104	{ 7, 7, 0x01, "100BASE-TX able" },
105	{ 6, 6, 0x01, "10BASE-T full duplex able" },
106	{ 5, 5, 0x01, "10BASE-T able" },
107	{ 4, 0, 0x1f, "xxx to do" },
108	};
109
110	MII_field_desc_t reg_5_desc_tbl[] = {
111	{ 15, 15, 0x01, "next page able" },
112	{ 14, 14, 0x01, "acknowledge" },
113	{ 13, 13, 0x01, "remote fault" },
114	{ 12, 12, 0x01, "(reserved)" },
115	{ 11, 11, 0x01, "asymmetric pause able" },
116	{ 10, 10, 0x01, "pause able" },
117	{ 9, 9, 0x01, "100BASE-T4 able" },
118	{ 8, 8, 0x01, "100BASE-X full duplex able" },
119	{ 7, 7, 0x01, "100BASE-TX able" },
120	{ 6, 6, 0x01, "10BASE-T full duplex able" },
121	{ 5, 5, 0x01, "10BASE-T able" },
122	{ 4, 0, 0x1f, "xxx to do" },
123	};
124
125	#define DESC0LEN (sizeof(reg_0_desc_tbl)/sizeof(reg_0_desc_tbl[0]))
126	#define DESC1LEN (sizeof(reg_1_desc_tbl)/sizeof(reg_1_desc_tbl[0]))
127	#define DESC2LEN (sizeof(reg_2_desc_tbl)/sizeof(reg_2_desc_tbl[0]))
128	#define DESC3LEN (sizeof(reg_3_desc_tbl)/sizeof(reg_3_desc_tbl[0]))
129	#define DESC4LEN (sizeof(reg_4_desc_tbl)/sizeof(reg_4_desc_tbl[0]))
130	#define DESC5LEN (sizeof(reg_5_desc_tbl)/sizeof(reg_5_desc_tbl[0]))
131
132	typedef struct _MII_field_desc_and_len_t {
133	MII_field_desc_t * pdesc;
134	ushort len;
135	} MII_field_desc_and_len_t;
136
137	MII_field_desc_and_len_t desc_and_len_tbl[] = {
138	{ reg_0_desc_tbl, DESC0LEN },
139	{ reg_1_desc_tbl, DESC1LEN },
140	{ reg_2_desc_tbl, DESC2LEN },
141	{ reg_3_desc_tbl, DESC3LEN },
142	{ reg_4_desc_tbl, DESC4LEN },
143	{ reg_5_desc_tbl, DESC5LEN },
144	};
145
146	static void dump_reg(
147	ushort regval,
148	MII_reg_desc_t * prd,
149	MII_field_desc_and_len_t * pdl);
150
151	static int special_field(
152	ushort regno,
153	MII_field_desc_t * pdesc,
154	ushort regval);
155
156	void MII_dump_0_to_5(
157	ushort regvals[6],
158	uchar reglo,
159	uchar reghi)
160	{
161	ulong i;
162
163	for (i = 0; i < 6; i++) {
164	if ((reglo <= i) && (i <= reghi))
165	dump_reg(regvals[i], &reg_0_5_desc_tbl[i],
166	&desc_and_len_tbl[i]);
167	}
168	}
169
170	static void dump_reg(
171	ushort regval,
172	MII_reg_desc_t * prd,
173	MII_field_desc_and_len_t * pdl)
174	{
175	ulong i;
176	ushort mask_in_place;
177	MII_field_desc_t * pdesc;
178
179	printf("%u. (%04hx) -- %s --\n",
180	prd->regno, regval, prd->name);
181
182	for (i = 0; i < pdl->len; i++) {
183	pdesc = &pdl->pdesc[i];
184
185	mask_in_place = pdesc->mask << pdesc->lo;
186
187	printf(" (%04hx:%04hx) %u.",
188	mask_in_place,
189	regval & mask_in_place,
190	prd->regno);
191
192	if (special_field(prd->regno, pdesc, regval)) {
193	}
194	else {
195	if (pdesc->hi == pdesc->lo)
196	printf("%2u ", pdesc->lo);
197	else
198	printf("%2u-%2u", pdesc->hi, pdesc->lo);
199	printf(" = %5u %s",
200	(regval & mask_in_place) >> pdesc->lo,
201	pdesc->name);
202	}
203	printf("\n");
204
205	}
206	printf("\n");
207	}
208
209	/* Special fields:
210	** 0.6,13
211	** 0.8
212	** 2.15-0
213	** 3.15-0
214	** 4.4-0
215	** 5.4-0
216	*/
217
218	static int special_field(
219	ushort regno,
220	MII_field_desc_t * pdesc,
221	ushort regval)
222	{
223	if ((regno == 0) && (pdesc->lo == 6)) {
b9711de1	224	ushort speed_bits = regval & PHY_BMCR_SPEED_MASK;
2471111d WD	225	printf("%2u,%2u = b%u%u speed selection = %s Mbps",
	226	6, 13,
	227	(regval >> 6) & 1,
	228	(regval >> 13) & 1,
b9711de1 WD	229	speed_bits == PHY_BMCR_1000_MBPS ? "1000" :
	230	speed_bits == PHY_BMCR_100_MBPS ? "100" :
	231	speed_bits == PHY_BMCR_10_MBPS ? "10" :
2471111d WD	232	"???");
	233	return 1;
	234	}
	235
	236	else if ((regno == 0) && (pdesc->lo == 8)) {
	237	printf("%2u = %5u duplex = %s",
	238	pdesc->lo,
	239	(regval >> pdesc->lo) & 1,
	240	((regval >> pdesc->lo) & 1) ? "full" : "half");
	241	return 1;
	242	}
	243
	244	else if ((regno == 4) && (pdesc->lo == 0)) {
	245	ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
	246	printf("%2u-%2u = %5u selector = %s",
	247	pdesc->hi, pdesc->lo, sel_bits,
b9711de1	248	sel_bits == PHY_ANLPAR_PSB_802_3 ?
2471111d	249	"IEEE 802.3" :
b9711de1	250	sel_bits == PHY_ANLPAR_PSB_802_9 ?
2471111d WD	251	"IEEE 802.9 ISLAN-16T" :
	252	"???");
	253	return 1;
	254	}
	255
	256	else if ((regno == 5) && (pdesc->lo == 0)) {
	257	ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
	258	printf("%2u-%2u = %u selector = %s",
	259	pdesc->hi, pdesc->lo, sel_bits,
b9711de1	260	sel_bits == PHY_ANLPAR_PSB_802_3 ?
2471111d	261	"IEEE 802.3" :
b9711de1	262	sel_bits == PHY_ANLPAR_PSB_802_9 ?
2471111d WD	263	"IEEE 802.9 ISLAN-16T" :
	264	"???");
	265	return 1;
	266	}
	267
	268	return 0;
	269	}
	270
63ff004c	271	char last_op[2];
2471111d WD	272	uint last_data;
	273	uint last_addr_lo;
	274	uint last_addr_hi;
	275	uint last_reg_lo;
	276	uint last_reg_hi;
	277
	278	static void extract_range(
	279	char * input,
	280	unsigned char * plo,
	281	unsigned char * phi)
	282	{
	283	char * end;
	284	*plo = simple_strtoul(input, &end, 16);
	285	if (*end == '-') {
	286	end++;
	287	*phi = simple_strtoul(end, NULL, 16);
	288	}
	289	else {
	290	phi = plo;
	291	}
	292	}
	293
5cf91d6b	294	/* ---------------------------------------------------------------- */
54841ab5	295	int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
2471111d	296	{
63ff004c	297	char op[2];
2471111d	298	unsigned char addrlo, addrhi, reglo, reghi;
2b792afc	299	unsigned char addr, reg;
2471111d WD	300	unsigned short data;
2471111d WD	301	int rcode = 0;
63ff004c	302	char *devname;
2471111d	303
47e26b1b WD	304	if (argc < 2)
47e26b1b WD	305	return cmd_usage(cmdtp);
b9173af7	306
0f3ba7e9	307	#if defined(CONFIG_MII_INIT)
2471111d WD	308	mii_init ();
	309	#endif
	310
	311	/*
	312	* We use the last specified parameters, unless new ones are
	313	* entered.
	314	*/
63ff004c MB	315	op[0] = last_op[0];
63ff004c MB	316	op[1] = last_op[1];
2471111d WD	317	addrlo = last_addr_lo;
	318	addrhi = last_addr_hi;
	319	reglo = last_reg_lo;
	320	reghi = last_reg_hi;
	321	data = last_data;
	322
	323	if ((flag & CMD_FLAG_REPEAT) == 0) {
63ff004c MB	324	op[0] = argv[1][0];
	325	if (strlen(argv[1]) > 1)
	326	op[1] = argv[1][1];
	327	else
	328	op[1] = '\0';
	329
2471111d WD	330	if (argc >= 3)
	331	extract_range(argv[2], &addrlo, &addrhi);
	332	if (argc >= 4)
	333	extract_range(argv[3], &reglo, &reghi);
	334	if (argc >= 5)
	335	data = simple_strtoul (argv[4], NULL, 16);
	336	}
	337
63ff004c MB	338	/* use current device */
	339	devname = miiphy_get_current_dev();
	340
2471111d WD	341	/*
	342	* check info/read/write.
	343	*/
63ff004c	344	if (op[0] == 'i') {
2471111d WD	345	unsigned char j, start, end;
	346	unsigned int oui;
	347	unsigned char model;
	348	unsigned char rev;
	349
	350	/*
	351	* Look for any and all PHYs. Valid addresses are 0..31.
	352	*/
	353	if (argc >= 3) {
2b792afc	354	start = addrlo; end = addrhi;
2471111d	355	} else {
2b792afc	356	start = 0; end = 31;
2471111d WD	357	}
2471111d WD	358
2b792afc	359	for (j = start; j <= end; j++) {
63ff004c	360	if (miiphy_info (devname, j, &oui, &model, &rev) == 0) {
2471111d WD	361	printf("PHY 0x%02X: "
	362	"OUI = 0x%04X, "
	363	"Model = 0x%02X, "
	364	"Rev = 0x%02X, "
71bc6e64	365	"%3dbase%s, %s\n",
2471111d	366	j, oui, model, rev,
63ff004c	367	miiphy_speed (devname, j),
71bc6e64 LJ	368	miiphy_is_1000base_x (devname, j)
71bc6e64 LJ	369	? "X" : "T",
63ff004c MB	370	(miiphy_duplex (devname, j) == FULL)
63ff004c MB	371	? "FDX" : "HDX");
2471111d WD	372	}
2471111d WD	373	}
63ff004c	374	} else if (op[0] == 'r') {
2471111d WD	375	for (addr = addrlo; addr <= addrhi; addr++) {
	376	for (reg = reglo; reg <= reghi; reg++) {
	377	data = 0xffff;
63ff004c	378	if (miiphy_read (devname, addr, reg, &data) != 0) {
2471111d WD	379	printf(
	380	"Error reading from the PHY addr=%02x reg=%02x\n",
	381	addr, reg);
	382	rcode = 1;
2b792afc	383	} else {
2471111d WD	384	if ((addrlo != addrhi) \|\| (reglo != reghi))
	385	printf("addr=%02x reg=%02x data=",
	386	(uint)addr, (uint)reg);
	387	printf("%04X\n", data & 0x0000FFFF);
	388	}
	389	}
	390	if ((addrlo != addrhi) && (reglo != reghi))
	391	printf("\n");
	392	}
63ff004c	393	} else if (op[0] == 'w') {
2471111d WD	394	for (addr = addrlo; addr <= addrhi; addr++) {
2471111d WD	395	for (reg = reglo; reg <= reghi; reg++) {
63ff004c	396	if (miiphy_write (devname, addr, reg, data) != 0) {
2471111d WD	397	printf("Error writing to the PHY addr=%02x reg=%02x\n",
	398	addr, reg);
	399	rcode = 1;
	400	}
	401	}
	402	}
63ff004c	403	} else if (strncmp(op, "du", 2) == 0) {
2471111d WD	404	ushort regs[6];
	405	int ok = 1;
	406	if ((reglo > 5) \|\| (reghi > 5)) {
	407	printf(
	408	"The MII dump command only formats the "
	409	"standard MII registers, 0-5.\n");
	410	return 1;
	411	}
	412	for (addr = addrlo; addr <= addrhi; addr++) {
63ff004c MB	413	for (reg = reglo; reg < reghi + 1; reg++) {
63ff004c MB	414	if (miiphy_read(devname, addr, reg, &regs[reg]) != 0) {
2471111d WD	415	ok = 0;
	416	printf(
	417	"Error reading from the PHY addr=%02x reg=%02x\n",
	418	addr, reg);
	419	rcode = 1;
	420	}
	421	}
	422	if (ok)
	423	MII_dump_0_to_5(regs, reglo, reghi);
	424	printf("\n");
	425	}
63ff004c MB	426	} else if (strncmp(op, "de", 2) == 0) {
	427	if (argc == 2)
	428	miiphy_listdev ();
	429	else
	430	miiphy_set_current_dev (argv[2]);
2471111d	431	} else {
47e26b1b	432	return cmd_usage(cmdtp);
2471111d WD	433	}
	434
	435	/*
	436	* Save the parameters for repeats.
	437	*/
63ff004c MB	438	last_op[0] = op[0];
63ff004c MB	439	last_op[1] = op[1];
2471111d WD	440	last_addr_lo = addrlo;
	441	last_addr_hi = addrhi;
	442	last_reg_lo = reglo;
	443	last_reg_hi = reghi;
	444	last_data = data;
	445
	446	return rcode;
	447	}
	448
	449	/***************************************************/
	450
	451	U_BOOT_CMD(
	452	mii, 5, 1, do_mii,
2fb2604d	453	"MII utility commands",
63ff004c MB	454	"device - list available devices\n"
	455	"mii device <devname> - set current device\n"
	456	"mii info <addr> - display MII PHY info\n"
	457	"mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
	458	"mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
	459	"mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
a89c33db	460	"Addr and/or reg may be ranges, e.g. 2-7."
2471111d	461	);