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bf9e3b38 | 1 | |
6ba2da90 | 2 | U-Boot for Motorola (or Freescale/NXP) ColdFire processors |
bf9e3b38 | 3 | |
6ba2da90 | 4 | =============================================================================== |
9acb626f HS |
5 | History |
6 | ||
6ba2da90 AD |
7 | November 02, 2017 Angelo Dureghello <[email protected]> |
8 | August 08, 2005 Jens Scharsig <[email protected]> | |
9acb626f | 9 | MCF5282 implementation without preloader |
6ba2da90 AD |
10 | January 12, 2004 <[email protected]> |
11 | =============================================================================== | |
12 | ||
bf9e3b38 WD |
13 | |
14 | This file contains status information for the port of U-Boot to the | |
6ba2da90 AD |
15 | Motorola ColdFire series of CPUs. |
16 | ||
17 | ||
18 | 1. Overview | |
bf9e3b38 | 19 | |
6ba2da90 AD |
20 | The ColdFire instruction set is "assembly source" compatible but an evolution |
21 | of the original 68000 instruction set. Some not much used instructions has | |
22 | been removed. The instructions are only 16, 32, or 48 bits long, a | |
23 | simplification compared to the 68000 series. | |
bf9e3b38 | 24 | |
6ba2da90 AD |
25 | Bernhard Kuhn ported U-Boot 0.4.0 to the Motorola ColdFire architecture. |
26 | The patches of Bernhard support the MCF5272 and MCF5282. A great disadvantage | |
27 | of these patches was that they needed a pre-bootloader to start U-Boot. | |
28 | Because of this, a new port was created which no longer needs a first stage | |
29 | booter. | |
bf9e3b38 | 30 | |
6ba2da90 AD |
31 | Thanks mainly to Freescale but also to several other contributors, U-Boot now |
32 | supports nearly the entire range of ColdFire processors and their related | |
33 | development boards. | |
bf9e3b38 | 34 | |
bf9e3b38 | 35 | |
6ba2da90 | 36 | 2. Supported CPU families |
bf9e3b38 | 37 | |
6ba2da90 AD |
38 | Please "make menuconfig" with ARCH=m68k, or check arch/m68k/cpu to see the |
39 | currently supported processor and families. | |
bf9e3b38 | 40 | |
bf9e3b38 | 41 | |
6ba2da90 | 42 | 3. Supported boards |
bf9e3b38 | 43 | |
6ba2da90 AD |
44 | U-Boot supports actually more than 40 ColdFire based boards. |
45 | Board configuration can be done trough include/configs/<boardname>.h but the | |
46 | current recommended method is to use the new and more friendly approach as | |
47 | the "make menuconfig" way, very similar to the Linux way. | |
bf9e3b38 | 48 | |
6ba2da90 AD |
49 | To know details as memory map, build targets, default setup, etc, of a |
50 | specific board please check: | |
bf9e3b38 | 51 | |
6ba2da90 AD |
52 | include/configs/<boardname>.h |
53 | and/or | |
54 | configs/<boardname>_defconfig | |
bf9e3b38 | 55 | |
6ba2da90 AD |
56 | It is possible to build all ColdFire boards in a single command-line command, |
57 | from u-boot root directory, as: | |
bf9e3b38 | 58 | |
6ba2da90 | 59 | ./tools/buildman/buildman m68k |
bf9e3b38 WD |
60 | |
61 | ||
6ba2da90 | 62 | 3.1. Build U-Boot for a specific board |
bf9e3b38 | 63 | |
6ba2da90 | 64 | A bash script similar to the one below may be used: |
bf9e3b38 | 65 | |
6ba2da90 | 66 | #!/bin/bash |
9acb626f | 67 | |
6ba2da90 | 68 | export CROSS_COMPILE=/opt/toolchains/m68k/gcc-4.9.0-nolibc/bin/m68k-linux- |
9acb626f | 69 | |
6ba2da90 | 70 | board=M5475DFE |
9acb626f | 71 | |
6ba2da90 AD |
72 | make distclean |
73 | make ARCH=m68k ${board}_defconfig | |
74 | make ARCH=m68k KBUILD_VERBOSE=1 | |
9acb626f | 75 | |
9acb626f | 76 | |
6ba2da90 | 77 | 4. Adopted toolchains |
9acb626f | 78 | |
6ba2da90 AD |
79 | Please check: |
80 | https://www.denx.de/wiki/U-Boot/ColdFireNotes | |
9acb626f | 81 | |
bf9e3b38 | 82 | |
6ba2da90 AD |
83 | 5. ColdFire specific configuration options/settings |
84 | ||
85 | ||
86 | 5.1. Configuration to use a pre-loader | |
bf9e3b38 | 87 | |
a187559e | 88 | If U-Boot should be loaded to RAM and started by a pre-loader |
bf9e3b38 WD |
89 | CONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the |
90 | initial vector table and basic processor initialization will not | |
a187559e | 91 | be compiled in. The start address of U-Boot must be adjusted in |
6d0f6bcf | 92 | the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile |
14d0a02a | 93 | (CONFIG_SYS_TEXT_BASE) to the load address. |
bf9e3b38 | 94 | |
bf9e3b38 | 95 | |
6ba2da90 | 96 | 5.2 ColdFire CPU specific options/settings |
bf9e3b38 | 97 | |
6ba2da90 | 98 | To specify a CPU model, some defines shoudl be used, i.e.: |
bf9e3b38 WD |
99 | |
100 | CONFIG_MCF52x2 -- defined for all MCF52x2 CPUs | |
6ba2da90 | 101 | CONFIG_M5272 -- defined for all Motorola MCF5272 CPUs |
bf9e3b38 | 102 | |
6ba2da90 AD |
103 | Other options, generally set inside include/configs/<boardname>.h, they may |
104 | apply to one or more cpu for the ColdFire family: | |
bf9e3b38 | 105 | |
6ba2da90 AD |
106 | CONFIG_SYS_MBAR -- defines the base address of the MCF5272 configuration |
107 | registers | |
6d0f6bcf | 108 | CONFIG_SYS_ENET_BD_BASE |
16263087 | 109 | -- defines the base address of the FEC buffer descriptors |
6ba2da90 AD |
110 | CONFIG_SYS_SCR -- defines the contents of the System Configuration Register |
111 | CONFIG_SYS_SPR -- defines the contents of the System Protection Register | |
112 | CONFIG_SYS_MFD -- defines the PLL Multiplication Factor Divider | |
9acb626f | 113 | (see table 9-4 of MCF user manual) |
6ba2da90 | 114 | CONFIG_SYS_RFD -- defines the PLL Reduce Frequency Devider |
9acb626f | 115 | (see table 9-4 of MCF user manual) |
6ba2da90 AD |
116 | CONFIG_SYS_CSx_BASE |
117 | -- defines the base address of chip select x | |
118 | CONFIG_SYS_CSx_SIZE | |
119 | -- defines the memory size (address range) of chip select x | |
120 | CONFIG_SYS_CSx_WIDTH | |
121 | -- defines the bus with of chip select x | |
122 | CONFIG_SYS_CSx_MASK | |
123 | -- defines the mask for the related chip select x | |
124 | CONFIG_SYS_CSx_RO | |
125 | -- if set to 0 chip select x is read/write else chip select | |
126 | is read only | |
127 | CONFIG_SYS_CSx_WS | |
128 | -- defines the number of wait states of chip select x | |
129 | CONFIG_SYS_CACHE_ICACR | |
130 | CONFIG_SYS_CACHE_DCACR | |
131 | CONFIG_SYS_CACHE_ACRX | |
132 | -- cache-related registers config | |
133 | CONFIG_SYS_SDRAM_BASE | |
134 | CONFIG_SYS_SDRAM_SIZE | |
135 | CONFIG_SYS_SDRAM_BASEX | |
136 | CONFIG_SYS_SDRAM_CFG1 | |
137 | CONFIG_SYS_SDRAM_CFG2 | |
138 | CONFIG_SYS_SDRAM_CTRL | |
139 | CONFIG_SYS_SDRAM_MODE | |
140 | CONFIG_SYS_SDRAM_EMOD | |
141 | -- SDRAM config for SDRAM controller-specific registers, please | |
142 | see arch/m68k/cpu/<specific_cpu>/start.S files to see how | |
143 | these options are used. | |
144 | CONFIG_MCFUART | |
145 | -- defines enabling of ColdFire UART driver | |
146 | CONFIG_SYS_UART_PORT | |
147 | -- defines the UART port to be used (only a single UART can be | |
148 | actually enabled) | |
149 | CONFIG_SYS_SBFHDR_SIZE | |
150 | -- size of the prepended SBF header, if any |