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bf9e3b38 WD |
1 | |
2 | U-Boot for Motorola M68K | |
3 | ||
9acb626f HS |
4 | ==================================================================== |
5 | History | |
6 | ||
53677ef1 | 7 | August 08,2005; Jens Scharsig <[email protected]> |
9acb626f | 8 | MCF5282 implementation without preloader |
53677ef1 | 9 | January 12, 2004; <[email protected]> |
bf9e3b38 WD |
10 | ==================================================================== |
11 | ||
12 | This file contains status information for the port of U-Boot to the | |
13 | Motorola M68K series of CPUs. | |
14 | ||
15 | 1. OVERVIEW | |
16 | ----------- | |
17 | Bernhard Kuhn ported U-Boot 0.4.0 to the Motorola Coldfire | |
18 | architecture. The patches of Bernhard support the MCF5272 and | |
19 | MCF5282. A great disadvantage of these patches was that they needed | |
20 | a pre-bootloader to start u-boot. Because of this, a new port was | |
21 | created which no longer needs a first stage booter. | |
22 | ||
23 | Although this port is intended to cover all M68k processors, only | |
24 | the parts for the Motorola Coldfire MCF5272 and MCF5282 are | |
25 | implemented at the moment. Additional CPUs and boards will be | |
26 | hopefully added soon! | |
27 | ||
28 | ||
29 | 2. SUPPORTED CPUs | |
30 | ----------------- | |
31 | ||
32 | 2.1 Motorola Coldfire MCF5272 | |
33 | ----------------------------- | |
a4145534 | 34 | CPU specific code is located in: arch/m68k/cpu/mcf52x2 |
bf9e3b38 WD |
35 | |
36 | ||
37 | 2.1 Motorola Coldfire MCF5282 | |
38 | ----------------------------- | |
a4145534 | 39 | CPU specific code is located in: arch/m68k/cpu/mcf52x2 |
bf9e3b38 | 40 | |
9acb626f HS |
41 | The MCF5282 Port no longer needs a preloader and can place in external or |
42 | internal FLASH. | |
bf9e3b38 WD |
43 | |
44 | ||
45 | 3. SUPPORTED BOARDs | |
46 | ------------------- | |
47 | ||
48 | 3.1 Motorola M5272C3 EVB | |
49 | ------------------------ | |
50 | Board specific code is located in: board/m5272c3 | |
51 | ||
52 | To configure the board, type: make M5272C3_config | |
53 | ||
54 | U-Boot Memory Map: | |
55 | ------------------ | |
56 | 0xffe00000 - 0xffe3ffff u-boot | |
57 | 0xffe04000 - 0xffe05fff environment (embedded in u-boot!) | |
58 | 0xffe40000 - 0xffffffff free for linux/applications | |
59 | ||
60 | ||
61 | 3.2 Motorola M5282 EVB | |
62 | ------------------------ | |
63 | Board specific code is located in: board/m5282evb | |
64 | ||
65 | To configure the board, type: make M5272C3_config | |
66 | ||
9acb626f HS |
67 | At the moment the code isn't fully implemented and still needs a pre-loader! |
68 | The preloader must initialize the processor and then start u-boot. The board | |
69 | must be configured for a pre-loader (see 4.1) | |
70 | ||
71 | For the preloader, please see | |
72 | http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html | |
73 | ||
74 | U-boot is configured to run at 0x20000 at default. This can be configured by | |
14d0a02a | 75 | change CONFIG_SYS_TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in |
9acb626f HS |
76 | include/configs/M5282EVB.h. |
77 | ||
78 | 3.2 BuS EB+MCF-EV123 | |
79 | --------------------- | |
80 | ||
81 | Board specific code is located in: board/bus/EB+MCF-EV123 | |
82 | ||
83 | To configure the board, type: | |
84 | ||
53677ef1 WD |
85 | make EB+MCF-EV123_config for external FLASH |
86 | make EB+MCF-EV123_internal_config for internal FLASH | |
9acb626f | 87 | |
bf9e3b38 WD |
88 | |
89 | 4. CONFIGURATION OPTIONS/SETTINGS | |
90 | ---------------------------------- | |
91 | ||
92 | 4.1 Configuration to use a pre-loader | |
93 | ------------------------------------- | |
94 | If u-boot should be loaded to RAM and started by a pre-loader | |
95 | CONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the | |
96 | initial vector table and basic processor initialization will not | |
97 | be compiled in. The start address of u-boot must be adjusted in | |
6d0f6bcf | 98 | the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile |
14d0a02a | 99 | (CONFIG_SYS_TEXT_BASE) to the load address. |
bf9e3b38 | 100 | |
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101 | 4.1 MCF5272 specific Options/Settings |
102 | ------------------------------------- | |
103 | ||
104 | CONFIG_MCF52x2 -- defined for all MCF52x2 CPUs | |
105 | CONFIG_M5272 -- defined for all Motorola MCF5272 CPUs | |
106 | ||
107 | CONFIG_MONITOR_IS_IN_RAM | |
108 | -- defined if u-boot is loaded by a pre-loader | |
109 | ||
6d0f6bcf JCPV |
110 | CONFIG_SYS_MBAR -- defines the base address of the MCF5272 configuration registers |
111 | CONFIG_SYS_INIT_RAM_ADDR | |
bf9e3b38 | 112 | -- defines the base address of the MCF5272 internal SRAM |
6d0f6bcf | 113 | CONFIG_SYS_ENET_BD_BASE |
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114 | -- defines the base addres of the FEC buffer descriptors |
115 | ||
6d0f6bcf JCPV |
116 | CONFIG_SYS_SCR -- defines the contents of the System Configuration Register |
117 | CONFIG_SYS_SPR -- defines the contents of the System Protection Register | |
118 | CONFIG_SYS_BRx_PRELIM -- defines the contents of the Chip Select Base Registers | |
119 | CONFIG_SYS_ORx_PRELIM -- defines the contents of the Chip Select Option Registers | |
bf9e3b38 | 120 | |
6d0f6bcf JCPV |
121 | CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers |
122 | CONFIG_SYS_PxDAT -- defines the contents of the Data Registers | |
123 | CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers | |
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124 | |
125 | ||
126 | 4.2 MCF5282 specific Options/Settings | |
127 | ------------------------------------- | |
128 | ||
129 | CONFIG_MCF52x2 -- defined for all MCF52x2 CPUs | |
130 | CONFIG_M5282 -- defined for all Motorola MCF5282 CPUs | |
131 | ||
132 | CONFIG_MONITOR_IS_IN_RAM | |
133 | -- defined if u-boot is loaded by a pre-loader | |
134 | ||
6d0f6bcf JCPV |
135 | CONFIG_SYS_MBAR -- defines the base address of the MCF5282 internal register space |
136 | CONFIG_SYS_INIT_RAM_ADDR | |
bf9e3b38 | 137 | -- defines the base address of the MCF5282 internal SRAM |
6d0f6bcf | 138 | CONFIG_SYS_INT_FLASH_BASE |
bf9e3b38 | 139 | -- defines the base address of the MCF5282 internal Flash memory |
6d0f6bcf | 140 | CONFIG_SYS_ENET_BD_BASE |
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141 | -- defines the base addres of the FEC buffer descriptors |
142 | ||
6d0f6bcf | 143 | CONFIG_SYS_MFD |
9acb626f HS |
144 | -- defines the PLL Multiplication Factor Devider |
145 | (see table 9-4 of MCF user manual) | |
6d0f6bcf | 146 | CONFIG_SYS_RFD -- defines the PLL Reduce Frecuency Devider |
9acb626f HS |
147 | (see table 9-4 of MCF user manual) |
148 | ||
6d0f6bcf JCPV |
149 | CONFIG_SYS_CSx_BASE -- defines the base address of chip select x |
150 | CONFIG_SYS_CSx_SIZE -- defines the memory size (address range) of chip select x | |
151 | CONFIG_SYS_CSx_WIDTH -- defines the bus with of chip select x | |
152 | CONFIG_SYS_CSx_RO -- if set to 0 chip select x is read/wirte | |
9acb626f | 153 | else chipselct is read only |
6d0f6bcf | 154 | CONFIG_SYS_CSx_WS -- defines the number of wait states of chip select x |
9acb626f | 155 | |
6d0f6bcf JCPV |
156 | CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers |
157 | CONFIG_SYS_PxDAT -- defines the contents of the Data Registers | |
158 | CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers | |
9acb626f | 159 | |
6d0f6bcf | 160 | CONFIG_SYS_PxPAR -- defines the function of ports |
9acb626f | 161 | |
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162 | |
163 | 5. COMPILER | |
164 | ----------- | |
165 | To create U-Boot the gcc-2.95.3 compiler set (m68k-elf-20030314) from uClinux.org was used. | |
166 | You can download it from: http://www.uclinux.org/pub/uClinux/m68k-elf-tools/ |