projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 252ed872 | 1 | CONFIG_PPC=y |
| c0f47562 | 2 | CONFIG_SYS_TEXT_BASE=0x11000000 |
| 9802154a | 3 | CONFIG_SYS_MALLOC_LEN=0x100000 |
| 77d2f7f5 | 4 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| cc4288ef | 5 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| a09fea1d TR |
6 | CONFIG_ENV_SIZE=0x2000 |
| 7 | CONFIG_ENV_OFFSET=0x0 | |
| 2bba7807 | 8 | CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" |
| c0f47562 | 9 | CONFIG_SPL_TEXT_BASE=0xf8f80000 |
| 103c5f18 | 10 | CONFIG_SPL_MMC=y |
| 2a736066 | 11 | CONFIG_SPL_SERIAL=y |
| c9542eae | 12 | CONFIG_SPL=y |
| 252ed872 | 13 | CONFIG_MPC85xx=y |
| 230ecd71 | 14 | # CONFIG_CMD_ERRATA is not set |
| aa14620c | 15 | CONFIG_TARGET_P1020RDB_PC=y |
| fbc3621f | 16 | CONFIG_ENABLE_36BIT_PHYS=y |
| de47ff53 TR |
17 | CONFIG_SYS_MPC85XX_NO_RESETVEC=y |
| 18 | CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y | |
| 3dc2987f TR |
19 | CONFIG_PCIE1=y |
| 20 | CONFIG_PCIE2=y | |
| 54c5c2b8 | 21 | CONFIG_MP=y |
| 73223f0e SG |
22 | CONFIG_FIT=y |
| 23 | CONFIG_FIT_VERBOSE=y | |
| 24 | CONFIG_OF_BOARD_SETUP=y | |
| 25 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| c0f47562 | 26 | CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 |
| d8e84617 | 27 | CONFIG_FSL_FIXED_MMC_LOCATION=y |
| bb597c0e | 28 | CONFIG_BOOTDELAY=10 |
| 970bf860 TR |
29 | CONFIG_USE_BOOTCOMMAND=y |
| 30 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" | |
| a5d67547 | 31 | CONFIG_BOARD_EARLY_INIT_F=y |
| 02ddc147 | 32 | CONFIG_BOARD_EARLY_INIT_R=y |
| 0817daa7 | 33 | # CONFIG_MISC_INIT_R is not set |
| 75670c81 | 34 | # CONFIG_SPL_FRAMEWORK is not set |
| ca8a329a | 35 | CONFIG_SPL_MAX_SIZE=0x20000 |
| db4080d5 | 36 | CONFIG_SPL_MMC_BOOT=y |
| 6074a536 | 37 | CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y |
| b35316fb | 38 | CONFIG_SPL_FLUSH_IMAGE=y |
| 7f2c91e5 | 39 | CONFIG_SPL_GD_ADDR=0xf8f9c000 |
| 55cf860b TR |
40 | CONFIG_SPL_RELOC_STACK=0xf8f9d000 |
| 41 | CONFIG_SPL_RELOC_MALLOC=y | |
| 42 | CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 | |
| 43 | CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 | |
| 8728c97e | 44 | CONFIG_SPL_ENV_SUPPORT=y |
| 975e7cf3 | 45 | CONFIG_SPL_I2C=y |
| 6f004ada | 46 | CONFIG_SPL_MPC8XXX_INIT_DDR=y |
| a62b7f0c | 47 | CONFIG_SPL_TARGET="u-boot-with-spl.bin" |
| adad96e6 | 48 | CONFIG_HUSH_PARSER=y |
| d021e942 | 49 | # CONFIG_AUTO_COMPLETE is not set |
| d0ee7f29 | 50 | CONFIG_SYS_PBSIZE=276 |
| ad12dc18 | 51 | CONFIG_CMD_IMLS=y |
| 88cd7d0e TR |
52 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 |
| 53 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 | |
| 88663126 | 54 | CONFIG_CMD_I2C=y |
| 89cb2b5f | 55 | CONFIG_CMD_MMC=y |
| 78d1e1d0 | 56 | CONFIG_CMD_USB=y |
| 89cb2b5f | 57 | CONFIG_CMD_MII=y |
| 78d1e1d0 | 58 | CONFIG_CMD_PING=y |
| 551c3934 | 59 | # CONFIG_CMD_HASH is not set |
| 89cb2b5f TR |
60 | CONFIG_CMD_EXT2=y |
| 61 | CONFIG_CMD_FAT=y | |
| ec70cedb | 62 | CONFIG_OF_CONTROL=y |
| e91907a1 | 63 | CONFIG_ENV_OVERWRITE=y |
| 5dc4dfd2 | 64 | CONFIG_ENV_IS_IN_MMC=y |
| 8d8ee47e | 65 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| fdfb17b1 TR |
66 | CONFIG_USE_BOOTFILE=y |
| 67 | CONFIG_BOOTFILE="uImage" | |
| 0e14cdfa TR |
68 | CONFIG_USE_ETHPRIME=y |
| 69 | CONFIG_ETHPRIME="eTSEC1" | |
| 665c35a7 | 70 | CONFIG_DM=y |
| aca1f678 | 71 | CONFIG_LBA48=y |
| efb5dab7 | 72 | CONFIG_DDR_CLK_FREQ=66666666 |
| bca4509d | 73 | CONFIG_SYS_SPD_BUS_NUM=1 |
| f9147d63 | 74 | CONFIG_CHIP_SELECTS_PER_CTRL=1 |
| c24e8e2b | 75 | CONFIG_SYS_DDR_RAW_TIMING=y |
| c7fad78e TR |
76 | CONFIG_SYS_BR0_PRELIM_BOOL=y |
| 77 | CONFIG_SYS_BR0_PRELIM=0xEF001001 | |
| 78 | CONFIG_SYS_OR0_PRELIM=0xFC000FF7 | |
| 79 | CONFIG_SYS_BR2_PRELIM_BOOL=y | |
| 80 | CONFIG_SYS_BR2_PRELIM=0xFFB00801 | |
| 81 | CONFIG_SYS_OR2_PRELIM=0xFFFE09FF | |
| 82 | CONFIG_SYS_BR3_PRELIM_BOOL=y | |
| 83 | CONFIG_SYS_BR3_PRELIM=0xFFA00801 | |
| 84 | CONFIG_SYS_OR3_PRELIM=0xFFF009F7 | |
| 90f0819a | 85 | CONFIG_SPL_COMMON_INIT_DDR=y |
| b11dc33e | 86 | CONFIG_DM_I2C=y |
| 55dabcc8 | 87 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| fc8d3b9a | 88 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
| 6d5d0c95 TR |
89 | CONFIG_SYS_I2C_FSL=y |
| 90 | CONFIG_SYS_FSL_I2C_OFFSET=0x3000 | |
| 91 | CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y | |
| 92 | CONFIG_SYS_FSL_I2C2_OFFSET=0x3100 | |
| 88cd7d0e | 93 | CONFIG_SYS_I2C_EEPROM_ADDR=0x52 |
| 07dea2e7 | 94 | CONFIG_FSL_ESDHC=y |
| 0cfccb54 | 95 | CONFIG_MTD=y |
| e856bdcf | 96 | CONFIG_MTD_NOR_FLASH=y |
| 2fe88d45 AF |
97 | CONFIG_FLASH_CFI_DRIVER=y |
| 98 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| b72713dc | 99 | CONFIG_SYS_FLASH_EMPTY_INFO=y |
| 2fe88d45 | 100 | CONFIG_SYS_FLASH_CFI=y |
| 1107dad8 | 101 | CONFIG_SYS_FLASH_QUIET_TEST=y |
| 1db251bd | 102 | CONFIG_SYS_MAX_FLASH_SECT=128 |
| b24550ac | 103 | CONFIG_DM_SPI_FLASH=y |
| 14453fbf | 104 | CONFIG_SF_DEFAULT_SPEED=10000000 |
| 68d53420 | 105 | CONFIG_SPI_FLASH_SPANSION=y |
| 306881a0 TR |
106 | CONFIG_PHY_ATHEROS=y |
| 107 | CONFIG_PHY_BROADCOM=y | |
| 108 | CONFIG_PHY_DAVICOM=y | |
| 109 | CONFIG_PHY_LXT=y | |
| a8ca5c8a | 110 | CONFIG_PHY_MARVELL=y |
| 306881a0 TR |
111 | CONFIG_PHY_NATSEMI=y |
| 112 | CONFIG_PHY_REALTEK=y | |
| 113 | CONFIG_PHY_SMSC=y | |
| 114 | CONFIG_PHY_VITESSE=y | |
| b24550ac | 115 | CONFIG_PHY_FIXED=y |
| b24550ac | 116 | CONFIG_DM_MDIO=y |
| 1989374b | 117 | CONFIG_PHY_GIGE=y |
| a77fda1f | 118 | CONFIG_E1000=y |
| 665c35a7 TR |
119 | CONFIG_MII=y |
| 120 | CONFIG_TSEC_ENET=y | |
| 2bc49ecb | 121 | CONFIG_PCIE_FSL=y |
| b11dc33e | 122 | CONFIG_DM_RTC=y |
| 9e39003e | 123 | CONFIG_SYS_NS16550=y |
| f1b1f770 | 124 | CONFIG_SPI=y |
| b24550ac | 125 | CONFIG_DM_SPI=y |
| e5d5d447 | 126 | CONFIG_FSL_ESPI=y |
| 645176d1 | 127 | CONFIG_USB=y |
| f76750d1 | 128 | CONFIG_USB_EHCI_FSL=y |
| 3371edda | 129 | CONFIG_USB_MAX_CONTROLLER_COUNT=2 |
| b24550ac | 130 | CONFIG_USB_STORAGE=y |