drivers/net/ethernet/intel/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/bitops.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/slab.h>
  15 #include <net/checksum.h>
  16 #include <net/ip6_checksum.h>
  17 #include <net/pkt_sched.h>
  18 #include <net/pkt_cls.h>
  19 #include <linux/net_tstamp.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/ip.h>
  28 #include <linux/tcp.h>
  29 #include <linux/sctp.h>
  30 #include <linux/if_ether.h>
  31 #include <linux/aer.h>
  32 #include <linux/prefetch.h>
  33 #include <linux/bpf.h>
  34 #include <linux/bpf_trace.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/etherdevice.h>
  37 #ifdef CONFIG_IGB_DCA
  38 #include <linux/dca.h>
  39 #endif
  40 #include <linux/i2c.h>
  41 #include "igb.h"
  42
  43 enum queue_mode {
  44         QUEUE_MODE_STRICT_PRIORITY,
  45         QUEUE_MODE_STREAM_RESERVATION,
  46 };
  47
  48 enum tx_queue_prio {
  49         TX_QUEUE_PRIO_HIGH,
  50         TX_QUEUE_PRIO_LOW,
  51 };
  52
  53 char igb_driver_name[] = "igb";
  54 static const char igb_driver_string[] =
  55                                 "Intel(R) Gigabit Ethernet Network Driver";
  56 static const char igb_copyright[] =
  57                                 "Copyright (c) 2007-2014 Intel Corporation.";
  58
  59 static const struct e1000_info *igb_info_tbl[] = {
  60         [board_82575] = &e1000_82575_info,
  61 };
  62
  63 static const struct pci_device_id igb_pci_tbl[] = {
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  68         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  99         /* required last entry */
 100         {0, }
 101 };
 102
 103 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 104
 105 static int igb_setup_all_tx_resources(struct igb_adapter *);
 106 static int igb_setup_all_rx_resources(struct igb_adapter *);
 107 static void igb_free_all_tx_resources(struct igb_adapter *);
 108 static void igb_free_all_rx_resources(struct igb_adapter *);
 109 static void igb_setup_mrqc(struct igb_adapter *);
 110 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 111 static void igb_remove(struct pci_dev *pdev);
 112 static int igb_sw_init(struct igb_adapter *);
 113 int igb_open(struct net_device *);
 114 int igb_close(struct net_device *);
 115 static void igb_configure(struct igb_adapter *);
 116 static void igb_configure_tx(struct igb_adapter *);
 117 static void igb_configure_rx(struct igb_adapter *);
 118 static void igb_clean_all_tx_rings(struct igb_adapter *);
 119 static void igb_clean_all_rx_rings(struct igb_adapter *);
 120 static void igb_clean_tx_ring(struct igb_ring *);
 121 static void igb_clean_rx_ring(struct igb_ring *);
 122 static void igb_set_rx_mode(struct net_device *);
 123 static void igb_update_phy_info(struct timer_list *);
 124 static void igb_watchdog(struct timer_list *);
 125 static void igb_watchdog_task(struct work_struct *);
 126 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 127 static void igb_get_stats64(struct net_device *dev,
 128                             struct rtnl_link_stats64 *stats);
 129 static int igb_change_mtu(struct net_device *, int);
 130 static int igb_set_mac(struct net_device *, void *);
 131 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 132 static irqreturn_t igb_intr(int irq, void *);
 133 static irqreturn_t igb_intr_msi(int irq, void *);
 134 static irqreturn_t igb_msix_other(int irq, void *);
 135 static irqreturn_t igb_msix_ring(int irq, void *);
 136 #ifdef CONFIG_IGB_DCA
 137 static void igb_update_dca(struct igb_q_vector *);
 138 static void igb_setup_dca(struct igb_adapter *);
 139 #endif /* CONFIG_IGB_DCA */
 140 static int igb_poll(struct napi_struct *, int);
 141 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 142 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 143 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 144 static void igb_tx_timeout(struct net_device *, unsigned int txqueue);
 145 static void igb_reset_task(struct work_struct *);
 146 static void igb_vlan_mode(struct net_device *netdev,
 147                           netdev_features_t features);
 148 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 149 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 150 static void igb_restore_vlan(struct igb_adapter *);
 151 static void igb_rar_set_index(struct igb_adapter *, u32);
 152 static void igb_ping_all_vfs(struct igb_adapter *);
 153 static void igb_msg_task(struct igb_adapter *);
 154 static void igb_vmm_control(struct igb_adapter *);
 155 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 156 static void igb_flush_mac_table(struct igb_adapter *);
 157 static int igb_available_rars(struct igb_adapter *, u8);
 158 static void igb_set_default_mac_filter(struct igb_adapter *);
 159 static int igb_uc_sync(struct net_device *, const unsigned char *);
 160 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 161 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 162 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 163 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 164                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 165 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 166 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 167                                    bool setting);
 168 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
 169                                 bool setting);
 170 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 171                                  struct ifla_vf_info *ivi);
 172 static void igb_check_vf_rate_limit(struct igb_adapter *);
 173 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 174 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 175
 176 #ifdef CONFIG_PCI_IOV
 177 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 178 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 179 static int igb_disable_sriov(struct pci_dev *dev);
 180 static int igb_pci_disable_sriov(struct pci_dev *dev);
 181 #endif
 182
 183 static int igb_suspend(struct device *);
 184 static int igb_resume(struct device *);
 185 static int igb_runtime_suspend(struct device *dev);
 186 static int igb_runtime_resume(struct device *dev);
 187 static int igb_runtime_idle(struct device *dev);
 188 static const struct dev_pm_ops igb_pm_ops = {
 189         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 190         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 191                         igb_runtime_idle)
 192 };
 193 static void igb_shutdown(struct pci_dev *);
 194 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 195 #ifdef CONFIG_IGB_DCA
 196 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 197 static struct notifier_block dca_notifier = {
 198         .notifier_call  = igb_notify_dca,
 199         .next           = NULL,
 200         .priority       = 0
 201 };
 202 #endif
 203 #ifdef CONFIG_PCI_IOV
 204 static unsigned int max_vfs;
 205 module_param(max_vfs, uint, 0);
 206 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 207 #endif /* CONFIG_PCI_IOV */
 208
 209 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 210                      pci_channel_state_t);
 211 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 212 static void igb_io_resume(struct pci_dev *);
 213
 214 static const struct pci_error_handlers igb_err_handler = {
 215         .error_detected = igb_io_error_detected,
 216         .slot_reset = igb_io_slot_reset,
 217         .resume = igb_io_resume,
 218 };
 219
 220 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 221
 222 static struct pci_driver igb_driver = {
 223         .name     = igb_driver_name,
 224         .id_table = igb_pci_tbl,
 225         .probe    = igb_probe,
 226         .remove   = igb_remove,
 227 #ifdef CONFIG_PM
 228         .driver.pm = &igb_pm_ops,
 229 #endif
 230         .shutdown = igb_shutdown,
 231         .sriov_configure = igb_pci_sriov_configure,
 232         .err_handler = &igb_err_handler
 233 };
 234
 235 MODULE_AUTHOR("Intel Corporation, <[email protected]>");
 236 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 237 MODULE_LICENSE("GPL v2");
 238
 239 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 240 static int debug = -1;
 241 module_param(debug, int, 0);
 242 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 243
 244 struct igb_reg_info {
 245         u32 ofs;
 246         char *name;
 247 };
 248
 249 static const struct igb_reg_info igb_reg_info_tbl[] = {
 250
 251         /* General Registers */
 252         {E1000_CTRL, "CTRL"},
 253         {E1000_STATUS, "STATUS"},
 254         {E1000_CTRL_EXT, "CTRL_EXT"},
 255
 256         /* Interrupt Registers */
 257         {E1000_ICR, "ICR"},
 258
 259         /* RX Registers */
 260         {E1000_RCTL, "RCTL"},
 261         {E1000_RDLEN(0), "RDLEN"},
 262         {E1000_RDH(0), "RDH"},
 263         {E1000_RDT(0), "RDT"},
 264         {E1000_RXDCTL(0), "RXDCTL"},
 265         {E1000_RDBAL(0), "RDBAL"},
 266         {E1000_RDBAH(0), "RDBAH"},
 267
 268         /* TX Registers */
 269         {E1000_TCTL, "TCTL"},
 270         {E1000_TDBAL(0), "TDBAL"},
 271         {E1000_TDBAH(0), "TDBAH"},
 272         {E1000_TDLEN(0), "TDLEN"},
 273         {E1000_TDH(0), "TDH"},
 274         {E1000_TDT(0), "TDT"},
 275         {E1000_TXDCTL(0), "TXDCTL"},
 276         {E1000_TDFH, "TDFH"},
 277         {E1000_TDFT, "TDFT"},
 278         {E1000_TDFHS, "TDFHS"},
 279         {E1000_TDFPC, "TDFPC"},
 280
 281         /* List Terminator */
 282         {}
 283 };
 284
 285 /* igb_regdump - register printout routine */
 286 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 287 {
 288         int n = 0;
 289         char rname[16];
 290         u32 regs[8];
 291
 292         switch (reginfo->ofs) {
 293         case E1000_RDLEN(0):
 294                 for (n = 0; n < 4; n++)
 295                         regs[n] = rd32(E1000_RDLEN(n));
 296                 break;
 297         case E1000_RDH(0):
 298                 for (n = 0; n < 4; n++)
 299                         regs[n] = rd32(E1000_RDH(n));
 300                 break;
 301         case E1000_RDT(0):
 302                 for (n = 0; n < 4; n++)
 303                         regs[n] = rd32(E1000_RDT(n));
 304                 break;
 305         case E1000_RXDCTL(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RXDCTL(n));
 308                 break;
 309         case E1000_RDBAL(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDBAL(n));
 312                 break;
 313         case E1000_RDBAH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDBAH(n));
 316                 break;
 317         case E1000_TDBAL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_TDBAL(n));
 320                 break;
 321         case E1000_TDBAH(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_TDBAH(n));
 324                 break;
 325         case E1000_TDLEN(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_TDLEN(n));
 328                 break;
 329         case E1000_TDH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_TDH(n));
 332                 break;
 333         case E1000_TDT(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDT(n));
 336                 break;
 337         case E1000_TXDCTL(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TXDCTL(n));
 340                 break;
 341         default:
 342                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 343                 return;
 344         }
 345
 346         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 347         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 348                 regs[2], regs[3]);
 349 }
 350
 351 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 352 static void igb_dump(struct igb_adapter *adapter)
 353 {
 354         struct net_device *netdev = adapter->netdev;
 355         struct e1000_hw *hw = &adapter->hw;
 356         struct igb_reg_info *reginfo;
 357         struct igb_ring *tx_ring;
 358         union e1000_adv_tx_desc *tx_desc;
 359         struct my_u0 { __le64 a; __le64 b; } *u0;
 360         struct igb_ring *rx_ring;
 361         union e1000_adv_rx_desc *rx_desc;
 362         u32 staterr;
 363         u16 i, n;
 364
 365         if (!netif_msg_hw(adapter))
 366                 return;
 367
 368         /* Print netdevice Info */
 369         if (netdev) {
 370                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 371                 pr_info("Device Name     state            trans_start\n");
 372                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 373                         netdev->state, dev_trans_start(netdev));
 374         }
 375
 376         /* Print Registers */
 377         dev_info(&adapter->pdev->dev, "Register Dump\n");
 378         pr_info(" Register Name   Value\n");
 379         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 380              reginfo->name; reginfo++) {
 381                 igb_regdump(hw, reginfo);
 382         }
 383
 384         /* Print TX Ring Summary */
 385         if (!netdev || !netif_running(netdev))
 386                 goto exit;
 387
 388         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 389         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 390         for (n = 0; n < adapter->num_tx_queues; n++) {
 391                 struct igb_tx_buffer *buffer_info;
 392                 tx_ring = adapter->tx_ring[n];
 393                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 394                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 395                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 396                         (u64)dma_unmap_addr(buffer_info, dma),
 397                         dma_unmap_len(buffer_info, len),
 398                         buffer_info->next_to_watch,
 399                         (u64)buffer_info->time_stamp);
 400         }
 401
 402         /* Print TX Rings */
 403         if (!netif_msg_tx_done(adapter))
 404                 goto rx_ring_summary;
 405
 406         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 407
 408         /* Transmit Descriptor Formats
 409          *
 410          * Advanced Transmit Descriptor
 411          *   +--------------------------------------------------------------+
 412          * 0 |         Buffer Address [63:0]                                |
 413          *   +--------------------------------------------------------------+
 414          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 415          *   +--------------------------------------------------------------+
 416          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 417          */
 418
 419         for (n = 0; n < adapter->num_tx_queues; n++) {
 420                 tx_ring = adapter->tx_ring[n];
 421                 pr_info("------------------------------------\n");
 422                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 423                 pr_info("------------------------------------\n");
 424                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 425
 426                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 427                         const char *next_desc;
 428                         struct igb_tx_buffer *buffer_info;
 429                         tx_desc = IGB_TX_DESC(tx_ring, i);
 430                         buffer_info = &tx_ring->tx_buffer_info[i];
 431                         u0 = (struct my_u0 *)tx_desc;
 432                         if (i == tx_ring->next_to_use &&
 433                             i == tx_ring->next_to_clean)
 434                                 next_desc = " NTC/U";
 435                         else if (i == tx_ring->next_to_use)
 436                                 next_desc = " NTU";
 437                         else if (i == tx_ring->next_to_clean)
 438                                 next_desc = " NTC";
 439                         else
 440                                 next_desc = "";
 441
 442                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 443                                 i, le64_to_cpu(u0->a),
 444                                 le64_to_cpu(u0->b),
 445                                 (u64)dma_unmap_addr(buffer_info, dma),
 446                                 dma_unmap_len(buffer_info, len),
 447                                 buffer_info->next_to_watch,
 448                                 (u64)buffer_info->time_stamp,
 449                                 buffer_info->skb, next_desc);
 450
 451                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 452                                 print_hex_dump(KERN_INFO, "",
 453                                         DUMP_PREFIX_ADDRESS,
 454                                         16, 1, buffer_info->skb->data,
 455                                         dma_unmap_len(buffer_info, len),
 456                                         true);
 457                 }
 458         }
 459
 460         /* Print RX Rings Summary */
 461 rx_ring_summary:
 462         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 463         pr_info("Queue [NTU] [NTC]\n");
 464         for (n = 0; n < adapter->num_rx_queues; n++) {
 465                 rx_ring = adapter->rx_ring[n];
 466                 pr_info(" %5d %5X %5X\n",
 467                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 468         }
 469
 470         /* Print RX Rings */
 471         if (!netif_msg_rx_status(adapter))
 472                 goto exit;
 473
 474         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 475
 476         /* Advanced Receive Descriptor (Read) Format
 477          *    63                                           1        0
 478          *    +-----------------------------------------------------+
 479          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 480          *    +----------------------------------------------+------+
 481          *  8 |       Header Buffer Address [63:1]           |  DD  |
 482          *    +-----------------------------------------------------+
 483          *
 484          *
 485          * Advanced Receive Descriptor (Write-Back) Format
 486          *
 487          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 488          *   +------------------------------------------------------+
 489          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 490          *   | Checksum   Ident  |   |           |    | Type | Type |
 491          *   +------------------------------------------------------+
 492          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 493          *   +------------------------------------------------------+
 494          *   63       48 47    32 31            20 19               0
 495          */
 496
 497         for (n = 0; n < adapter->num_rx_queues; n++) {
 498                 rx_ring = adapter->rx_ring[n];
 499                 pr_info("------------------------------------\n");
 500                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 501                 pr_info("------------------------------------\n");
 502                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 503                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 504
 505                 for (i = 0; i < rx_ring->count; i++) {
 506                         const char *next_desc;
 507                         struct igb_rx_buffer *buffer_info;
 508                         buffer_info = &rx_ring->rx_buffer_info[i];
 509                         rx_desc = IGB_RX_DESC(rx_ring, i);
 510                         u0 = (struct my_u0 *)rx_desc;
 511                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 512
 513                         if (i == rx_ring->next_to_use)
 514                                 next_desc = " NTU";
 515                         else if (i == rx_ring->next_to_clean)
 516                                 next_desc = " NTC";
 517                         else
 518                                 next_desc = "";
 519
 520                         if (staterr & E1000_RXD_STAT_DD) {
 521                                 /* Descriptor Done */
 522                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 523                                         "RWB", i,
 524                                         le64_to_cpu(u0->a),
 525                                         le64_to_cpu(u0->b),
 526                                         next_desc);
 527                         } else {
 528                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 529                                         "R  ", i,
 530                                         le64_to_cpu(u0->a),
 531                                         le64_to_cpu(u0->b),
 532                                         (u64)buffer_info->dma,
 533                                         next_desc);
 534
 535                                 if (netif_msg_pktdata(adapter) &&
 536                                     buffer_info->dma && buffer_info->page) {
 537                                         print_hex_dump(KERN_INFO, "",
 538                                           DUMP_PREFIX_ADDRESS,
 539                                           16, 1,
 540                                           page_address(buffer_info->page) +
 541                                                       buffer_info->page_offset,
 542                                           igb_rx_bufsz(rx_ring), true);
 543                                 }
 544                         }
 545                 }
 546         }
 547
 548 exit:
 549         return;
 550 }
 551
 552 /**
 553  *  igb_get_i2c_data - Reads the I2C SDA data bit
 554  *  @data: opaque pointer to adapter struct
 555  *
 556  *  Returns the I2C data bit value
 557  **/
 558 static int igb_get_i2c_data(void *data)
 559 {
 560         struct igb_adapter *adapter = (struct igb_adapter *)data;
 561         struct e1000_hw *hw = &adapter->hw;
 562         s32 i2cctl = rd32(E1000_I2CPARAMS);
 563
 564         return !!(i2cctl & E1000_I2C_DATA_IN);
 565 }
 566
 567 /**
 568  *  igb_set_i2c_data - Sets the I2C data bit
 569  *  @data: pointer to hardware structure
 570  *  @state: I2C data value (0 or 1) to set
 571  *
 572  *  Sets the I2C data bit
 573  **/
 574 static void igb_set_i2c_data(void *data, int state)
 575 {
 576         struct igb_adapter *adapter = (struct igb_adapter *)data;
 577         struct e1000_hw *hw = &adapter->hw;
 578         s32 i2cctl = rd32(E1000_I2CPARAMS);
 579
 580         if (state) {
 581                 i2cctl |= E1000_I2C_DATA_OUT | E1000_I2C_DATA_OE_N;
 582         } else {
 583                 i2cctl &= ~E1000_I2C_DATA_OE_N;
 584                 i2cctl &= ~E1000_I2C_DATA_OUT;
 585         }
 586
 587         wr32(E1000_I2CPARAMS, i2cctl);
 588         wrfl();
 589 }
 590
 591 /**
 592  *  igb_set_i2c_clk - Sets the I2C SCL clock
 593  *  @data: pointer to hardware structure
 594  *  @state: state to set clock
 595  *
 596  *  Sets the I2C clock line to state
 597  **/
 598 static void igb_set_i2c_clk(void *data, int state)
 599 {
 600         struct igb_adapter *adapter = (struct igb_adapter *)data;
 601         struct e1000_hw *hw = &adapter->hw;
 602         s32 i2cctl = rd32(E1000_I2CPARAMS);
 603
 604         if (state) {
 605                 i2cctl |= E1000_I2C_CLK_OUT | E1000_I2C_CLK_OE_N;
 606         } else {
 607                 i2cctl &= ~E1000_I2C_CLK_OUT;
 608                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 609         }
 610         wr32(E1000_I2CPARAMS, i2cctl);
 611         wrfl();
 612 }
 613
 614 /**
 615  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 616  *  @data: pointer to hardware structure
 617  *
 618  *  Gets the I2C clock state
 619  **/
 620 static int igb_get_i2c_clk(void *data)
 621 {
 622         struct igb_adapter *adapter = (struct igb_adapter *)data;
 623         struct e1000_hw *hw = &adapter->hw;
 624         s32 i2cctl = rd32(E1000_I2CPARAMS);
 625
 626         return !!(i2cctl & E1000_I2C_CLK_IN);
 627 }
 628
 629 static const struct i2c_algo_bit_data igb_i2c_algo = {
 630         .setsda         = igb_set_i2c_data,
 631         .setscl         = igb_set_i2c_clk,
 632         .getsda         = igb_get_i2c_data,
 633         .getscl         = igb_get_i2c_clk,
 634         .udelay         = 5,
 635         .timeout        = 20,
 636 };
 637
 638 /**
 639  *  igb_get_hw_dev - return device
 640  *  @hw: pointer to hardware structure
 641  *
 642  *  used by hardware layer to print debugging information
 643  **/
 644 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 645 {
 646         struct igb_adapter *adapter = hw->back;
 647         return adapter->netdev;
 648 }
 649
 650 /**
 651  *  igb_init_module - Driver Registration Routine
 652  *
 653  *  igb_init_module is the first routine called when the driver is
 654  *  loaded. All it does is register with the PCI subsystem.
 655  **/
 656 static int __init igb_init_module(void)
 657 {
 658         int ret;
 659
 660         pr_info("%s\n", igb_driver_string);
 661         pr_info("%s\n", igb_copyright);
 662
 663 #ifdef CONFIG_IGB_DCA
 664         dca_register_notify(&dca_notifier);
 665 #endif
 666         ret = pci_register_driver(&igb_driver);
 667         return ret;
 668 }
 669
 670 module_init(igb_init_module);
 671
 672 /**
 673  *  igb_exit_module - Driver Exit Cleanup Routine
 674  *
 675  *  igb_exit_module is called just before the driver is removed
 676  *  from memory.
 677  **/
 678 static void __exit igb_exit_module(void)
 679 {
 680 #ifdef CONFIG_IGB_DCA
 681         dca_unregister_notify(&dca_notifier);
 682 #endif
 683         pci_unregister_driver(&igb_driver);
 684 }
 685
 686 module_exit(igb_exit_module);
 687
 688 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 689 /**
 690  *  igb_cache_ring_register - Descriptor ring to register mapping
 691  *  @adapter: board private structure to initialize
 692  *
 693  *  Once we know the feature-set enabled for the device, we'll cache
 694  *  the register offset the descriptor ring is assigned to.
 695  **/
 696 static void igb_cache_ring_register(struct igb_adapter *adapter)
 697 {
 698         int i = 0, j = 0;
 699         u32 rbase_offset = adapter->vfs_allocated_count;
 700
 701         switch (adapter->hw.mac.type) {
 702         case e1000_82576:
 703                 /* The queues are allocated for virtualization such that VF 0
 704                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 705                  * In order to avoid collision we start at the first free queue
 706                  * and continue consuming queues in the same sequence
 707                  */
 708                 if (adapter->vfs_allocated_count) {
 709                         for (; i < adapter->rss_queues; i++)
 710                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 711                                                                Q_IDX_82576(i);
 712                 }
 713                 fallthrough;
 714         case e1000_82575:
 715         case e1000_82580:
 716         case e1000_i350:
 717         case e1000_i354:
 718         case e1000_i210:
 719         case e1000_i211:
 720         default:
 721                 for (; i < adapter->num_rx_queues; i++)
 722                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 723                 for (; j < adapter->num_tx_queues; j++)
 724                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 725                 break;
 726         }
 727 }
 728
 729 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 730 {
 731         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 732         u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
 733         u32 value = 0;
 734
 735         if (E1000_REMOVED(hw_addr))
 736                 return ~value;
 737
 738         value = readl(&hw_addr[reg]);
 739
 740         /* reads should not return all F's */
 741         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 742                 struct net_device *netdev = igb->netdev;
 743                 hw->hw_addr = NULL;
 744                 netdev_err(netdev, "PCIe link lost\n");
 745                 WARN(pci_device_is_present(igb->pdev),
 746                      "igb: Failed to read reg 0x%x!\n", reg);
 747         }
 748
 749         return value;
 750 }
 751
 752 /**
 753  *  igb_write_ivar - configure ivar for given MSI-X vector
 754  *  @hw: pointer to the HW structure
 755  *  @msix_vector: vector number we are allocating to a given ring
 756  *  @index: row index of IVAR register to write within IVAR table
 757  *  @offset: column offset of in IVAR, should be multiple of 8
 758  *
 759  *  This function is intended to handle the writing of the IVAR register
 760  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 761  *  each containing an cause allocation for an Rx and Tx ring, and a
 762  *  variable number of rows depending on the number of queues supported.
 763  **/
 764 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 765                            int index, int offset)
 766 {
 767         u32 ivar = array_rd32(E1000_IVAR0, index);
 768
 769         /* clear any bits that are currently set */
 770         ivar &= ~((u32)0xFF << offset);
 771
 772         /* write vector and valid bit */
 773         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 774
 775         array_wr32(E1000_IVAR0, index, ivar);
 776 }
 777
 778 #define IGB_N0_QUEUE -1
 779 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 780 {
 781         struct igb_adapter *adapter = q_vector->adapter;
 782         struct e1000_hw *hw = &adapter->hw;
 783         int rx_queue = IGB_N0_QUEUE;
 784         int tx_queue = IGB_N0_QUEUE;
 785         u32 msixbm = 0;
 786
 787         if (q_vector->rx.ring)
 788                 rx_queue = q_vector->rx.ring->reg_idx;
 789         if (q_vector->tx.ring)
 790                 tx_queue = q_vector->tx.ring->reg_idx;
 791
 792         switch (hw->mac.type) {
 793         case e1000_82575:
 794                 /* The 82575 assigns vectors using a bitmask, which matches the
 795                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 796                  * or more queues to a vector, we write the appropriate bits
 797                  * into the MSIXBM register for that vector.
 798                  */
 799                 if (rx_queue > IGB_N0_QUEUE)
 800                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 801                 if (tx_queue > IGB_N0_QUEUE)
 802                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 803                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 804                         msixbm |= E1000_EIMS_OTHER;
 805                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 806                 q_vector->eims_value = msixbm;
 807                 break;
 808         case e1000_82576:
 809                 /* 82576 uses a table that essentially consists of 2 columns
 810                  * with 8 rows.  The ordering is column-major so we use the
 811                  * lower 3 bits as the row index, and the 4th bit as the
 812                  * column offset.
 813                  */
 814                 if (rx_queue > IGB_N0_QUEUE)
 815                         igb_write_ivar(hw, msix_vector,
 816                                        rx_queue & 0x7,
 817                                        (rx_queue & 0x8) << 1);
 818                 if (tx_queue > IGB_N0_QUEUE)
 819                         igb_write_ivar(hw, msix_vector,
 820                                        tx_queue & 0x7,
 821                                        ((tx_queue & 0x8) << 1) + 8);
 822                 q_vector->eims_value = BIT(msix_vector);
 823                 break;
 824         case e1000_82580:
 825         case e1000_i350:
 826         case e1000_i354:
 827         case e1000_i210:
 828         case e1000_i211:
 829                 /* On 82580 and newer adapters the scheme is similar to 82576
 830                  * however instead of ordering column-major we have things
 831                  * ordered row-major.  So we traverse the table by using
 832                  * bit 0 as the column offset, and the remaining bits as the
 833                  * row index.
 834                  */
 835                 if (rx_queue > IGB_N0_QUEUE)
 836                         igb_write_ivar(hw, msix_vector,
 837                                        rx_queue >> 1,
 838                                        (rx_queue & 0x1) << 4);
 839                 if (tx_queue > IGB_N0_QUEUE)
 840                         igb_write_ivar(hw, msix_vector,
 841                                        tx_queue >> 1,
 842                                        ((tx_queue & 0x1) << 4) + 8);
 843                 q_vector->eims_value = BIT(msix_vector);
 844                 break;
 845         default:
 846                 BUG();
 847                 break;
 848         }
 849
 850         /* add q_vector eims value to global eims_enable_mask */
 851         adapter->eims_enable_mask |= q_vector->eims_value;
 852
 853         /* configure q_vector to set itr on first interrupt */
 854         q_vector->set_itr = 1;
 855 }
 856
 857 /**
 858  *  igb_configure_msix - Configure MSI-X hardware
 859  *  @adapter: board private structure to initialize
 860  *
 861  *  igb_configure_msix sets up the hardware to properly
 862  *  generate MSI-X interrupts.
 863  **/
 864 static void igb_configure_msix(struct igb_adapter *adapter)
 865 {
 866         u32 tmp;
 867         int i, vector = 0;
 868         struct e1000_hw *hw = &adapter->hw;
 869
 870         adapter->eims_enable_mask = 0;
 871
 872         /* set vector for other causes, i.e. link changes */
 873         switch (hw->mac.type) {
 874         case e1000_82575:
 875                 tmp = rd32(E1000_CTRL_EXT);
 876                 /* enable MSI-X PBA support*/
 877                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 878
 879                 /* Auto-Mask interrupts upon ICR read. */
 880                 tmp |= E1000_CTRL_EXT_EIAME;
 881                 tmp |= E1000_CTRL_EXT_IRCA;
 882
 883                 wr32(E1000_CTRL_EXT, tmp);
 884
 885                 /* enable msix_other interrupt */
 886                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 887                 adapter->eims_other = E1000_EIMS_OTHER;
 888
 889                 break;
 890
 891         case e1000_82576:
 892         case e1000_82580:
 893         case e1000_i350:
 894         case e1000_i354:
 895         case e1000_i210:
 896         case e1000_i211:
 897                 /* Turn on MSI-X capability first, or our settings
 898                  * won't stick.  And it will take days to debug.
 899                  */
 900                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 901                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 902                      E1000_GPIE_NSICR);
 903
 904                 /* enable msix_other interrupt */
 905                 adapter->eims_other = BIT(vector);
 906                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 907
 908                 wr32(E1000_IVAR_MISC, tmp);
 909                 break;
 910         default:
 911                 /* do nothing, since nothing else supports MSI-X */
 912                 break;
 913         } /* switch (hw->mac.type) */
 914
 915         adapter->eims_enable_mask |= adapter->eims_other;
 916
 917         for (i = 0; i < adapter->num_q_vectors; i++)
 918                 igb_assign_vector(adapter->q_vector[i], vector++);
 919
 920         wrfl();
 921 }
 922
 923 /**
 924  *  igb_request_msix - Initialize MSI-X interrupts
 925  *  @adapter: board private structure to initialize
 926  *
 927  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 928  *  kernel.
 929  **/
 930 static int igb_request_msix(struct igb_adapter *adapter)
 931 {
 932         unsigned int num_q_vectors = adapter->num_q_vectors;
 933         struct net_device *netdev = adapter->netdev;
 934         int i, err = 0, vector = 0, free_vector = 0;
 935
 936         err = request_irq(adapter->msix_entries[vector].vector,
 937                           igb_msix_other, 0, netdev->name, adapter);
 938         if (err)
 939                 goto err_out;
 940
 941         if (num_q_vectors > MAX_Q_VECTORS) {
 942                 num_q_vectors = MAX_Q_VECTORS;
 943                 dev_warn(&adapter->pdev->dev,
 944                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 945                          adapter->num_q_vectors, MAX_Q_VECTORS);
 946         }
 947         for (i = 0; i < num_q_vectors; i++) {
 948                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 949
 950                 vector++;
 951
 952                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 953
 954                 if (q_vector->rx.ring && q_vector->tx.ring)
 955                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 956                                 q_vector->rx.ring->queue_index);
 957                 else if (q_vector->tx.ring)
 958                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 959                                 q_vector->tx.ring->queue_index);
 960                 else if (q_vector->rx.ring)
 961                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 962                                 q_vector->rx.ring->queue_index);
 963                 else
 964                         sprintf(q_vector->name, "%s-unused", netdev->name);
 965
 966                 err = request_irq(adapter->msix_entries[vector].vector,
 967                                   igb_msix_ring, 0, q_vector->name,
 968                                   q_vector);
 969                 if (err)
 970                         goto err_free;
 971         }
 972
 973         igb_configure_msix(adapter);
 974         return 0;
 975
 976 err_free:
 977         /* free already assigned IRQs */
 978         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 979
 980         vector--;
 981         for (i = 0; i < vector; i++) {
 982                 free_irq(adapter->msix_entries[free_vector++].vector,
 983                          adapter->q_vector[i]);
 984         }
 985 err_out:
 986         return err;
 987 }
 988
 989 /**
 990  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 991  *  @adapter: board private structure to initialize
 992  *  @v_idx: Index of vector to be freed
 993  *
 994  *  This function frees the memory allocated to the q_vector.
 995  **/
 996 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 997 {
 998         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 999
1000         adapter->q_vector[v_idx] = NULL;
1001
1002         /* igb_get_stats64() might access the rings on this vector,
1003          * we must wait a grace period before freeing it.
1004          */
1005         if (q_vector)
1006                 kfree_rcu(q_vector, rcu);
1007 }
1008
1009 /**
1010  *  igb_reset_q_vector - Reset config for interrupt vector
1011  *  @adapter: board private structure to initialize
1012  *  @v_idx: Index of vector to be reset
1013  *
1014  *  If NAPI is enabled it will delete any references to the
1015  *  NAPI struct. This is preparation for igb_free_q_vector.
1016  **/
1017 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1018 {
1019         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1020
1021         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1022          * allocated. So, q_vector is NULL so we should stop here.
1023          */
1024         if (!q_vector)
1025                 return;
1026
1027         if (q_vector->tx.ring)
1028                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1029
1030         if (q_vector->rx.ring)
1031                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1032
1033         netif_napi_del(&q_vector->napi);
1034
1035 }
1036
1037 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1038 {
1039         int v_idx = adapter->num_q_vectors;
1040
1041         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1042                 pci_disable_msix(adapter->pdev);
1043         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1044                 pci_disable_msi(adapter->pdev);
1045
1046         while (v_idx--)
1047                 igb_reset_q_vector(adapter, v_idx);
1048 }
1049
1050 /**
1051  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1052  *  @adapter: board private structure to initialize
1053  *
1054  *  This function frees the memory allocated to the q_vectors.  In addition if
1055  *  NAPI is enabled it will delete any references to the NAPI struct prior
1056  *  to freeing the q_vector.
1057  **/
1058 static void igb_free_q_vectors(struct igb_adapter *adapter)
1059 {
1060         int v_idx = adapter->num_q_vectors;
1061
1062         adapter->num_tx_queues = 0;
1063         adapter->num_rx_queues = 0;
1064         adapter->num_q_vectors = 0;
1065
1066         while (v_idx--) {
1067                 igb_reset_q_vector(adapter, v_idx);
1068                 igb_free_q_vector(adapter, v_idx);
1069         }
1070 }
1071
1072 /**
1073  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1074  *  @adapter: board private structure to initialize
1075  *
1076  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1077  *  MSI-X interrupts allocated.
1078  */
1079 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1080 {
1081         igb_free_q_vectors(adapter);
1082         igb_reset_interrupt_capability(adapter);
1083 }
1084
1085 /**
1086  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1087  *  @adapter: board private structure to initialize
1088  *  @msix: boolean value of MSIX capability
1089  *
1090  *  Attempt to configure interrupts using the best available
1091  *  capabilities of the hardware and kernel.
1092  **/
1093 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1094 {
1095         int err;
1096         int numvecs, i;
1097
1098         if (!msix)
1099                 goto msi_only;
1100         adapter->flags |= IGB_FLAG_HAS_MSIX;
1101
1102         /* Number of supported queues. */
1103         adapter->num_rx_queues = adapter->rss_queues;
1104         if (adapter->vfs_allocated_count)
1105                 adapter->num_tx_queues = 1;
1106         else
1107                 adapter->num_tx_queues = adapter->rss_queues;
1108
1109         /* start with one vector for every Rx queue */
1110         numvecs = adapter->num_rx_queues;
1111
1112         /* if Tx handler is separate add 1 for every Tx queue */
1113         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1114                 numvecs += adapter->num_tx_queues;
1115
1116         /* store the number of vectors reserved for queues */
1117         adapter->num_q_vectors = numvecs;
1118
1119         /* add 1 vector for link status interrupts */
1120         numvecs++;
1121         for (i = 0; i < numvecs; i++)
1122                 adapter->msix_entries[i].entry = i;
1123
1124         err = pci_enable_msix_range(adapter->pdev,
1125                                     adapter->msix_entries,
1126                                     numvecs,
1127                                     numvecs);
1128         if (err > 0)
1129                 return;
1130
1131         igb_reset_interrupt_capability(adapter);
1132
1133         /* If we can't do MSI-X, try MSI */
1134 msi_only:
1135         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1136 #ifdef CONFIG_PCI_IOV
1137         /* disable SR-IOV for non MSI-X configurations */
1138         if (adapter->vf_data) {
1139                 struct e1000_hw *hw = &adapter->hw;
1140                 /* disable iov and allow time for transactions to clear */
1141                 pci_disable_sriov(adapter->pdev);
1142                 msleep(500);
1143
1144                 kfree(adapter->vf_mac_list);
1145                 adapter->vf_mac_list = NULL;
1146                 kfree(adapter->vf_data);
1147                 adapter->vf_data = NULL;
1148                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1149                 wrfl();
1150                 msleep(100);
1151                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1152         }
1153 #endif
1154         adapter->vfs_allocated_count = 0;
1155         adapter->rss_queues = 1;
1156         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1157         adapter->num_rx_queues = 1;
1158         adapter->num_tx_queues = 1;
1159         adapter->num_q_vectors = 1;
1160         if (!pci_enable_msi(adapter->pdev))
1161                 adapter->flags |= IGB_FLAG_HAS_MSI;
1162 }
1163
1164 static void igb_add_ring(struct igb_ring *ring,
1165                          struct igb_ring_container *head)
1166 {
1167         head->ring = ring;
1168         head->count++;
1169 }
1170
1171 /**
1172  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1173  *  @adapter: board private structure to initialize
1174  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1175  *  @v_idx: index of vector in adapter struct
1176  *  @txr_count: total number of Tx rings to allocate
1177  *  @txr_idx: index of first Tx ring to allocate
1178  *  @rxr_count: total number of Rx rings to allocate
1179  *  @rxr_idx: index of first Rx ring to allocate
1180  *
1181  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1182  **/
1183 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1184                               int v_count, int v_idx,
1185                               int txr_count, int txr_idx,
1186                               int rxr_count, int rxr_idx)
1187 {
1188         struct igb_q_vector *q_vector;
1189         struct igb_ring *ring;
1190         int ring_count;
1191         size_t size;
1192
1193         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1194         if (txr_count > 1 || rxr_count > 1)
1195                 return -ENOMEM;
1196
1197         ring_count = txr_count + rxr_count;
1198         size = kmalloc_size_roundup(struct_size(q_vector, ring, ring_count));
1199
1200         /* allocate q_vector and rings */
1201         q_vector = adapter->q_vector[v_idx];
1202         if (!q_vector) {
1203                 q_vector = kzalloc(size, GFP_KERNEL);
1204         } else if (size > ksize(q_vector)) {
1205                 struct igb_q_vector *new_q_vector;
1206
1207                 new_q_vector = kzalloc(size, GFP_KERNEL);
1208                 if (new_q_vector)
1209                         kfree_rcu(q_vector, rcu);
1210                 q_vector = new_q_vector;
1211         } else {
1212                 memset(q_vector, 0, size);
1213         }
1214         if (!q_vector)
1215                 return -ENOMEM;
1216
1217         /* initialize NAPI */
1218         netif_napi_add(adapter->netdev, &q_vector->napi, igb_poll);
1219
1220         /* tie q_vector and adapter together */
1221         adapter->q_vector[v_idx] = q_vector;
1222         q_vector->adapter = adapter;
1223
1224         /* initialize work limits */
1225         q_vector->tx.work_limit = adapter->tx_work_limit;
1226
1227         /* initialize ITR configuration */
1228         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1229         q_vector->itr_val = IGB_START_ITR;
1230
1231         /* initialize pointer to rings */
1232         ring = q_vector->ring;
1233
1234         /* intialize ITR */
1235         if (rxr_count) {
1236                 /* rx or rx/tx vector */
1237                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1238                         q_vector->itr_val = adapter->rx_itr_setting;
1239         } else {
1240                 /* tx only vector */
1241                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1242                         q_vector->itr_val = adapter->tx_itr_setting;
1243         }
1244
1245         if (txr_count) {
1246                 /* assign generic ring traits */
1247                 ring->dev = &adapter->pdev->dev;
1248                 ring->netdev = adapter->netdev;
1249
1250                 /* configure backlink on ring */
1251                 ring->q_vector = q_vector;
1252
1253                 /* update q_vector Tx values */
1254                 igb_add_ring(ring, &q_vector->tx);
1255
1256                 /* For 82575, context index must be unique per ring. */
1257                 if (adapter->hw.mac.type == e1000_82575)
1258                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1259
1260                 /* apply Tx specific ring traits */
1261                 ring->count = adapter->tx_ring_count;
1262                 ring->queue_index = txr_idx;
1263
1264                 ring->cbs_enable = false;
1265                 ring->idleslope = 0;
1266                 ring->sendslope = 0;
1267                 ring->hicredit = 0;
1268                 ring->locredit = 0;
1269
1270                 u64_stats_init(&ring->tx_syncp);
1271                 u64_stats_init(&ring->tx_syncp2);
1272
1273                 /* assign ring to adapter */
1274                 adapter->tx_ring[txr_idx] = ring;
1275
1276                 /* push pointer to next ring */
1277                 ring++;
1278         }
1279
1280         if (rxr_count) {
1281                 /* assign generic ring traits */
1282                 ring->dev = &adapter->pdev->dev;
1283                 ring->netdev = adapter->netdev;
1284
1285                 /* configure backlink on ring */
1286                 ring->q_vector = q_vector;
1287
1288                 /* update q_vector Rx values */
1289                 igb_add_ring(ring, &q_vector->rx);
1290
1291                 /* set flag indicating ring supports SCTP checksum offload */
1292                 if (adapter->hw.mac.type >= e1000_82576)
1293                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1294
1295                 /* On i350, i354, i210, and i211, loopback VLAN packets
1296                  * have the tag byte-swapped.
1297                  */
1298                 if (adapter->hw.mac.type >= e1000_i350)
1299                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1300
1301                 /* apply Rx specific ring traits */
1302                 ring->count = adapter->rx_ring_count;
1303                 ring->queue_index = rxr_idx;
1304
1305                 u64_stats_init(&ring->rx_syncp);
1306
1307                 /* assign ring to adapter */
1308                 adapter->rx_ring[rxr_idx] = ring;
1309         }
1310
1311         return 0;
1312 }
1313
1314
1315 /**
1316  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1317  *  @adapter: board private structure to initialize
1318  *
1319  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1320  *  return -ENOMEM.
1321  **/
1322 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1323 {
1324         int q_vectors = adapter->num_q_vectors;
1325         int rxr_remaining = adapter->num_rx_queues;
1326         int txr_remaining = adapter->num_tx_queues;
1327         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1328         int err;
1329
1330         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1331                 for (; rxr_remaining; v_idx++) {
1332                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1333                                                  0, 0, 1, rxr_idx);
1334
1335                         if (err)
1336                                 goto err_out;
1337
1338                         /* update counts and index */
1339                         rxr_remaining--;
1340                         rxr_idx++;
1341                 }
1342         }
1343
1344         for (; v_idx < q_vectors; v_idx++) {
1345                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1346                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1347
1348                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1349                                          tqpv, txr_idx, rqpv, rxr_idx);
1350
1351                 if (err)
1352                         goto err_out;
1353
1354                 /* update counts and index */
1355                 rxr_remaining -= rqpv;
1356                 txr_remaining -= tqpv;
1357                 rxr_idx++;
1358                 txr_idx++;
1359         }
1360
1361         return 0;
1362
1363 err_out:
1364         adapter->num_tx_queues = 0;
1365         adapter->num_rx_queues = 0;
1366         adapter->num_q_vectors = 0;
1367
1368         while (v_idx--)
1369                 igb_free_q_vector(adapter, v_idx);
1370
1371         return -ENOMEM;
1372 }
1373
1374 /**
1375  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1376  *  @adapter: board private structure to initialize
1377  *  @msix: boolean value of MSIX capability
1378  *
1379  *  This function initializes the interrupts and allocates all of the queues.
1380  **/
1381 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1382 {
1383         struct pci_dev *pdev = adapter->pdev;
1384         int err;
1385
1386         igb_set_interrupt_capability(adapter, msix);
1387
1388         err = igb_alloc_q_vectors(adapter);
1389         if (err) {
1390                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1391                 goto err_alloc_q_vectors;
1392         }
1393
1394         igb_cache_ring_register(adapter);
1395
1396         return 0;
1397
1398 err_alloc_q_vectors:
1399         igb_reset_interrupt_capability(adapter);
1400         return err;
1401 }
1402
1403 /**
1404  *  igb_request_irq - initialize interrupts
1405  *  @adapter: board private structure to initialize
1406  *
1407  *  Attempts to configure interrupts using the best available
1408  *  capabilities of the hardware and kernel.
1409  **/
1410 static int igb_request_irq(struct igb_adapter *adapter)
1411 {
1412         struct net_device *netdev = adapter->netdev;
1413         struct pci_dev *pdev = adapter->pdev;
1414         int err = 0;
1415
1416         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1417                 err = igb_request_msix(adapter);
1418                 if (!err)
1419                         goto request_done;
1420                 /* fall back to MSI */
1421                 igb_free_all_tx_resources(adapter);
1422                 igb_free_all_rx_resources(adapter);
1423
1424                 igb_clear_interrupt_scheme(adapter);
1425                 err = igb_init_interrupt_scheme(adapter, false);
1426                 if (err)
1427                         goto request_done;
1428
1429                 igb_setup_all_tx_resources(adapter);
1430                 igb_setup_all_rx_resources(adapter);
1431                 igb_configure(adapter);
1432         }
1433
1434         igb_assign_vector(adapter->q_vector[0], 0);
1435
1436         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1437                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1438                                   netdev->name, adapter);
1439                 if (!err)
1440                         goto request_done;
1441
1442                 /* fall back to legacy interrupts */
1443                 igb_reset_interrupt_capability(adapter);
1444                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1445         }
1446
1447         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1448                           netdev->name, adapter);
1449
1450         if (err)
1451                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1452                         err);
1453
1454 request_done:
1455         return err;
1456 }
1457
1458 static void igb_free_irq(struct igb_adapter *adapter)
1459 {
1460         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1461                 int vector = 0, i;
1462
1463                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1464
1465                 for (i = 0; i < adapter->num_q_vectors; i++)
1466                         free_irq(adapter->msix_entries[vector++].vector,
1467                                  adapter->q_vector[i]);
1468         } else {
1469                 free_irq(adapter->pdev->irq, adapter);
1470         }
1471 }
1472
1473 /**
1474  *  igb_irq_disable - Mask off interrupt generation on the NIC
1475  *  @adapter: board private structure
1476  **/
1477 static void igb_irq_disable(struct igb_adapter *adapter)
1478 {
1479         struct e1000_hw *hw = &adapter->hw;
1480
1481         /* we need to be careful when disabling interrupts.  The VFs are also
1482          * mapped into these registers and so clearing the bits can cause
1483          * issues on the VF drivers so we only need to clear what we set
1484          */
1485         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1486                 u32 regval = rd32(E1000_EIAM);
1487
1488                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1489                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1490                 regval = rd32(E1000_EIAC);
1491                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1492         }
1493
1494         wr32(E1000_IAM, 0);
1495         wr32(E1000_IMC, ~0);
1496         wrfl();
1497         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1498                 int i;
1499
1500                 for (i = 0; i < adapter->num_q_vectors; i++)
1501                         synchronize_irq(adapter->msix_entries[i].vector);
1502         } else {
1503                 synchronize_irq(adapter->pdev->irq);
1504         }
1505 }
1506
1507 /**
1508  *  igb_irq_enable - Enable default interrupt generation settings
1509  *  @adapter: board private structure
1510  **/
1511 static void igb_irq_enable(struct igb_adapter *adapter)
1512 {
1513         struct e1000_hw *hw = &adapter->hw;
1514
1515         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1516                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1517                 u32 regval = rd32(E1000_EIAC);
1518
1519                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1520                 regval = rd32(E1000_EIAM);
1521                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1522                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1523                 if (adapter->vfs_allocated_count) {
1524                         wr32(E1000_MBVFIMR, 0xFF);
1525                         ims |= E1000_IMS_VMMB;
1526                 }
1527                 wr32(E1000_IMS, ims);
1528         } else {
1529                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1530                                 E1000_IMS_DRSTA);
1531                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1532                                 E1000_IMS_DRSTA);
1533         }
1534 }
1535
1536 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1537 {
1538         struct e1000_hw *hw = &adapter->hw;
1539         u16 pf_id = adapter->vfs_allocated_count;
1540         u16 vid = adapter->hw.mng_cookie.vlan_id;
1541         u16 old_vid = adapter->mng_vlan_id;
1542
1543         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1544                 /* add VID to filter table */
1545                 igb_vfta_set(hw, vid, pf_id, true, true);
1546                 adapter->mng_vlan_id = vid;
1547         } else {
1548                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1549         }
1550
1551         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1552             (vid != old_vid) &&
1553             !test_bit(old_vid, adapter->active_vlans)) {
1554                 /* remove VID from filter table */
1555                 igb_vfta_set(hw, vid, pf_id, false, true);
1556         }
1557 }
1558
1559 /**
1560  *  igb_release_hw_control - release control of the h/w to f/w
1561  *  @adapter: address of board private structure
1562  *
1563  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1564  *  For ASF and Pass Through versions of f/w this means that the
1565  *  driver is no longer loaded.
1566  **/
1567 static void igb_release_hw_control(struct igb_adapter *adapter)
1568 {
1569         struct e1000_hw *hw = &adapter->hw;
1570         u32 ctrl_ext;
1571
1572         /* Let firmware take over control of h/w */
1573         ctrl_ext = rd32(E1000_CTRL_EXT);
1574         wr32(E1000_CTRL_EXT,
1575                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1576 }
1577
1578 /**
1579  *  igb_get_hw_control - get control of the h/w from f/w
1580  *  @adapter: address of board private structure
1581  *
1582  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1583  *  For ASF and Pass Through versions of f/w this means that
1584  *  the driver is loaded.
1585  **/
1586 static void igb_get_hw_control(struct igb_adapter *adapter)
1587 {
1588         struct e1000_hw *hw = &adapter->hw;
1589         u32 ctrl_ext;
1590
1591         /* Let firmware know the driver has taken over */
1592         ctrl_ext = rd32(E1000_CTRL_EXT);
1593         wr32(E1000_CTRL_EXT,
1594                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1595 }
1596
1597 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1598 {
1599         struct net_device *netdev = adapter->netdev;
1600         struct e1000_hw *hw = &adapter->hw;
1601
1602         WARN_ON(hw->mac.type != e1000_i210);
1603
1604         if (enable)
1605                 adapter->flags |= IGB_FLAG_FQTSS;
1606         else
1607                 adapter->flags &= ~IGB_FLAG_FQTSS;
1608
1609         if (netif_running(netdev))
1610                 schedule_work(&adapter->reset_task);
1611 }
1612
1613 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1614 {
1615         return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1616 }
1617
1618 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1619                                    enum tx_queue_prio prio)
1620 {
1621         u32 val;
1622
1623         WARN_ON(hw->mac.type != e1000_i210);
1624         WARN_ON(queue < 0 || queue > 4);
1625
1626         val = rd32(E1000_I210_TXDCTL(queue));
1627
1628         if (prio == TX_QUEUE_PRIO_HIGH)
1629                 val |= E1000_TXDCTL_PRIORITY;
1630         else
1631                 val &= ~E1000_TXDCTL_PRIORITY;
1632
1633         wr32(E1000_I210_TXDCTL(queue), val);
1634 }
1635
1636 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1637 {
1638         u32 val;
1639
1640         WARN_ON(hw->mac.type != e1000_i210);
1641         WARN_ON(queue < 0 || queue > 1);
1642
1643         val = rd32(E1000_I210_TQAVCC(queue));
1644
1645         if (mode == QUEUE_MODE_STREAM_RESERVATION)
1646                 val |= E1000_TQAVCC_QUEUEMODE;
1647         else
1648                 val &= ~E1000_TQAVCC_QUEUEMODE;
1649
1650         wr32(E1000_I210_TQAVCC(queue), val);
1651 }
1652
1653 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1654 {
1655         int i;
1656
1657         for (i = 0; i < adapter->num_tx_queues; i++) {
1658                 if (adapter->tx_ring[i]->cbs_enable)
1659                         return true;
1660         }
1661
1662         return false;
1663 }
1664
1665 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1666 {
1667         int i;
1668
1669         for (i = 0; i < adapter->num_tx_queues; i++) {
1670                 if (adapter->tx_ring[i]->launchtime_enable)
1671                         return true;
1672         }
1673
1674         return false;
1675 }
1676
1677 /**
1678  *  igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1679  *  @adapter: pointer to adapter struct
1680  *  @queue: queue number
1681  *
1682  *  Configure CBS and Launchtime for a given hardware queue.
1683  *  Parameters are retrieved from the correct Tx ring, so
1684  *  igb_save_cbs_params() and igb_save_txtime_params() should be used
1685  *  for setting those correctly prior to this function being called.
1686  **/
1687 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1688 {
1689         struct net_device *netdev = adapter->netdev;
1690         struct e1000_hw *hw = &adapter->hw;
1691         struct igb_ring *ring;
1692         u32 tqavcc, tqavctrl;
1693         u16 value;
1694
1695         WARN_ON(hw->mac.type != e1000_i210);
1696         WARN_ON(queue < 0 || queue > 1);
1697         ring = adapter->tx_ring[queue];
1698
1699         /* If any of the Qav features is enabled, configure queues as SR and
1700          * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1701          * as SP.
1702          */
1703         if (ring->cbs_enable || ring->launchtime_enable) {
1704                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1705                 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1706         } else {
1707                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1708                 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1709         }
1710
1711         /* If CBS is enabled, set DataTranARB and config its parameters. */
1712         if (ring->cbs_enable || queue == 0) {
1713                 /* i210 does not allow the queue 0 to be in the Strict
1714                  * Priority mode while the Qav mode is enabled, so,
1715                  * instead of disabling strict priority mode, we give
1716                  * queue 0 the maximum of credits possible.
1717                  *
1718                  * See section 8.12.19 of the i210 datasheet, "Note:
1719                  * Queue0 QueueMode must be set to 1b when
1720                  * TransmitMode is set to Qav."
1721                  */
1722                 if (queue == 0 && !ring->cbs_enable) {
1723                         /* max "linkspeed" idleslope in kbps */
1724                         ring->idleslope = 1000000;
1725                         ring->hicredit = ETH_FRAME_LEN;
1726                 }
1727
1728                 /* Always set data transfer arbitration to credit-based
1729                  * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1730                  * the queues.
1731                  */
1732                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1733                 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1734                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1735
1736                 /* According to i210 datasheet section 7.2.7.7, we should set
1737                  * the 'idleSlope' field from TQAVCC register following the
1738                  * equation:
1739                  *
1740                  * For 100 Mbps link speed:
1741                  *
1742                  *     value = BW * 0x7735 * 0.2                          (E1)
1743                  *
1744                  * For 1000Mbps link speed:
1745                  *
1746                  *     value = BW * 0x7735 * 2                            (E2)
1747                  *
1748                  * E1 and E2 can be merged into one equation as shown below.
1749                  * Note that 'link-speed' is in Mbps.
1750                  *
1751                  *     value = BW * 0x7735 * 2 * link-speed
1752                  *                           --------------               (E3)
1753                  *                                1000
1754                  *
1755                  * 'BW' is the percentage bandwidth out of full link speed
1756                  * which can be found with the following equation. Note that
1757                  * idleSlope here is the parameter from this function which
1758                  * is in kbps.
1759                  *
1760                  *     BW =     idleSlope
1761                  *          -----------------                             (E4)
1762                  *          link-speed * 1000
1763                  *
1764                  * That said, we can come up with a generic equation to
1765                  * calculate the value we should set it TQAVCC register by
1766                  * replacing 'BW' in E3 by E4. The resulting equation is:
1767                  *
1768                  * value =     idleSlope     * 0x7735 * 2 * link-speed
1769                  *         -----------------            --------------    (E5)
1770                  *         link-speed * 1000                 1000
1771                  *
1772                  * 'link-speed' is present in both sides of the fraction so
1773                  * it is canceled out. The final equation is the following:
1774                  *
1775                  *     value = idleSlope * 61034
1776                  *             -----------------                          (E6)
1777                  *                  1000000
1778                  *
1779                  * NOTE: For i210, given the above, we can see that idleslope
1780                  *       is represented in 16.38431 kbps units by the value at
1781                  *       the TQAVCC register (1Gbps / 61034), which reduces
1782                  *       the granularity for idleslope increments.
1783                  *       For instance, if you want to configure a 2576kbps
1784                  *       idleslope, the value to be written on the register
1785                  *       would have to be 157.23. If rounded down, you end
1786                  *       up with less bandwidth available than originally
1787                  *       required (~2572 kbps). If rounded up, you end up
1788                  *       with a higher bandwidth (~2589 kbps). Below the
1789                  *       approach we take is to always round up the
1790                  *       calculated value, so the resulting bandwidth might
1791                  *       be slightly higher for some configurations.
1792                  */
1793                 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1794
1795                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1796                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1797                 tqavcc |= value;
1798                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1799
1800                 wr32(E1000_I210_TQAVHC(queue),
1801                      0x80000000 + ring->hicredit * 0x7735);
1802         } else {
1803
1804                 /* Set idleSlope to zero. */
1805                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1806                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1807                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1808
1809                 /* Set hiCredit to zero. */
1810                 wr32(E1000_I210_TQAVHC(queue), 0);
1811
1812                 /* If CBS is not enabled for any queues anymore, then return to
1813                  * the default state of Data Transmission Arbitration on
1814                  * TQAVCTRL.
1815                  */
1816                 if (!is_any_cbs_enabled(adapter)) {
1817                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1818                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1819                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1820                 }
1821         }
1822
1823         /* If LaunchTime is enabled, set DataTranTIM. */
1824         if (ring->launchtime_enable) {
1825                 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1826                  * for any of the SR queues, and configure fetchtime delta.
1827                  * XXX NOTE:
1828                  *     - LaunchTime will be enabled for all SR queues.
1829                  *     - A fixed offset can be added relative to the launch
1830                  *       time of all packets if configured at reg LAUNCH_OS0.
1831                  *       We are keeping it as 0 for now (default value).
1832                  */
1833                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1834                 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1835                        E1000_TQAVCTRL_FETCHTIME_DELTA;
1836                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1837         } else {
1838                 /* If Launchtime is not enabled for any SR queues anymore,
1839                  * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1840                  * effectively disabling Launchtime.
1841                  */
1842                 if (!is_any_txtime_enabled(adapter)) {
1843                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1844                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1845                         tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1846                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1847                 }
1848         }
1849
1850         /* XXX: In i210 controller the sendSlope and loCredit parameters from
1851          * CBS are not configurable by software so we don't do any 'controller
1852          * configuration' in respect to these parameters.
1853          */
1854
1855         netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d idleslope %d sendslope %d hiCredit %d locredit %d\n",
1856                    ring->cbs_enable ? "enabled" : "disabled",
1857                    ring->launchtime_enable ? "enabled" : "disabled",
1858                    queue,
1859                    ring->idleslope, ring->sendslope,
1860                    ring->hicredit, ring->locredit);
1861 }
1862
1863 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1864                                   bool enable)
1865 {
1866         struct igb_ring *ring;
1867
1868         if (queue < 0 || queue > adapter->num_tx_queues)
1869                 return -EINVAL;
1870
1871         ring = adapter->tx_ring[queue];
1872         ring->launchtime_enable = enable;
1873
1874         return 0;
1875 }
1876
1877 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1878                                bool enable, int idleslope, int sendslope,
1879                                int hicredit, int locredit)
1880 {
1881         struct igb_ring *ring;
1882
1883         if (queue < 0 || queue > adapter->num_tx_queues)
1884                 return -EINVAL;
1885
1886         ring = adapter->tx_ring[queue];
1887
1888         ring->cbs_enable = enable;
1889         ring->idleslope = idleslope;
1890         ring->sendslope = sendslope;
1891         ring->hicredit = hicredit;
1892         ring->locredit = locredit;
1893
1894         return 0;
1895 }
1896
1897 /**
1898  *  igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1899  *  @adapter: pointer to adapter struct
1900  *
1901  *  Configure TQAVCTRL register switching the controller's Tx mode
1902  *  if FQTSS mode is enabled or disabled. Additionally, will issue
1903  *  a call to igb_config_tx_modes() per queue so any previously saved
1904  *  Tx parameters are applied.
1905  **/
1906 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1907 {
1908         struct net_device *netdev = adapter->netdev;
1909         struct e1000_hw *hw = &adapter->hw;
1910         u32 val;
1911
1912         /* Only i210 controller supports changing the transmission mode. */
1913         if (hw->mac.type != e1000_i210)
1914                 return;
1915
1916         if (is_fqtss_enabled(adapter)) {
1917                 int i, max_queue;
1918
1919                 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1920                  * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1921                  * so SP queues wait for SR ones.
1922                  */
1923                 val = rd32(E1000_I210_TQAVCTRL);
1924                 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1925                 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1926                 wr32(E1000_I210_TQAVCTRL, val);
1927
1928                 /* Configure Tx and Rx packet buffers sizes as described in
1929                  * i210 datasheet section 7.2.7.7.
1930                  */
1931                 val = rd32(E1000_TXPBS);
1932                 val &= ~I210_TXPBSIZE_MASK;
1933                 val |= I210_TXPBSIZE_PB0_6KB | I210_TXPBSIZE_PB1_6KB |
1934                         I210_TXPBSIZE_PB2_6KB | I210_TXPBSIZE_PB3_6KB;
1935                 wr32(E1000_TXPBS, val);
1936
1937                 val = rd32(E1000_RXPBS);
1938                 val &= ~I210_RXPBSIZE_MASK;
1939                 val |= I210_RXPBSIZE_PB_30KB;
1940                 wr32(E1000_RXPBS, val);
1941
1942                 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1943                  * register should not exceed the buffer size programmed in
1944                  * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1945                  * so according to the datasheet we should set MAX_TPKT_SIZE to
1946                  * 4kB / 64.
1947                  *
1948                  * However, when we do so, no frame from queue 2 and 3 are
1949                  * transmitted.  It seems the MAX_TPKT_SIZE should not be great
1950                  * or _equal_ to the buffer size programmed in TXPBS. For this
1951                  * reason, we set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1952                  */
1953                 val = (4096 - 1) / 64;
1954                 wr32(E1000_I210_DTXMXPKTSZ, val);
1955
1956                 /* Since FQTSS mode is enabled, apply any CBS configuration
1957                  * previously set. If no previous CBS configuration has been
1958                  * done, then the initial configuration is applied, which means
1959                  * CBS is disabled.
1960                  */
1961                 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1962                             adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1963
1964                 for (i = 0; i < max_queue; i++) {
1965                         igb_config_tx_modes(adapter, i);
1966                 }
1967         } else {
1968                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1969                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1970                 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1971
1972                 val = rd32(E1000_I210_TQAVCTRL);
1973                 /* According to Section 8.12.21, the other flags we've set when
1974                  * enabling FQTSS are not relevant when disabling FQTSS so we
1975                  * don't set they here.
1976                  */
1977                 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1978                 wr32(E1000_I210_TQAVCTRL, val);
1979         }
1980
1981         netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1982                    "enabled" : "disabled");
1983 }
1984
1985 /**
1986  *  igb_configure - configure the hardware for RX and TX
1987  *  @adapter: private board structure
1988  **/
1989 static void igb_configure(struct igb_adapter *adapter)
1990 {
1991         struct net_device *netdev = adapter->netdev;
1992         int i;
1993
1994         igb_get_hw_control(adapter);
1995         igb_set_rx_mode(netdev);
1996         igb_setup_tx_mode(adapter);
1997
1998         igb_restore_vlan(adapter);
1999
2000         igb_setup_tctl(adapter);
2001         igb_setup_mrqc(adapter);
2002         igb_setup_rctl(adapter);
2003
2004         igb_nfc_filter_restore(adapter);
2005         igb_configure_tx(adapter);
2006         igb_configure_rx(adapter);
2007
2008         igb_rx_fifo_flush_82575(&adapter->hw);
2009
2010         /* call igb_desc_unused which always leaves
2011          * at least 1 descriptor unused to make sure
2012          * next_to_use != next_to_clean
2013          */
2014         for (i = 0; i < adapter->num_rx_queues; i++) {
2015                 struct igb_ring *ring = adapter->rx_ring[i];
2016                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2017         }
2018 }
2019
2020 /**
2021  *  igb_power_up_link - Power up the phy/serdes link
2022  *  @adapter: address of board private structure
2023  **/
2024 void igb_power_up_link(struct igb_adapter *adapter)
2025 {
2026         igb_reset_phy(&adapter->hw);
2027
2028         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2029                 igb_power_up_phy_copper(&adapter->hw);
2030         else
2031                 igb_power_up_serdes_link_82575(&adapter->hw);
2032
2033         igb_setup_link(&adapter->hw);
2034 }
2035
2036 /**
2037  *  igb_power_down_link - Power down the phy/serdes link
2038  *  @adapter: address of board private structure
2039  */
2040 static void igb_power_down_link(struct igb_adapter *adapter)
2041 {
2042         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2043                 igb_power_down_phy_copper_82575(&adapter->hw);
2044         else
2045                 igb_shutdown_serdes_link_82575(&adapter->hw);
2046 }
2047
2048 /**
2049  * igb_check_swap_media -  Detect and switch function for Media Auto Sense
2050  * @adapter: address of the board private structure
2051  **/
2052 static void igb_check_swap_media(struct igb_adapter *adapter)
2053 {
2054         struct e1000_hw *hw = &adapter->hw;
2055         u32 ctrl_ext, connsw;
2056         bool swap_now = false;
2057
2058         ctrl_ext = rd32(E1000_CTRL_EXT);
2059         connsw = rd32(E1000_CONNSW);
2060
2061         /* need to live swap if current media is copper and we have fiber/serdes
2062          * to go to.
2063          */
2064
2065         if ((hw->phy.media_type == e1000_media_type_copper) &&
2066             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2067                 swap_now = true;
2068         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
2069                    !(connsw & E1000_CONNSW_SERDESD)) {
2070                 /* copper signal takes time to appear */
2071                 if (adapter->copper_tries < 4) {
2072                         adapter->copper_tries++;
2073                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2074                         wr32(E1000_CONNSW, connsw);
2075                         return;
2076                 } else {
2077                         adapter->copper_tries = 0;
2078                         if ((connsw & E1000_CONNSW_PHYSD) &&
2079                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
2080                                 swap_now = true;
2081                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2082                                 wr32(E1000_CONNSW, connsw);
2083                         }
2084                 }
2085         }
2086
2087         if (!swap_now)
2088                 return;
2089
2090         switch (hw->phy.media_type) {
2091         case e1000_media_type_copper:
2092                 netdev_info(adapter->netdev,
2093                         "MAS: changing media to fiber/serdes\n");
2094                 ctrl_ext |=
2095                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2096                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2097                 adapter->copper_tries = 0;
2098                 break;
2099         case e1000_media_type_internal_serdes:
2100         case e1000_media_type_fiber:
2101                 netdev_info(adapter->netdev,
2102                         "MAS: changing media to copper\n");
2103                 ctrl_ext &=
2104                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2105                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2106                 break;
2107         default:
2108                 /* shouldn't get here during regular operation */
2109                 netdev_err(adapter->netdev,
2110                         "AMS: Invalid media type found, returning\n");
2111                 break;
2112         }
2113         wr32(E1000_CTRL_EXT, ctrl_ext);
2114 }
2115
2116 /**
2117  *  igb_up - Open the interface and prepare it to handle traffic
2118  *  @adapter: board private structure
2119  **/
2120 int igb_up(struct igb_adapter *adapter)
2121 {
2122         struct e1000_hw *hw = &adapter->hw;
2123         int i;
2124
2125         /* hardware has been reset, we need to reload some things */
2126         igb_configure(adapter);
2127
2128         clear_bit(__IGB_DOWN, &adapter->state);
2129
2130         for (i = 0; i < adapter->num_q_vectors; i++)
2131                 napi_enable(&(adapter->q_vector[i]->napi));
2132
2133         if (adapter->flags & IGB_FLAG_HAS_MSIX)
2134                 igb_configure_msix(adapter);
2135         else
2136                 igb_assign_vector(adapter->q_vector[0], 0);
2137
2138         /* Clear any pending interrupts. */
2139         rd32(E1000_TSICR);
2140         rd32(E1000_ICR);
2141         igb_irq_enable(adapter);
2142
2143         /* notify VFs that reset has been completed */
2144         if (adapter->vfs_allocated_count) {
2145                 u32 reg_data = rd32(E1000_CTRL_EXT);
2146
2147                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2148                 wr32(E1000_CTRL_EXT, reg_data);
2149         }
2150
2151         netif_tx_start_all_queues(adapter->netdev);
2152
2153         /* start the watchdog. */
2154         hw->mac.get_link_status = 1;
2155         schedule_work(&adapter->watchdog_task);
2156
2157         if ((adapter->flags & IGB_FLAG_EEE) &&
2158             (!hw->dev_spec._82575.eee_disable))
2159                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2160
2161         return 0;
2162 }
2163
2164 void igb_down(struct igb_adapter *adapter)
2165 {
2166         struct net_device *netdev = adapter->netdev;
2167         struct e1000_hw *hw = &adapter->hw;
2168         u32 tctl, rctl;
2169         int i;
2170
2171         /* signal that we're down so the interrupt handler does not
2172          * reschedule our watchdog timer
2173          */
2174         set_bit(__IGB_DOWN, &adapter->state);
2175
2176         /* disable receives in the hardware */
2177         rctl = rd32(E1000_RCTL);
2178         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2179         /* flush and sleep below */
2180
2181         igb_nfc_filter_exit(adapter);
2182
2183         netif_carrier_off(netdev);
2184         netif_tx_stop_all_queues(netdev);
2185
2186         /* disable transmits in the hardware */
2187         tctl = rd32(E1000_TCTL);
2188         tctl &= ~E1000_TCTL_EN;
2189         wr32(E1000_TCTL, tctl);
2190         /* flush both disables and wait for them to finish */
2191         wrfl();
2192         usleep_range(10000, 11000);
2193
2194         igb_irq_disable(adapter);
2195
2196         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2197
2198         for (i = 0; i < adapter->num_q_vectors; i++) {
2199                 if (adapter->q_vector[i]) {
2200                         napi_synchronize(&adapter->q_vector[i]->napi);
2201                         napi_disable(&adapter->q_vector[i]->napi);
2202                 }
2203         }
2204
2205         del_timer_sync(&adapter->watchdog_timer);
2206         del_timer_sync(&adapter->phy_info_timer);
2207
2208         /* record the stats before reset*/
2209         spin_lock(&adapter->stats64_lock);
2210         igb_update_stats(adapter);
2211         spin_unlock(&adapter->stats64_lock);
2212
2213         adapter->link_speed = 0;
2214         adapter->link_duplex = 0;
2215
2216         if (!pci_channel_offline(adapter->pdev))
2217                 igb_reset(adapter);
2218
2219         /* clear VLAN promisc flag so VFTA will be updated if necessary */
2220         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2221
2222         igb_clean_all_tx_rings(adapter);
2223         igb_clean_all_rx_rings(adapter);
2224 #ifdef CONFIG_IGB_DCA
2225
2226         /* since we reset the hardware DCA settings were cleared */
2227         igb_setup_dca(adapter);
2228 #endif
2229 }
2230
2231 void igb_reinit_locked(struct igb_adapter *adapter)
2232 {
2233         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2234                 usleep_range(1000, 2000);
2235         igb_down(adapter);
2236         igb_up(adapter);
2237         clear_bit(__IGB_RESETTING, &adapter->state);
2238 }
2239
2240 /** igb_enable_mas - Media Autosense re-enable after swap
2241  *
2242  * @adapter: adapter struct
2243  **/
2244 static void igb_enable_mas(struct igb_adapter *adapter)
2245 {
2246         struct e1000_hw *hw = &adapter->hw;
2247         u32 connsw = rd32(E1000_CONNSW);
2248
2249         /* configure for SerDes media detect */
2250         if ((hw->phy.media_type == e1000_media_type_copper) &&
2251             (!(connsw & E1000_CONNSW_SERDESD))) {
2252                 connsw |= E1000_CONNSW_ENRGSRC;
2253                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2254                 wr32(E1000_CONNSW, connsw);
2255                 wrfl();
2256         }
2257 }
2258
2259 void igb_reset(struct igb_adapter *adapter)
2260 {
2261         struct pci_dev *pdev = adapter->pdev;
2262         struct e1000_hw *hw = &adapter->hw;
2263         struct e1000_mac_info *mac = &hw->mac;
2264         struct e1000_fc_info *fc = &hw->fc;
2265         u32 pba, hwm;
2266
2267         /* Repartition Pba for greater than 9k mtu
2268          * To take effect CTRL.RST is required.
2269          */
2270         switch (mac->type) {
2271         case e1000_i350:
2272         case e1000_i354:
2273         case e1000_82580:
2274                 pba = rd32(E1000_RXPBS);
2275                 pba = igb_rxpbs_adjust_82580(pba);
2276                 break;
2277         case e1000_82576:
2278                 pba = rd32(E1000_RXPBS);
2279                 pba &= E1000_RXPBS_SIZE_MASK_82576;
2280                 break;
2281         case e1000_82575:
2282         case e1000_i210:
2283         case e1000_i211:
2284         default:
2285                 pba = E1000_PBA_34K;
2286                 break;
2287         }
2288
2289         if (mac->type == e1000_82575) {
2290                 u32 min_rx_space, min_tx_space, needed_tx_space;
2291
2292                 /* write Rx PBA so that hardware can report correct Tx PBA */
2293                 wr32(E1000_PBA, pba);
2294
2295                 /* To maintain wire speed transmits, the Tx FIFO should be
2296                  * large enough to accommodate two full transmit packets,
2297                  * rounded up to the next 1KB and expressed in KB.  Likewise,
2298                  * the Rx FIFO should be large enough to accommodate at least
2299                  * one full receive packet and is similarly rounded up and
2300                  * expressed in KB.
2301                  */
2302                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2303
2304                 /* The Tx FIFO also stores 16 bytes of information about the Tx
2305                  * but don't include Ethernet FCS because hardware appends it.
2306                  * We only need to round down to the nearest 512 byte block
2307                  * count since the value we care about is 2 frames, not 1.
2308                  */
2309                 min_tx_space = adapter->max_frame_size;
2310                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2311                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2312
2313                 /* upper 16 bits has Tx packet buffer allocation size in KB */
2314                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2315
2316                 /* If current Tx allocation is less than the min Tx FIFO size,
2317                  * and the min Tx FIFO size is less than the current Rx FIFO
2318                  * allocation, take space away from current Rx allocation.
2319                  */
2320                 if (needed_tx_space < pba) {
2321                         pba -= needed_tx_space;
2322
2323                         /* if short on Rx space, Rx wins and must trump Tx
2324                          * adjustment
2325                          */
2326                         if (pba < min_rx_space)
2327                                 pba = min_rx_space;
2328                 }
2329
2330                 /* adjust PBA for jumbo frames */
2331                 wr32(E1000_PBA, pba);
2332         }
2333
2334         /* flow control settings
2335          * The high water mark must be low enough to fit one full frame
2336          * after transmitting the pause frame.  As such we must have enough
2337          * space to allow for us to complete our current transmit and then
2338          * receive the frame that is in progress from the link partner.
2339          * Set it to:
2340          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2341          */
2342         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2343
2344         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
2345         fc->low_water = fc->high_water - 16;
2346         fc->pause_time = 0xFFFF;
2347         fc->send_xon = 1;
2348         fc->current_mode = fc->requested_mode;
2349
2350         /* disable receive for all VFs and wait one second */
2351         if (adapter->vfs_allocated_count) {
2352                 int i;
2353
2354                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2355                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2356
2357                 /* ping all the active vfs to let them know we are going down */
2358                 igb_ping_all_vfs(adapter);
2359
2360                 /* disable transmits and receives */
2361                 wr32(E1000_VFRE, 0);
2362                 wr32(E1000_VFTE, 0);
2363         }
2364
2365         /* Allow time for pending master requests to run */
2366         hw->mac.ops.reset_hw(hw);
2367         wr32(E1000_WUC, 0);
2368
2369         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2370                 /* need to resetup here after media swap */
2371                 adapter->ei.get_invariants(hw);
2372                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2373         }
2374         if ((mac->type == e1000_82575 || mac->type == e1000_i350) &&
2375             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2376                 igb_enable_mas(adapter);
2377         }
2378         if (hw->mac.ops.init_hw(hw))
2379                 dev_err(&pdev->dev, "Hardware Error\n");
2380
2381         /* RAR registers were cleared during init_hw, clear mac table */
2382         igb_flush_mac_table(adapter);
2383         __dev_uc_unsync(adapter->netdev, NULL);
2384
2385         /* Recover default RAR entry */
2386         igb_set_default_mac_filter(adapter);
2387
2388         /* Flow control settings reset on hardware reset, so guarantee flow
2389          * control is off when forcing speed.
2390          */
2391         if (!hw->mac.autoneg)
2392                 igb_force_mac_fc(hw);
2393
2394         igb_init_dmac(adapter, pba);
2395 #ifdef CONFIG_IGB_HWMON
2396         /* Re-initialize the thermal sensor on i350 devices. */
2397         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2398                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2399                         /* If present, re-initialize the external thermal sensor
2400                          * interface.
2401                          */
2402                         if (adapter->ets)
2403                                 mac->ops.init_thermal_sensor_thresh(hw);
2404                 }
2405         }
2406 #endif
2407         /* Re-establish EEE setting */
2408         if (hw->phy.media_type == e1000_media_type_copper) {
2409                 switch (mac->type) {
2410                 case e1000_i350:
2411                 case e1000_i210:
2412                 case e1000_i211:
2413                         igb_set_eee_i350(hw, true, true);
2414                         break;
2415                 case e1000_i354:
2416                         igb_set_eee_i354(hw, true, true);
2417                         break;
2418                 default:
2419                         break;
2420                 }
2421         }
2422         if (!netif_running(adapter->netdev))
2423                 igb_power_down_link(adapter);
2424
2425         igb_update_mng_vlan(adapter);
2426
2427         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2428         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2429
2430         /* Re-enable PTP, where applicable. */
2431         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2432                 igb_ptp_reset(adapter);
2433
2434         igb_get_phy_info(hw);
2435 }
2436
2437 static netdev_features_t igb_fix_features(struct net_device *netdev,
2438         netdev_features_t features)
2439 {
2440         /* Since there is no support for separate Rx/Tx vlan accel
2441          * enable/disable make sure Tx flag is always in same state as Rx.
2442          */
2443         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2444                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2445         else
2446                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2447
2448         return features;
2449 }
2450
2451 static int igb_set_features(struct net_device *netdev,
2452         netdev_features_t features)
2453 {
2454         netdev_features_t changed = netdev->features ^ features;
2455         struct igb_adapter *adapter = netdev_priv(netdev);
2456
2457         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2458                 igb_vlan_mode(netdev, features);
2459
2460         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2461                 return 0;
2462
2463         if (!(features & NETIF_F_NTUPLE)) {
2464                 struct hlist_node *node2;
2465                 struct igb_nfc_filter *rule;
2466
2467                 spin_lock(&adapter->nfc_lock);
2468                 hlist_for_each_entry_safe(rule, node2,
2469                                           &adapter->nfc_filter_list, nfc_node) {
2470                         igb_erase_filter(adapter, rule);
2471                         hlist_del(&rule->nfc_node);
2472                         kfree(rule);
2473                 }
2474                 spin_unlock(&adapter->nfc_lock);
2475                 adapter->nfc_filter_count = 0;
2476         }
2477
2478         netdev->features = features;
2479
2480         if (netif_running(netdev))
2481                 igb_reinit_locked(adapter);
2482         else
2483                 igb_reset(adapter);
2484
2485         return 1;
2486 }
2487
2488 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2489                            struct net_device *dev,
2490                            const unsigned char *addr, u16 vid,
2491                            u16 flags,
2492                            struct netlink_ext_ack *extack)
2493 {
2494         /* guarantee we can provide a unique filter for the unicast address */
2495         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2496                 struct igb_adapter *adapter = netdev_priv(dev);
2497                 int vfn = adapter->vfs_allocated_count;
2498
2499                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2500                         return -ENOMEM;
2501         }
2502
2503         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2504 }
2505
2506 #define IGB_MAX_MAC_HDR_LEN     127
2507 #define IGB_MAX_NETWORK_HDR_LEN 511
2508
2509 static netdev_features_t
2510 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2511                    netdev_features_t features)
2512 {
2513         unsigned int network_hdr_len, mac_hdr_len;
2514
2515         /* Make certain the headers can be described by a context descriptor */
2516         mac_hdr_len = skb_network_header(skb) - skb->data;
2517         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2518                 return features & ~(NETIF_F_HW_CSUM |
2519                                     NETIF_F_SCTP_CRC |
2520                                     NETIF_F_GSO_UDP_L4 |
2521                                     NETIF_F_HW_VLAN_CTAG_TX |
2522                                     NETIF_F_TSO |
2523                                     NETIF_F_TSO6);
2524
2525         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2526         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2527                 return features & ~(NETIF_F_HW_CSUM |
2528                                     NETIF_F_SCTP_CRC |
2529                                     NETIF_F_GSO_UDP_L4 |
2530                                     NETIF_F_TSO |
2531                                     NETIF_F_TSO6);
2532
2533         /* We can only support IPV4 TSO in tunnels if we can mangle the
2534          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2535          */
2536         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2537                 features &= ~NETIF_F_TSO;
2538
2539         return features;
2540 }
2541
2542 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2543 {
2544         if (!is_fqtss_enabled(adapter)) {
2545                 enable_fqtss(adapter, true);
2546                 return;
2547         }
2548
2549         igb_config_tx_modes(adapter, queue);
2550
2551         if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2552                 enable_fqtss(adapter, false);
2553 }
2554
2555 static int igb_offload_cbs(struct igb_adapter *adapter,
2556                            struct tc_cbs_qopt_offload *qopt)
2557 {
2558         struct e1000_hw *hw = &adapter->hw;
2559         int err;
2560
2561         /* CBS offloading is only supported by i210 controller. */
2562         if (hw->mac.type != e1000_i210)
2563                 return -EOPNOTSUPP;
2564
2565         /* CBS offloading is only supported by queue 0 and queue 1. */
2566         if (qopt->queue < 0 || qopt->queue > 1)
2567                 return -EINVAL;
2568
2569         err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2570                                   qopt->idleslope, qopt->sendslope,
2571                                   qopt->hicredit, qopt->locredit);
2572         if (err)
2573                 return err;
2574
2575         igb_offload_apply(adapter, qopt->queue);
2576
2577         return 0;
2578 }
2579
2580 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2581 #define VLAN_PRIO_FULL_MASK (0x07)
2582
2583 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2584                                 struct flow_cls_offload *f,
2585                                 int traffic_class,
2586                                 struct igb_nfc_filter *input)
2587 {
2588         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2589         struct flow_dissector *dissector = rule->match.dissector;
2590         struct netlink_ext_ack *extack = f->common.extack;
2591
2592         if (dissector->used_keys &
2593             ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
2594               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2595               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2596               BIT(FLOW_DISSECTOR_KEY_VLAN))) {
2597                 NL_SET_ERR_MSG_MOD(extack,
2598                                    "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2599                 return -EOPNOTSUPP;
2600         }
2601
2602         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2603                 struct flow_match_eth_addrs match;
2604
2605                 flow_rule_match_eth_addrs(rule, &match);
2606                 if (!is_zero_ether_addr(match.mask->dst)) {
2607                         if (!is_broadcast_ether_addr(match.mask->dst)) {
2608                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2609                                 return -EINVAL;
2610                         }
2611
2612                         input->filter.match_flags |=
2613                                 IGB_FILTER_FLAG_DST_MAC_ADDR;
2614                         ether_addr_copy(input->filter.dst_addr, match.key->dst);
2615                 }
2616
2617                 if (!is_zero_ether_addr(match.mask->src)) {
2618                         if (!is_broadcast_ether_addr(match.mask->src)) {
2619                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2620                                 return -EINVAL;
2621                         }
2622
2623                         input->filter.match_flags |=
2624                                 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2625                         ether_addr_copy(input->filter.src_addr, match.key->src);
2626                 }
2627         }
2628
2629         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2630                 struct flow_match_basic match;
2631
2632                 flow_rule_match_basic(rule, &match);
2633                 if (match.mask->n_proto) {
2634                         if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) {
2635                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2636                                 return -EINVAL;
2637                         }
2638
2639                         input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2640                         input->filter.etype = match.key->n_proto;
2641                 }
2642         }
2643
2644         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
2645                 struct flow_match_vlan match;
2646
2647                 flow_rule_match_vlan(rule, &match);
2648                 if (match.mask->vlan_priority) {
2649                         if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2650                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2651                                 return -EINVAL;
2652                         }
2653
2654                         input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2655                         input->filter.vlan_tci =
2656                                 (__force __be16)match.key->vlan_priority;
2657                 }
2658         }
2659
2660         input->action = traffic_class;
2661         input->cookie = f->cookie;
2662
2663         return 0;
2664 }
2665
2666 static int igb_configure_clsflower(struct igb_adapter *adapter,
2667                                    struct flow_cls_offload *cls_flower)
2668 {
2669         struct netlink_ext_ack *extack = cls_flower->common.extack;
2670         struct igb_nfc_filter *filter, *f;
2671         int err, tc;
2672
2673         tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2674         if (tc < 0) {
2675                 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2676                 return -EINVAL;
2677         }
2678
2679         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2680         if (!filter)
2681                 return -ENOMEM;
2682
2683         err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2684         if (err < 0)
2685                 goto err_parse;
2686
2687         spin_lock(&adapter->nfc_lock);
2688
2689         hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2690                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2691                         err = -EEXIST;
2692                         NL_SET_ERR_MSG_MOD(extack,
2693                                            "This filter is already set in ethtool");
2694                         goto err_locked;
2695                 }
2696         }
2697
2698         hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2699                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2700                         err = -EEXIST;
2701                         NL_SET_ERR_MSG_MOD(extack,
2702                                            "This filter is already set in cls_flower");
2703                         goto err_locked;
2704                 }
2705         }
2706
2707         err = igb_add_filter(adapter, filter);
2708         if (err < 0) {
2709                 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2710                 goto err_locked;
2711         }
2712
2713         hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2714
2715         spin_unlock(&adapter->nfc_lock);
2716
2717         return 0;
2718
2719 err_locked:
2720         spin_unlock(&adapter->nfc_lock);
2721
2722 err_parse:
2723         kfree(filter);
2724
2725         return err;
2726 }
2727
2728 static int igb_delete_clsflower(struct igb_adapter *adapter,
2729                                 struct flow_cls_offload *cls_flower)
2730 {
2731         struct igb_nfc_filter *filter;
2732         int err;
2733
2734         spin_lock(&adapter->nfc_lock);
2735
2736         hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2737                 if (filter->cookie == cls_flower->cookie)
2738                         break;
2739
2740         if (!filter) {
2741                 err = -ENOENT;
2742                 goto out;
2743         }
2744
2745         err = igb_erase_filter(adapter, filter);
2746         if (err < 0)
2747                 goto out;
2748
2749         hlist_del(&filter->nfc_node);
2750         kfree(filter);
2751
2752 out:
2753         spin_unlock(&adapter->nfc_lock);
2754
2755         return err;
2756 }
2757
2758 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2759                                    struct flow_cls_offload *cls_flower)
2760 {
2761         switch (cls_flower->command) {
2762         case FLOW_CLS_REPLACE:
2763                 return igb_configure_clsflower(adapter, cls_flower);
2764         case FLOW_CLS_DESTROY:
2765                 return igb_delete_clsflower(adapter, cls_flower);
2766         case FLOW_CLS_STATS:
2767                 return -EOPNOTSUPP;
2768         default:
2769                 return -EOPNOTSUPP;
2770         }
2771 }
2772
2773 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2774                                  void *cb_priv)
2775 {
2776         struct igb_adapter *adapter = cb_priv;
2777
2778         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2779                 return -EOPNOTSUPP;
2780
2781         switch (type) {
2782         case TC_SETUP_CLSFLOWER:
2783                 return igb_setup_tc_cls_flower(adapter, type_data);
2784
2785         default:
2786                 return -EOPNOTSUPP;
2787         }
2788 }
2789
2790 static int igb_offload_txtime(struct igb_adapter *adapter,
2791                               struct tc_etf_qopt_offload *qopt)
2792 {
2793         struct e1000_hw *hw = &adapter->hw;
2794         int err;
2795
2796         /* Launchtime offloading is only supported by i210 controller. */
2797         if (hw->mac.type != e1000_i210)
2798                 return -EOPNOTSUPP;
2799
2800         /* Launchtime offloading is only supported by queues 0 and 1. */
2801         if (qopt->queue < 0 || qopt->queue > 1)
2802                 return -EINVAL;
2803
2804         err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2805         if (err)
2806                 return err;
2807
2808         igb_offload_apply(adapter, qopt->queue);
2809
2810         return 0;
2811 }
2812
2813 static LIST_HEAD(igb_block_cb_list);
2814
2815 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2816                         void *type_data)
2817 {
2818         struct igb_adapter *adapter = netdev_priv(dev);
2819
2820         switch (type) {
2821         case TC_SETUP_QDISC_CBS:
2822                 return igb_offload_cbs(adapter, type_data);
2823         case TC_SETUP_BLOCK:
2824                 return flow_block_cb_setup_simple(type_data,
2825                                                   &igb_block_cb_list,
2826                                                   igb_setup_tc_block_cb,
2827                                                   adapter, adapter, true);
2828
2829         case TC_SETUP_QDISC_ETF:
2830                 return igb_offload_txtime(adapter, type_data);
2831
2832         default:
2833                 return -EOPNOTSUPP;
2834         }
2835 }
2836
2837 static int igb_xdp_setup(struct net_device *dev, struct netdev_bpf *bpf)
2838 {
2839         int i, frame_size = dev->mtu + IGB_ETH_PKT_HDR_PAD;
2840         struct igb_adapter *adapter = netdev_priv(dev);
2841         struct bpf_prog *prog = bpf->prog, *old_prog;
2842         bool running = netif_running(dev);
2843         bool need_reset;
2844
2845         /* verify igb ring attributes are sufficient for XDP */
2846         for (i = 0; i < adapter->num_rx_queues; i++) {
2847                 struct igb_ring *ring = adapter->rx_ring[i];
2848
2849                 if (frame_size > igb_rx_bufsz(ring)) {
2850                         NL_SET_ERR_MSG_MOD(bpf->extack,
2851                                            "The RX buffer size is too small for the frame size");
2852                         netdev_warn(dev, "XDP RX buffer size %d is too small for the frame size %d\n",
2853                                     igb_rx_bufsz(ring), frame_size);
2854                         return -EINVAL;
2855                 }
2856         }
2857
2858         old_prog = xchg(&adapter->xdp_prog, prog);
2859         need_reset = (!!prog != !!old_prog);
2860
2861         /* device is up and bpf is added/removed, must setup the RX queues */
2862         if (need_reset && running) {
2863                 igb_close(dev);
2864         } else {
2865                 for (i = 0; i < adapter->num_rx_queues; i++)
2866                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
2867                             adapter->xdp_prog);
2868         }
2869
2870         if (old_prog)
2871                 bpf_prog_put(old_prog);
2872
2873         /* bpf is just replaced, RXQ and MTU are already setup */
2874         if (!need_reset)
2875                 return 0;
2876
2877         if (running)
2878                 igb_open(dev);
2879
2880         return 0;
2881 }
2882
2883 static int igb_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2884 {
2885         switch (xdp->command) {
2886         case XDP_SETUP_PROG:
2887                 return igb_xdp_setup(dev, xdp);
2888         default:
2889                 return -EINVAL;
2890         }
2891 }
2892
2893 static void igb_xdp_ring_update_tail(struct igb_ring *ring)
2894 {
2895         /* Force memory writes to complete before letting h/w know there
2896          * are new descriptors to fetch.
2897          */
2898         wmb();
2899         writel(ring->next_to_use, ring->tail);
2900 }
2901
2902 static struct igb_ring *igb_xdp_tx_queue_mapping(struct igb_adapter *adapter)
2903 {
2904         unsigned int r_idx = smp_processor_id();
2905
2906         if (r_idx >= adapter->num_tx_queues)
2907                 r_idx = r_idx % adapter->num_tx_queues;
2908
2909         return adapter->tx_ring[r_idx];
2910 }
2911
2912 static int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)
2913 {
2914         struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
2915         int cpu = smp_processor_id();
2916         struct igb_ring *tx_ring;
2917         struct netdev_queue *nq;
2918         u32 ret;
2919
2920         if (unlikely(!xdpf))
2921                 return IGB_XDP_CONSUMED;
2922
2923         /* During program transitions its possible adapter->xdp_prog is assigned
2924          * but ring has not been configured yet. In this case simply abort xmit.
2925          */
2926         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2927         if (unlikely(!tx_ring))
2928                 return IGB_XDP_CONSUMED;
2929
2930         nq = txring_txq(tx_ring);
2931         __netif_tx_lock(nq, cpu);
2932         /* Avoid transmit queue timeout since we share it with the slow path */
2933         txq_trans_cond_update(nq);
2934         ret = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2935         __netif_tx_unlock(nq);
2936
2937         return ret;
2938 }
2939
2940 static int igb_xdp_xmit(struct net_device *dev, int n,
2941                         struct xdp_frame **frames, u32 flags)
2942 {
2943         struct igb_adapter *adapter = netdev_priv(dev);
2944         int cpu = smp_processor_id();
2945         struct igb_ring *tx_ring;
2946         struct netdev_queue *nq;
2947         int nxmit = 0;
2948         int i;
2949
2950         if (unlikely(test_bit(__IGB_DOWN, &adapter->state)))
2951                 return -ENETDOWN;
2952
2953         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
2954                 return -EINVAL;
2955
2956         /* During program transitions its possible adapter->xdp_prog is assigned
2957          * but ring has not been configured yet. In this case simply abort xmit.
2958          */
2959         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2960         if (unlikely(!tx_ring))
2961                 return -ENXIO;
2962
2963         nq = txring_txq(tx_ring);
2964         __netif_tx_lock(nq, cpu);
2965
2966         /* Avoid transmit queue timeout since we share it with the slow path */
2967         txq_trans_cond_update(nq);
2968
2969         for (i = 0; i < n; i++) {
2970                 struct xdp_frame *xdpf = frames[i];
2971                 int err;
2972
2973                 err = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2974                 if (err != IGB_XDP_TX)
2975                         break;
2976                 nxmit++;
2977         }
2978
2979         __netif_tx_unlock(nq);
2980
2981         if (unlikely(flags & XDP_XMIT_FLUSH))
2982                 igb_xdp_ring_update_tail(tx_ring);
2983
2984         return nxmit;
2985 }
2986
2987 static const struct net_device_ops igb_netdev_ops = {
2988         .ndo_open               = igb_open,
2989         .ndo_stop               = igb_close,
2990         .ndo_start_xmit         = igb_xmit_frame,
2991         .ndo_get_stats64        = igb_get_stats64,
2992         .ndo_set_rx_mode        = igb_set_rx_mode,
2993         .ndo_set_mac_address    = igb_set_mac,
2994         .ndo_change_mtu         = igb_change_mtu,
2995         .ndo_eth_ioctl          = igb_ioctl,
2996         .ndo_tx_timeout         = igb_tx_timeout,
2997         .ndo_validate_addr      = eth_validate_addr,
2998         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2999         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
3000         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
3001         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
3002         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
3003         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
3004         .ndo_set_vf_trust       = igb_ndo_set_vf_trust,
3005         .ndo_get_vf_config      = igb_ndo_get_vf_config,
3006         .ndo_fix_features       = igb_fix_features,
3007         .ndo_set_features       = igb_set_features,
3008         .ndo_fdb_add            = igb_ndo_fdb_add,
3009         .ndo_features_check     = igb_features_check,
3010         .ndo_setup_tc           = igb_setup_tc,
3011         .ndo_bpf                = igb_xdp,
3012         .ndo_xdp_xmit           = igb_xdp_xmit,
3013 };
3014
3015 /**
3016  * igb_set_fw_version - Configure version string for ethtool
3017  * @adapter: adapter struct
3018  **/
3019 void igb_set_fw_version(struct igb_adapter *adapter)
3020 {
3021         struct e1000_hw *hw = &adapter->hw;
3022         struct e1000_fw_version fw;
3023
3024         igb_get_fw_version(hw, &fw);
3025
3026         switch (hw->mac.type) {
3027         case e1000_i210:
3028         case e1000_i211:
3029                 if (!(igb_get_flash_presence_i210(hw))) {
3030                         snprintf(adapter->fw_version,
3031                                  sizeof(adapter->fw_version),
3032                                  "%2d.%2d-%d",
3033                                  fw.invm_major, fw.invm_minor,
3034                                  fw.invm_img_type);
3035                         break;
3036                 }
3037                 fallthrough;
3038         default:
3039                 /* if option is rom valid, display its version too */
3040                 if (fw.or_valid) {
3041                         snprintf(adapter->fw_version,
3042                                  sizeof(adapter->fw_version),
3043                                  "%d.%d, 0x%08x, %d.%d.%d",
3044                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
3045                                  fw.or_major, fw.or_build, fw.or_patch);
3046                 /* no option rom */
3047                 } else if (fw.etrack_id != 0X0000) {
3048                         snprintf(adapter->fw_version,
3049                             sizeof(adapter->fw_version),
3050                             "%d.%d, 0x%08x",
3051                             fw.eep_major, fw.eep_minor, fw.etrack_id);
3052                 } else {
3053                 snprintf(adapter->fw_version,
3054                     sizeof(adapter->fw_version),
3055                     "%d.%d.%d",
3056                     fw.eep_major, fw.eep_minor, fw.eep_build);
3057                 }
3058                 break;
3059         }
3060 }
3061
3062 /**
3063  * igb_init_mas - init Media Autosense feature if enabled in the NVM
3064  *
3065  * @adapter: adapter struct
3066  **/
3067 static void igb_init_mas(struct igb_adapter *adapter)
3068 {
3069         struct e1000_hw *hw = &adapter->hw;
3070         u16 eeprom_data;
3071
3072         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
3073         switch (hw->bus.func) {
3074         case E1000_FUNC_0:
3075                 if (eeprom_data & IGB_MAS_ENABLE_0) {
3076                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3077                         netdev_info(adapter->netdev,
3078                                 "MAS: Enabling Media Autosense for port %d\n",
3079                                 hw->bus.func);
3080                 }
3081                 break;
3082         case E1000_FUNC_1:
3083                 if (eeprom_data & IGB_MAS_ENABLE_1) {
3084                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3085                         netdev_info(adapter->netdev,
3086                                 "MAS: Enabling Media Autosense for port %d\n",
3087                                 hw->bus.func);
3088                 }
3089                 break;
3090         case E1000_FUNC_2:
3091                 if (eeprom_data & IGB_MAS_ENABLE_2) {
3092                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3093                         netdev_info(adapter->netdev,
3094                                 "MAS: Enabling Media Autosense for port %d\n",
3095                                 hw->bus.func);
3096                 }
3097                 break;
3098         case E1000_FUNC_3:
3099                 if (eeprom_data & IGB_MAS_ENABLE_3) {
3100                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3101                         netdev_info(adapter->netdev,
3102                                 "MAS: Enabling Media Autosense for port %d\n",
3103                                 hw->bus.func);
3104                 }
3105                 break;
3106         default:
3107                 /* Shouldn't get here */
3108                 netdev_err(adapter->netdev,
3109                         "MAS: Invalid port configuration, returning\n");
3110                 break;
3111         }
3112 }
3113
3114 /**
3115  *  igb_init_i2c - Init I2C interface
3116  *  @adapter: pointer to adapter structure
3117  **/
3118 static s32 igb_init_i2c(struct igb_adapter *adapter)
3119 {
3120         struct e1000_hw *hw = &adapter->hw;
3121         s32 status = 0;
3122         s32 i2cctl;
3123
3124         /* I2C interface supported on i350 devices */
3125         if (adapter->hw.mac.type != e1000_i350)
3126                 return 0;
3127
3128         i2cctl = rd32(E1000_I2CPARAMS);
3129         i2cctl |= E1000_I2CBB_EN
3130                 | E1000_I2C_CLK_OUT | E1000_I2C_CLK_OE_N
3131                 | E1000_I2C_DATA_OUT | E1000_I2C_DATA_OE_N;
3132         wr32(E1000_I2CPARAMS, i2cctl);
3133         wrfl();
3134
3135         /* Initialize the i2c bus which is controlled by the registers.
3136          * This bus will use the i2c_algo_bit structure that implements
3137          * the protocol through toggling of the 4 bits in the register.
3138          */
3139         adapter->i2c_adap.owner = THIS_MODULE;
3140         adapter->i2c_algo = igb_i2c_algo;
3141         adapter->i2c_algo.data = adapter;
3142         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
3143         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
3144         strscpy(adapter->i2c_adap.name, "igb BB",
3145                 sizeof(adapter->i2c_adap.name));
3146         status = i2c_bit_add_bus(&adapter->i2c_adap);
3147         return status;
3148 }
3149
3150 /**
3151  *  igb_probe - Device Initialization Routine
3152  *  @pdev: PCI device information struct
3153  *  @ent: entry in igb_pci_tbl
3154  *
3155  *  Returns 0 on success, negative on failure
3156  *
3157  *  igb_probe initializes an adapter identified by a pci_dev structure.
3158  *  The OS initialization, configuring of the adapter private structure,
3159  *  and a hardware reset occur.
3160  **/
3161 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3162 {
3163         struct net_device *netdev;
3164         struct igb_adapter *adapter;
3165         struct e1000_hw *hw;
3166         u16 eeprom_data = 0;
3167         s32 ret_val;
3168         static int global_quad_port_a; /* global quad port a indication */
3169         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3170         u8 part_str[E1000_PBANUM_LENGTH];
3171         int err;
3172
3173         /* Catch broken hardware that put the wrong VF device ID in
3174          * the PCIe SR-IOV capability.
3175          */
3176         if (pdev->is_virtfn) {
3177                 WARN(1, KERN_ERR "%s (%x:%x) should not be a VF!\n",
3178                         pci_name(pdev), pdev->vendor, pdev->device);
3179                 return -EINVAL;
3180         }
3181
3182         err = pci_enable_device_mem(pdev);
3183         if (err)
3184                 return err;
3185
3186         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3187         if (err) {
3188                 dev_err(&pdev->dev,
3189                         "No usable DMA configuration, aborting\n");
3190                 goto err_dma;
3191         }
3192
3193         err = pci_request_mem_regions(pdev, igb_driver_name);
3194         if (err)
3195                 goto err_pci_reg;
3196
3197         pci_enable_pcie_error_reporting(pdev);
3198
3199         pci_set_master(pdev);
3200         pci_save_state(pdev);
3201
3202         err = -ENOMEM;
3203         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3204                                    IGB_MAX_TX_QUEUES);
3205         if (!netdev)
3206                 goto err_alloc_etherdev;
3207
3208         SET_NETDEV_DEV(netdev, &pdev->dev);
3209
3210         pci_set_drvdata(pdev, netdev);
3211         adapter = netdev_priv(netdev);
3212         adapter->netdev = netdev;
3213         adapter->pdev = pdev;
3214         hw = &adapter->hw;
3215         hw->back = adapter;
3216         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3217
3218         err = -EIO;
3219         adapter->io_addr = pci_iomap(pdev, 0, 0);
3220         if (!adapter->io_addr)
3221                 goto err_ioremap;
3222         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3223         hw->hw_addr = adapter->io_addr;
3224
3225         netdev->netdev_ops = &igb_netdev_ops;
3226         igb_set_ethtool_ops(netdev);
3227         netdev->watchdog_timeo = 5 * HZ;
3228
3229         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3230
3231         netdev->mem_start = pci_resource_start(pdev, 0);
3232         netdev->mem_end = pci_resource_end(pdev, 0);
3233
3234         /* PCI config space info */
3235         hw->vendor_id = pdev->vendor;
3236         hw->device_id = pdev->device;
3237         hw->revision_id = pdev->revision;
3238         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3239         hw->subsystem_device_id = pdev->subsystem_device;
3240
3241         /* Copy the default MAC, PHY and NVM function pointers */
3242         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3243         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3244         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3245         /* Initialize skew-specific constants */
3246         err = ei->get_invariants(hw);
3247         if (err)
3248                 goto err_sw_init;
3249
3250         /* setup the private structure */
3251         err = igb_sw_init(adapter);
3252         if (err)
3253                 goto err_sw_init;
3254
3255         igb_get_bus_info_pcie(hw);
3256
3257         hw->phy.autoneg_wait_to_complete = false;
3258
3259         /* Copper options */
3260         if (hw->phy.media_type == e1000_media_type_copper) {
3261                 hw->phy.mdix = AUTO_ALL_MODES;
3262                 hw->phy.disable_polarity_correction = false;
3263                 hw->phy.ms_type = e1000_ms_hw_default;
3264         }
3265
3266         if (igb_check_reset_block(hw))
3267                 dev_info(&pdev->dev,
3268                         "PHY reset is blocked due to SOL/IDER session.\n");
3269
3270         /* features is initialized to 0 in allocation, it might have bits
3271          * set by igb_sw_init so we should use an or instead of an
3272          * assignment.
3273          */
3274         netdev->features |= NETIF_F_SG |
3275                             NETIF_F_TSO |
3276                             NETIF_F_TSO6 |
3277                             NETIF_F_RXHASH |
3278                             NETIF_F_RXCSUM |
3279                             NETIF_F_HW_CSUM;
3280
3281         if (hw->mac.type >= e1000_82576)
3282                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
3283
3284         if (hw->mac.type >= e1000_i350)
3285                 netdev->features |= NETIF_F_HW_TC;
3286
3287 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3288                                   NETIF_F_GSO_GRE_CSUM | \
3289                                   NETIF_F_GSO_IPXIP4 | \
3290                                   NETIF_F_GSO_IPXIP6 | \
3291                                   NETIF_F_GSO_UDP_TUNNEL | \
3292                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
3293
3294         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3295         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3296
3297         /* copy netdev features into list of user selectable features */
3298         netdev->hw_features |= netdev->features |
3299                                NETIF_F_HW_VLAN_CTAG_RX |
3300                                NETIF_F_HW_VLAN_CTAG_TX |
3301                                NETIF_F_RXALL;
3302
3303         if (hw->mac.type >= e1000_i350)
3304                 netdev->hw_features |= NETIF_F_NTUPLE;
3305
3306         netdev->features |= NETIF_F_HIGHDMA;
3307
3308         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3309         netdev->mpls_features |= NETIF_F_HW_CSUM;
3310         netdev->hw_enc_features |= netdev->vlan_features;
3311
3312         /* set this bit last since it cannot be part of vlan_features */
3313         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3314                             NETIF_F_HW_VLAN_CTAG_RX |
3315                             NETIF_F_HW_VLAN_CTAG_TX;
3316
3317         netdev->priv_flags |= IFF_SUPP_NOFCS;
3318
3319         netdev->priv_flags |= IFF_UNICAST_FLT;
3320
3321         /* MTU range: 68 - 9216 */
3322         netdev->min_mtu = ETH_MIN_MTU;
3323         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3324
3325         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3326
3327         /* before reading the NVM, reset the controller to put the device in a
3328          * known good starting state
3329          */
3330         hw->mac.ops.reset_hw(hw);
3331
3332         /* make sure the NVM is good , i211/i210 parts can have special NVM
3333          * that doesn't contain a checksum
3334          */
3335         switch (hw->mac.type) {
3336         case e1000_i210:
3337         case e1000_i211:
3338                 if (igb_get_flash_presence_i210(hw)) {
3339                         if (hw->nvm.ops.validate(hw) < 0) {
3340                                 dev_err(&pdev->dev,
3341                                         "The NVM Checksum Is Not Valid\n");
3342                                 err = -EIO;
3343                                 goto err_eeprom;
3344                         }
3345                 }
3346                 break;
3347         default:
3348                 if (hw->nvm.ops.validate(hw) < 0) {
3349                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3350                         err = -EIO;
3351                         goto err_eeprom;
3352                 }
3353                 break;
3354         }
3355
3356         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3357                 /* copy the MAC address out of the NVM */
3358                 if (hw->mac.ops.read_mac_addr(hw))
3359                         dev_err(&pdev->dev, "NVM Read Error\n");
3360         }
3361
3362         eth_hw_addr_set(netdev, hw->mac.addr);
3363
3364         if (!is_valid_ether_addr(netdev->dev_addr)) {
3365                 dev_err(&pdev->dev, "Invalid MAC Address\n");
3366                 err = -EIO;
3367                 goto err_eeprom;
3368         }
3369
3370         igb_set_default_mac_filter(adapter);
3371
3372         /* get firmware version for ethtool -i */
3373         igb_set_fw_version(adapter);
3374
3375         /* configure RXPBSIZE and TXPBSIZE */
3376         if (hw->mac.type == e1000_i210) {
3377                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3378                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3379         }
3380
3381         timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3382         timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3383
3384         INIT_WORK(&adapter->reset_task, igb_reset_task);
3385         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3386
3387         /* Initialize link properties that are user-changeable */
3388         adapter->fc_autoneg = true;
3389         hw->mac.autoneg = true;
3390         hw->phy.autoneg_advertised = 0x2f;
3391
3392         hw->fc.requested_mode = e1000_fc_default;
3393         hw->fc.current_mode = e1000_fc_default;
3394
3395         igb_validate_mdi_setting(hw);
3396
3397         /* By default, support wake on port A */
3398         if (hw->bus.func == 0)
3399                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3400
3401         /* Check the NVM for wake support on non-port A ports */
3402         if (hw->mac.type >= e1000_82580)
3403                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3404                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3405                                  &eeprom_data);
3406         else if (hw->bus.func == 1)
3407                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3408
3409         if (eeprom_data & IGB_EEPROM_APME)
3410                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3411
3412         /* now that we have the eeprom settings, apply the special cases where
3413          * the eeprom may be wrong or the board simply won't support wake on
3414          * lan on a particular port
3415          */
3416         switch (pdev->device) {
3417         case E1000_DEV_ID_82575GB_QUAD_COPPER:
3418                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3419                 break;
3420         case E1000_DEV_ID_82575EB_FIBER_SERDES:
3421         case E1000_DEV_ID_82576_FIBER:
3422         case E1000_DEV_ID_82576_SERDES:
3423                 /* Wake events only supported on port A for dual fiber
3424                  * regardless of eeprom setting
3425                  */
3426                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3427                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3428                 break;
3429         case E1000_DEV_ID_82576_QUAD_COPPER:
3430         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3431                 /* if quad port adapter, disable WoL on all but port A */
3432                 if (global_quad_port_a != 0)
3433                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3434                 else
3435                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3436                 /* Reset for multiple quad port adapters */
3437                 if (++global_quad_port_a == 4)
3438                         global_quad_port_a = 0;
3439                 break;
3440         default:
3441                 /* If the device can't wake, don't set software support */
3442                 if (!device_can_wakeup(&adapter->pdev->dev))
3443                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3444         }
3445
3446         /* initialize the wol settings based on the eeprom settings */
3447         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3448                 adapter->wol |= E1000_WUFC_MAG;
3449
3450         /* Some vendors want WoL disabled by default, but still supported */
3451         if ((hw->mac.type == e1000_i350) &&
3452             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3453                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3454                 adapter->wol = 0;
3455         }
3456
3457         /* Some vendors want the ability to Use the EEPROM setting as
3458          * enable/disable only, and not for capability
3459          */
3460         if (((hw->mac.type == e1000_i350) ||
3461              (hw->mac.type == e1000_i354)) &&
3462             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3463                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3464                 adapter->wol = 0;
3465         }
3466         if (hw->mac.type == e1000_i350) {
3467                 if (((pdev->subsystem_device == 0x5001) ||
3468                      (pdev->subsystem_device == 0x5002)) &&
3469                                 (hw->bus.func == 0)) {
3470                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3471                         adapter->wol = 0;
3472                 }
3473                 if (pdev->subsystem_device == 0x1F52)
3474                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3475         }
3476
3477         device_set_wakeup_enable(&adapter->pdev->dev,
3478                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3479
3480         /* reset the hardware with the new settings */
3481         igb_reset(adapter);
3482
3483         /* Init the I2C interface */
3484         err = igb_init_i2c(adapter);
3485         if (err) {
3486                 dev_err(&pdev->dev, "failed to init i2c interface\n");
3487                 goto err_eeprom;
3488         }
3489
3490         /* let the f/w know that the h/w is now under the control of the
3491          * driver.
3492          */
3493         igb_get_hw_control(adapter);
3494
3495         strcpy(netdev->name, "eth%d");
3496         err = register_netdev(netdev);
3497         if (err)
3498                 goto err_register;
3499
3500         /* carrier off reporting is important to ethtool even BEFORE open */
3501         netif_carrier_off(netdev);
3502
3503 #ifdef CONFIG_IGB_DCA
3504         if (dca_add_requester(&pdev->dev) == 0) {
3505                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3506                 dev_info(&pdev->dev, "DCA enabled\n");
3507                 igb_setup_dca(adapter);
3508         }
3509
3510 #endif
3511 #ifdef CONFIG_IGB_HWMON
3512         /* Initialize the thermal sensor on i350 devices. */
3513         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3514                 u16 ets_word;
3515
3516                 /* Read the NVM to determine if this i350 device supports an
3517                  * external thermal sensor.
3518                  */
3519                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3520                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3521                         adapter->ets = true;
3522                 else
3523                         adapter->ets = false;
3524                 if (igb_sysfs_init(adapter))
3525                         dev_err(&pdev->dev,
3526                                 "failed to allocate sysfs resources\n");
3527         } else {
3528                 adapter->ets = false;
3529         }
3530 #endif
3531         /* Check if Media Autosense is enabled */
3532         adapter->ei = *ei;
3533         if (hw->dev_spec._82575.mas_capable)
3534                 igb_init_mas(adapter);
3535
3536         /* do hw tstamp init after resetting */
3537         igb_ptp_init(adapter);
3538
3539         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3540         /* print bus type/speed/width info, not applicable to i354 */
3541         if (hw->mac.type != e1000_i354) {
3542                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3543                          netdev->name,
3544                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3545                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3546                            "unknown"),
3547                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3548                           "Width x4" :
3549                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
3550                           "Width x2" :
3551                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
3552                           "Width x1" : "unknown"), netdev->dev_addr);
3553         }
3554
3555         if ((hw->mac.type == e1000_82576 &&
3556              rd32(E1000_EECD) & E1000_EECD_PRES) ||
3557             (hw->mac.type >= e1000_i210 ||
3558              igb_get_flash_presence_i210(hw))) {
3559                 ret_val = igb_read_part_string(hw, part_str,
3560                                                E1000_PBANUM_LENGTH);
3561         } else {
3562                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3563         }
3564
3565         if (ret_val)
3566                 strcpy(part_str, "Unknown");
3567         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3568         dev_info(&pdev->dev,
3569                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3570                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3571                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3572                 adapter->num_rx_queues, adapter->num_tx_queues);
3573         if (hw->phy.media_type == e1000_media_type_copper) {
3574                 switch (hw->mac.type) {
3575                 case e1000_i350:
3576                 case e1000_i210:
3577                 case e1000_i211:
3578                         /* Enable EEE for internal copper PHY devices */
3579                         err = igb_set_eee_i350(hw, true, true);
3580                         if ((!err) &&
3581                             (!hw->dev_spec._82575.eee_disable)) {
3582                                 adapter->eee_advert =
3583                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3584                                 adapter->flags |= IGB_FLAG_EEE;
3585                         }
3586                         break;
3587                 case e1000_i354:
3588                         if ((rd32(E1000_CTRL_EXT) &
3589                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3590                                 err = igb_set_eee_i354(hw, true, true);
3591                                 if ((!err) &&
3592                                         (!hw->dev_spec._82575.eee_disable)) {
3593                                         adapter->eee_advert =
3594                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3595                                         adapter->flags |= IGB_FLAG_EEE;
3596                                 }
3597                         }
3598                         break;
3599                 default:
3600                         break;
3601                 }
3602         }
3603
3604         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
3605
3606         pm_runtime_put_noidle(&pdev->dev);
3607         return 0;
3608
3609 err_register:
3610         igb_release_hw_control(adapter);
3611         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3612 err_eeprom:
3613         if (!igb_check_reset_block(hw))
3614                 igb_reset_phy(hw);
3615
3616         if (hw->flash_address)
3617                 iounmap(hw->flash_address);
3618 err_sw_init:
3619         kfree(adapter->mac_table);
3620         kfree(adapter->shadow_vfta);
3621         igb_clear_interrupt_scheme(adapter);
3622 #ifdef CONFIG_PCI_IOV
3623         igb_disable_sriov(pdev);
3624 #endif
3625         pci_iounmap(pdev, adapter->io_addr);
3626 err_ioremap:
3627         free_netdev(netdev);
3628 err_alloc_etherdev:
3629         pci_disable_pcie_error_reporting(pdev);
3630         pci_release_mem_regions(pdev);
3631 err_pci_reg:
3632 err_dma:
3633         pci_disable_device(pdev);
3634         return err;
3635 }
3636
3637 #ifdef CONFIG_PCI_IOV
3638 static int igb_disable_sriov(struct pci_dev *pdev)
3639 {
3640         struct net_device *netdev = pci_get_drvdata(pdev);
3641         struct igb_adapter *adapter = netdev_priv(netdev);
3642         struct e1000_hw *hw = &adapter->hw;
3643         unsigned long flags;
3644
3645         /* reclaim resources allocated to VFs */
3646         if (adapter->vf_data) {
3647                 /* disable iov and allow time for transactions to clear */
3648                 if (pci_vfs_assigned(pdev)) {
3649                         dev_warn(&pdev->dev,
3650                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3651                         return -EPERM;
3652                 } else {
3653                         pci_disable_sriov(pdev);
3654                         msleep(500);
3655                 }
3656                 spin_lock_irqsave(&adapter->vfs_lock, flags);
3657                 kfree(adapter->vf_mac_list);
3658                 adapter->vf_mac_list = NULL;
3659                 kfree(adapter->vf_data);
3660                 adapter->vf_data = NULL;
3661                 adapter->vfs_allocated_count = 0;
3662                 spin_unlock_irqrestore(&adapter->vfs_lock, flags);
3663                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3664                 wrfl();
3665                 msleep(100);
3666                 dev_info(&pdev->dev, "IOV Disabled\n");
3667
3668                 /* Re-enable DMA Coalescing flag since IOV is turned off */
3669                 adapter->flags |= IGB_FLAG_DMAC;
3670         }
3671
3672         return 0;
3673 }
3674
3675 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3676 {
3677         struct net_device *netdev = pci_get_drvdata(pdev);
3678         struct igb_adapter *adapter = netdev_priv(netdev);
3679         int old_vfs = pci_num_vf(pdev);
3680         struct vf_mac_filter *mac_list;
3681         int err = 0;
3682         int num_vf_mac_filters, i;
3683
3684         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3685                 err = -EPERM;
3686                 goto out;
3687         }
3688         if (!num_vfs)
3689                 goto out;
3690
3691         if (old_vfs) {
3692                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3693                          old_vfs, max_vfs);
3694                 adapter->vfs_allocated_count = old_vfs;
3695         } else
3696                 adapter->vfs_allocated_count = num_vfs;
3697
3698         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3699                                 sizeof(struct vf_data_storage), GFP_KERNEL);
3700
3701         /* if allocation failed then we do not support SR-IOV */
3702         if (!adapter->vf_data) {
3703                 adapter->vfs_allocated_count = 0;
3704                 err = -ENOMEM;
3705                 goto out;
3706         }
3707
3708         /* Due to the limited number of RAR entries calculate potential
3709          * number of MAC filters available for the VFs. Reserve entries
3710          * for PF default MAC, PF MAC filters and at least one RAR entry
3711          * for each VF for VF MAC.
3712          */
3713         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3714                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
3715                               adapter->vfs_allocated_count);
3716
3717         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3718                                        sizeof(struct vf_mac_filter),
3719                                        GFP_KERNEL);
3720
3721         mac_list = adapter->vf_mac_list;
3722         INIT_LIST_HEAD(&adapter->vf_macs.l);
3723
3724         if (adapter->vf_mac_list) {
3725                 /* Initialize list of VF MAC filters */
3726                 for (i = 0; i < num_vf_mac_filters; i++) {
3727                         mac_list->vf = -1;
3728                         mac_list->free = true;
3729                         list_add(&mac_list->l, &adapter->vf_macs.l);
3730                         mac_list++;
3731                 }
3732         } else {
3733                 /* If we could not allocate memory for the VF MAC filters
3734                  * we can continue without this feature but warn user.
3735                  */
3736                 dev_err(&pdev->dev,
3737                         "Unable to allocate memory for VF MAC filter list\n");
3738         }
3739
3740         /* only call pci_enable_sriov() if no VFs are allocated already */
3741         if (!old_vfs) {
3742                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3743                 if (err)
3744                         goto err_out;
3745         }
3746         dev_info(&pdev->dev, "%d VFs allocated\n",
3747                  adapter->vfs_allocated_count);
3748         for (i = 0; i < adapter->vfs_allocated_count; i++)
3749                 igb_vf_configure(adapter, i);
3750
3751         /* DMA Coalescing is not supported in IOV mode. */
3752         adapter->flags &= ~IGB_FLAG_DMAC;
3753         goto out;
3754
3755 err_out:
3756         kfree(adapter->vf_mac_list);
3757         adapter->vf_mac_list = NULL;
3758         kfree(adapter->vf_data);
3759         adapter->vf_data = NULL;
3760         adapter->vfs_allocated_count = 0;
3761 out:
3762         return err;
3763 }
3764
3765 #endif
3766 /**
3767  *  igb_remove_i2c - Cleanup  I2C interface
3768  *  @adapter: pointer to adapter structure
3769  **/
3770 static void igb_remove_i2c(struct igb_adapter *adapter)
3771 {
3772         /* free the adapter bus structure */
3773         i2c_del_adapter(&adapter->i2c_adap);
3774 }
3775
3776 /**
3777  *  igb_remove - Device Removal Routine
3778  *  @pdev: PCI device information struct
3779  *
3780  *  igb_remove is called by the PCI subsystem to alert the driver
3781  *  that it should release a PCI device.  The could be caused by a
3782  *  Hot-Plug event, or because the driver is going to be removed from
3783  *  memory.
3784  **/
3785 static void igb_remove(struct pci_dev *pdev)
3786 {
3787         struct net_device *netdev = pci_get_drvdata(pdev);
3788         struct igb_adapter *adapter = netdev_priv(netdev);
3789         struct e1000_hw *hw = &adapter->hw;
3790
3791         pm_runtime_get_noresume(&pdev->dev);
3792 #ifdef CONFIG_IGB_HWMON
3793         igb_sysfs_exit(adapter);
3794 #endif
3795         igb_remove_i2c(adapter);
3796         igb_ptp_stop(adapter);
3797         /* The watchdog timer may be rescheduled, so explicitly
3798          * disable watchdog from being rescheduled.
3799          */
3800         set_bit(__IGB_DOWN, &adapter->state);
3801         del_timer_sync(&adapter->watchdog_timer);
3802         del_timer_sync(&adapter->phy_info_timer);
3803
3804         cancel_work_sync(&adapter->reset_task);
3805         cancel_work_sync(&adapter->watchdog_task);
3806
3807 #ifdef CONFIG_IGB_DCA
3808         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3809                 dev_info(&pdev->dev, "DCA disabled\n");
3810                 dca_remove_requester(&pdev->dev);
3811                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3812                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3813         }
3814 #endif
3815
3816         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3817          * would have already happened in close and is redundant.
3818          */
3819         igb_release_hw_control(adapter);
3820
3821 #ifdef CONFIG_PCI_IOV
3822         rtnl_lock();
3823         igb_disable_sriov(pdev);
3824         rtnl_unlock();
3825 #endif
3826
3827         unregister_netdev(netdev);
3828
3829         igb_clear_interrupt_scheme(adapter);
3830
3831         pci_iounmap(pdev, adapter->io_addr);
3832         if (hw->flash_address)
3833                 iounmap(hw->flash_address);
3834         pci_release_mem_regions(pdev);
3835
3836         kfree(adapter->mac_table);
3837         kfree(adapter->shadow_vfta);
3838         free_netdev(netdev);
3839
3840         pci_disable_pcie_error_reporting(pdev);
3841
3842         pci_disable_device(pdev);
3843 }
3844
3845 /**
3846  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3847  *  @adapter: board private structure to initialize
3848  *
3849  *  This function initializes the vf specific data storage and then attempts to
3850  *  allocate the VFs.  The reason for ordering it this way is because it is much
3851  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3852  *  the memory for the VFs.
3853  **/
3854 static void igb_probe_vfs(struct igb_adapter *adapter)
3855 {
3856 #ifdef CONFIG_PCI_IOV
3857         struct pci_dev *pdev = adapter->pdev;
3858         struct e1000_hw *hw = &adapter->hw;
3859
3860         /* Virtualization features not supported on i210 family. */
3861         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3862                 return;
3863
3864         /* Of the below we really only want the effect of getting
3865          * IGB_FLAG_HAS_MSIX set (if available), without which
3866          * igb_enable_sriov() has no effect.
3867          */
3868         igb_set_interrupt_capability(adapter, true);
3869         igb_reset_interrupt_capability(adapter);
3870
3871         pci_sriov_set_totalvfs(pdev, 7);
3872         igb_enable_sriov(pdev, max_vfs);
3873
3874 #endif /* CONFIG_PCI_IOV */
3875 }
3876
3877 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3878 {
3879         struct e1000_hw *hw = &adapter->hw;
3880         unsigned int max_rss_queues;
3881
3882         /* Determine the maximum number of RSS queues supported. */
3883         switch (hw->mac.type) {
3884         case e1000_i211:
3885                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3886                 break;
3887         case e1000_82575:
3888         case e1000_i210:
3889                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3890                 break;
3891         case e1000_i350:
3892                 /* I350 cannot do RSS and SR-IOV at the same time */
3893                 if (!!adapter->vfs_allocated_count) {
3894                         max_rss_queues = 1;
3895                         break;
3896                 }
3897                 fallthrough;
3898         case e1000_82576:
3899                 if (!!adapter->vfs_allocated_count) {
3900                         max_rss_queues = 2;
3901                         break;
3902                 }
3903                 fallthrough;
3904         case e1000_82580:
3905         case e1000_i354:
3906         default:
3907                 max_rss_queues = IGB_MAX_RX_QUEUES;
3908                 break;
3909         }
3910
3911         return max_rss_queues;
3912 }
3913
3914 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3915 {
3916         u32 max_rss_queues;
3917
3918         max_rss_queues = igb_get_max_rss_queues(adapter);
3919         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3920
3921         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3922 }
3923
3924 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3925                               const u32 max_rss_queues)
3926 {
3927         struct e1000_hw *hw = &adapter->hw;
3928
3929         /* Determine if we need to pair queues. */
3930         switch (hw->mac.type) {
3931         case e1000_82575:
3932         case e1000_i211:
3933                 /* Device supports enough interrupts without queue pairing. */
3934                 break;
3935         case e1000_82576:
3936         case e1000_82580:
3937         case e1000_i350:
3938         case e1000_i354:
3939         case e1000_i210:
3940         default:
3941                 /* If rss_queues > half of max_rss_queues, pair the queues in
3942                  * order to conserve interrupts due to limited supply.
3943                  */
3944                 if (adapter->rss_queues > (max_rss_queues / 2))
3945                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3946                 else
3947                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3948                 break;
3949         }
3950 }
3951
3952 /**
3953  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3954  *  @adapter: board private structure to initialize
3955  *
3956  *  igb_sw_init initializes the Adapter private data structure.
3957  *  Fields are initialized based on PCI device information and
3958  *  OS network device settings (MTU size).
3959  **/
3960 static int igb_sw_init(struct igb_adapter *adapter)
3961 {
3962         struct e1000_hw *hw = &adapter->hw;
3963         struct net_device *netdev = adapter->netdev;
3964         struct pci_dev *pdev = adapter->pdev;
3965
3966         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3967
3968         /* set default ring sizes */
3969         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3970         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3971
3972         /* set default ITR values */
3973         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3974         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3975
3976         /* set default work limits */
3977         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3978
3979         adapter->max_frame_size = netdev->mtu + IGB_ETH_PKT_HDR_PAD;
3980         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3981
3982         spin_lock_init(&adapter->nfc_lock);
3983         spin_lock_init(&adapter->stats64_lock);
3984
3985         /* init spinlock to avoid concurrency of VF resources */
3986         spin_lock_init(&adapter->vfs_lock);
3987 #ifdef CONFIG_PCI_IOV
3988         switch (hw->mac.type) {
3989         case e1000_82576:
3990         case e1000_i350:
3991                 if (max_vfs > 7) {
3992                         dev_warn(&pdev->dev,
3993                                  "Maximum of 7 VFs per PF, using max\n");
3994                         max_vfs = adapter->vfs_allocated_count = 7;
3995                 } else
3996                         adapter->vfs_allocated_count = max_vfs;
3997                 if (adapter->vfs_allocated_count)
3998                         dev_warn(&pdev->dev,
3999                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
4000                 break;
4001         default:
4002                 break;
4003         }
4004 #endif /* CONFIG_PCI_IOV */
4005
4006         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
4007         adapter->flags |= IGB_FLAG_HAS_MSIX;
4008
4009         adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
4010                                      sizeof(struct igb_mac_addr),
4011                                      GFP_KERNEL);
4012         if (!adapter->mac_table)
4013                 return -ENOMEM;
4014
4015         igb_probe_vfs(adapter);
4016
4017         igb_init_queue_configuration(adapter);
4018
4019         /* Setup and initialize a copy of the hw vlan table array */
4020         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
4021                                        GFP_KERNEL);
4022         if (!adapter->shadow_vfta)
4023                 return -ENOMEM;
4024
4025         /* This call may decrease the number of queues */
4026         if (igb_init_interrupt_scheme(adapter, true)) {
4027                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4028                 return -ENOMEM;
4029         }
4030
4031         /* Explicitly disable IRQ since the NIC can be in any state. */
4032         igb_irq_disable(adapter);
4033
4034         if (hw->mac.type >= e1000_i350)
4035                 adapter->flags &= ~IGB_FLAG_DMAC;
4036
4037         set_bit(__IGB_DOWN, &adapter->state);
4038         return 0;
4039 }
4040
4041 /**
4042  *  __igb_open - Called when a network interface is made active
4043  *  @netdev: network interface device structure
4044  *  @resuming: indicates whether we are in a resume call
4045  *
4046  *  Returns 0 on success, negative value on failure
4047  *
4048  *  The open entry point is called when a network interface is made
4049  *  active by the system (IFF_UP).  At this point all resources needed
4050  *  for transmit and receive operations are allocated, the interrupt
4051  *  handler is registered with the OS, the watchdog timer is started,
4052  *  and the stack is notified that the interface is ready.
4053  **/
4054 static int __igb_open(struct net_device *netdev, bool resuming)
4055 {
4056         struct igb_adapter *adapter = netdev_priv(netdev);
4057         struct e1000_hw *hw = &adapter->hw;
4058         struct pci_dev *pdev = adapter->pdev;
4059         int err;
4060         int i;
4061
4062         /* disallow open during test */
4063         if (test_bit(__IGB_TESTING, &adapter->state)) {
4064                 WARN_ON(resuming);
4065                 return -EBUSY;
4066         }
4067
4068         if (!resuming)
4069                 pm_runtime_get_sync(&pdev->dev);
4070
4071         netif_carrier_off(netdev);
4072
4073         /* allocate transmit descriptors */
4074         err = igb_setup_all_tx_resources(adapter);
4075         if (err)
4076                 goto err_setup_tx;
4077
4078         /* allocate receive descriptors */
4079         err = igb_setup_all_rx_resources(adapter);
4080         if (err)
4081                 goto err_setup_rx;
4082
4083         igb_power_up_link(adapter);
4084
4085         /* before we allocate an interrupt, we must be ready to handle it.
4086          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4087          * as soon as we call pci_request_irq, so we have to setup our
4088          * clean_rx handler before we do so.
4089          */
4090         igb_configure(adapter);
4091
4092         err = igb_request_irq(adapter);
4093         if (err)
4094                 goto err_req_irq;
4095
4096         /* Notify the stack of the actual queue counts. */
4097         err = netif_set_real_num_tx_queues(adapter->netdev,
4098                                            adapter->num_tx_queues);
4099         if (err)
4100                 goto err_set_queues;
4101
4102         err = netif_set_real_num_rx_queues(adapter->netdev,
4103                                            adapter->num_rx_queues);
4104         if (err)
4105                 goto err_set_queues;
4106
4107         /* From here on the code is the same as igb_up() */
4108         clear_bit(__IGB_DOWN, &adapter->state);
4109
4110         for (i = 0; i < adapter->num_q_vectors; i++)
4111                 napi_enable(&(adapter->q_vector[i]->napi));
4112
4113         /* Clear any pending interrupts. */
4114         rd32(E1000_TSICR);
4115         rd32(E1000_ICR);
4116
4117         igb_irq_enable(adapter);
4118
4119         /* notify VFs that reset has been completed */
4120         if (adapter->vfs_allocated_count) {
4121                 u32 reg_data = rd32(E1000_CTRL_EXT);
4122
4123                 reg_data |= E1000_CTRL_EXT_PFRSTD;
4124                 wr32(E1000_CTRL_EXT, reg_data);
4125         }
4126
4127         netif_tx_start_all_queues(netdev);
4128
4129         if (!resuming)
4130                 pm_runtime_put(&pdev->dev);
4131
4132         /* start the watchdog. */
4133         hw->mac.get_link_status = 1;
4134         schedule_work(&adapter->watchdog_task);
4135
4136         return 0;
4137
4138 err_set_queues:
4139         igb_free_irq(adapter);
4140 err_req_irq:
4141         igb_release_hw_control(adapter);
4142         igb_power_down_link(adapter);
4143         igb_free_all_rx_resources(adapter);
4144 err_setup_rx:
4145         igb_free_all_tx_resources(adapter);
4146 err_setup_tx:
4147         igb_reset(adapter);
4148         if (!resuming)
4149                 pm_runtime_put(&pdev->dev);
4150
4151         return err;
4152 }
4153
4154 int igb_open(struct net_device *netdev)
4155 {
4156         return __igb_open(netdev, false);
4157 }
4158
4159 /**
4160  *  __igb_close - Disables a network interface
4161  *  @netdev: network interface device structure
4162  *  @suspending: indicates we are in a suspend call
4163  *
4164  *  Returns 0, this is not allowed to fail
4165  *
4166  *  The close entry point is called when an interface is de-activated
4167  *  by the OS.  The hardware is still under the driver's control, but
4168  *  needs to be disabled.  A global MAC reset is issued to stop the
4169  *  hardware, and all transmit and receive resources are freed.
4170  **/
4171 static int __igb_close(struct net_device *netdev, bool suspending)
4172 {
4173         struct igb_adapter *adapter = netdev_priv(netdev);
4174         struct pci_dev *pdev = adapter->pdev;
4175
4176         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4177
4178         if (!suspending)
4179                 pm_runtime_get_sync(&pdev->dev);
4180
4181         igb_down(adapter);
4182         igb_free_irq(adapter);
4183
4184         igb_free_all_tx_resources(adapter);
4185         igb_free_all_rx_resources(adapter);
4186
4187         if (!suspending)
4188                 pm_runtime_put_sync(&pdev->dev);
4189         return 0;
4190 }
4191
4192 int igb_close(struct net_device *netdev)
4193 {
4194         if (netif_device_present(netdev) || netdev->dismantle)
4195                 return __igb_close(netdev, false);
4196         return 0;
4197 }
4198
4199 /**
4200  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
4201  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
4202  *
4203  *  Return 0 on success, negative on failure
4204  **/
4205 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4206 {
4207         struct device *dev = tx_ring->dev;
4208         int size;
4209
4210         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4211
4212         tx_ring->tx_buffer_info = vmalloc(size);
4213         if (!tx_ring->tx_buffer_info)
4214                 goto err;
4215
4216         /* round up to nearest 4K */
4217         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4218         tx_ring->size = ALIGN(tx_ring->size, 4096);
4219
4220         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4221                                            &tx_ring->dma, GFP_KERNEL);
4222         if (!tx_ring->desc)
4223                 goto err;
4224
4225         tx_ring->next_to_use = 0;
4226         tx_ring->next_to_clean = 0;
4227
4228         return 0;
4229
4230 err:
4231         vfree(tx_ring->tx_buffer_info);
4232         tx_ring->tx_buffer_info = NULL;
4233         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4234         return -ENOMEM;
4235 }
4236
4237 /**
4238  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
4239  *                               (Descriptors) for all queues
4240  *  @adapter: board private structure
4241  *
4242  *  Return 0 on success, negative on failure
4243  **/
4244 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4245 {
4246         struct pci_dev *pdev = adapter->pdev;
4247         int i, err = 0;
4248
4249         for (i = 0; i < adapter->num_tx_queues; i++) {
4250                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4251                 if (err) {
4252                         dev_err(&pdev->dev,
4253                                 "Allocation for Tx Queue %u failed\n", i);
4254                         for (i--; i >= 0; i--)
4255                                 igb_free_tx_resources(adapter->tx_ring[i]);
4256                         break;
4257                 }
4258         }
4259
4260         return err;
4261 }
4262
4263 /**
4264  *  igb_setup_tctl - configure the transmit control registers
4265  *  @adapter: Board private structure
4266  **/
4267 void igb_setup_tctl(struct igb_adapter *adapter)
4268 {
4269         struct e1000_hw *hw = &adapter->hw;
4270         u32 tctl;
4271
4272         /* disable queue 0 which is enabled by default on 82575 and 82576 */
4273         wr32(E1000_TXDCTL(0), 0);
4274
4275         /* Program the Transmit Control Register */
4276         tctl = rd32(E1000_TCTL);
4277         tctl &= ~E1000_TCTL_CT;
4278         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4279                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4280
4281         igb_config_collision_dist(hw);
4282
4283         /* Enable transmits */
4284         tctl |= E1000_TCTL_EN;
4285
4286         wr32(E1000_TCTL, tctl);
4287 }
4288
4289 /**
4290  *  igb_configure_tx_ring - Configure transmit ring after Reset
4291  *  @adapter: board private structure
4292  *  @ring: tx ring to configure
4293  *
4294  *  Configure a transmit ring after a reset.
4295  **/
4296 void igb_configure_tx_ring(struct igb_adapter *adapter,
4297                            struct igb_ring *ring)
4298 {
4299         struct e1000_hw *hw = &adapter->hw;
4300         u32 txdctl = 0;
4301         u64 tdba = ring->dma;
4302         int reg_idx = ring->reg_idx;
4303
4304         wr32(E1000_TDLEN(reg_idx),
4305              ring->count * sizeof(union e1000_adv_tx_desc));
4306         wr32(E1000_TDBAL(reg_idx),
4307              tdba & 0x00000000ffffffffULL);
4308         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4309
4310         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4311         wr32(E1000_TDH(reg_idx), 0);
4312         writel(0, ring->tail);
4313
4314         txdctl |= IGB_TX_PTHRESH;
4315         txdctl |= IGB_TX_HTHRESH << 8;
4316         txdctl |= IGB_TX_WTHRESH << 16;
4317
4318         /* reinitialize tx_buffer_info */
4319         memset(ring->tx_buffer_info, 0,
4320                sizeof(struct igb_tx_buffer) * ring->count);
4321
4322         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4323         wr32(E1000_TXDCTL(reg_idx), txdctl);
4324 }
4325
4326 /**
4327  *  igb_configure_tx - Configure transmit Unit after Reset
4328  *  @adapter: board private structure
4329  *
4330  *  Configure the Tx unit of the MAC after a reset.
4331  **/
4332 static void igb_configure_tx(struct igb_adapter *adapter)
4333 {
4334         struct e1000_hw *hw = &adapter->hw;
4335         int i;
4336
4337         /* disable the queues */
4338         for (i = 0; i < adapter->num_tx_queues; i++)
4339                 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4340
4341         wrfl();
4342         usleep_range(10000, 20000);
4343
4344         for (i = 0; i < adapter->num_tx_queues; i++)
4345                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4346 }
4347
4348 /**
4349  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
4350  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
4351  *
4352  *  Returns 0 on success, negative on failure
4353  **/
4354 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4355 {
4356         struct igb_adapter *adapter = netdev_priv(rx_ring->netdev);
4357         struct device *dev = rx_ring->dev;
4358         int size, res;
4359
4360         /* XDP RX-queue info */
4361         if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
4362                 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4363         res = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
4364                                rx_ring->queue_index, 0);
4365         if (res < 0) {
4366                 dev_err(dev, "Failed to register xdp_rxq index %u\n",
4367                         rx_ring->queue_index);
4368                 return res;
4369         }
4370
4371         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4372
4373         rx_ring->rx_buffer_info = vmalloc(size);
4374         if (!rx_ring->rx_buffer_info)
4375                 goto err;
4376
4377         /* Round up to nearest 4K */
4378         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4379         rx_ring->size = ALIGN(rx_ring->size, 4096);
4380
4381         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4382                                            &rx_ring->dma, GFP_KERNEL);
4383         if (!rx_ring->desc)
4384                 goto err;
4385
4386         rx_ring->next_to_alloc = 0;
4387         rx_ring->next_to_clean = 0;
4388         rx_ring->next_to_use = 0;
4389
4390         rx_ring->xdp_prog = adapter->xdp_prog;
4391
4392         return 0;
4393
4394 err:
4395         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4396         vfree(rx_ring->rx_buffer_info);
4397         rx_ring->rx_buffer_info = NULL;
4398         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4399         return -ENOMEM;
4400 }
4401
4402 /**
4403  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
4404  *                               (Descriptors) for all queues
4405  *  @adapter: board private structure
4406  *
4407  *  Return 0 on success, negative on failure
4408  **/
4409 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4410 {
4411         struct pci_dev *pdev = adapter->pdev;
4412         int i, err = 0;
4413
4414         for (i = 0; i < adapter->num_rx_queues; i++) {
4415                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4416                 if (err) {
4417                         dev_err(&pdev->dev,
4418                                 "Allocation for Rx Queue %u failed\n", i);
4419                         for (i--; i >= 0; i--)
4420                                 igb_free_rx_resources(adapter->rx_ring[i]);
4421                         break;
4422                 }
4423         }
4424
4425         return err;
4426 }
4427
4428 /**
4429  *  igb_setup_mrqc - configure the multiple receive queue control registers
4430  *  @adapter: Board private structure
4431  **/
4432 static void igb_setup_mrqc(struct igb_adapter *adapter)
4433 {
4434         struct e1000_hw *hw = &adapter->hw;
4435         u32 mrqc, rxcsum;
4436         u32 j, num_rx_queues;
4437         u32 rss_key[10];
4438
4439         netdev_rss_key_fill(rss_key, sizeof(rss_key));
4440         for (j = 0; j < 10; j++)
4441                 wr32(E1000_RSSRK(j), rss_key[j]);
4442
4443         num_rx_queues = adapter->rss_queues;
4444
4445         switch (hw->mac.type) {
4446         case e1000_82576:
4447                 /* 82576 supports 2 RSS queues for SR-IOV */
4448                 if (adapter->vfs_allocated_count)
4449                         num_rx_queues = 2;
4450                 break;
4451         default:
4452                 break;
4453         }
4454
4455         if (adapter->rss_indir_tbl_init != num_rx_queues) {
4456                 for (j = 0; j < IGB_RETA_SIZE; j++)
4457                         adapter->rss_indir_tbl[j] =
4458                         (j * num_rx_queues) / IGB_RETA_SIZE;
4459                 adapter->rss_indir_tbl_init = num_rx_queues;
4460         }
4461         igb_write_rss_indir_tbl(adapter);
4462
4463         /* Disable raw packet checksumming so that RSS hash is placed in
4464          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
4465          * offloads as they are enabled by default
4466          */
4467         rxcsum = rd32(E1000_RXCSUM);
4468         rxcsum |= E1000_RXCSUM_PCSD;
4469
4470         if (adapter->hw.mac.type >= e1000_82576)
4471                 /* Enable Receive Checksum Offload for SCTP */
4472                 rxcsum |= E1000_RXCSUM_CRCOFL;
4473
4474         /* Don't need to set TUOFL or IPOFL, they default to 1 */
4475         wr32(E1000_RXCSUM, rxcsum);
4476
4477         /* Generate RSS hash based on packet types, TCP/UDP
4478          * port numbers and/or IPv4/v6 src and dst addresses
4479          */
4480         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4481                E1000_MRQC_RSS_FIELD_IPV4_TCP |
4482                E1000_MRQC_RSS_FIELD_IPV6 |
4483                E1000_MRQC_RSS_FIELD_IPV6_TCP |
4484                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4485
4486         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4487                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4488         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4489                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4490
4491         /* If VMDq is enabled then we set the appropriate mode for that, else
4492          * we default to RSS so that an RSS hash is calculated per packet even
4493          * if we are only using one queue
4494          */
4495         if (adapter->vfs_allocated_count) {
4496                 if (hw->mac.type > e1000_82575) {
4497                         /* Set the default pool for the PF's first queue */
4498                         u32 vtctl = rd32(E1000_VT_CTL);
4499
4500                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4501                                    E1000_VT_CTL_DISABLE_DEF_POOL);
4502                         vtctl |= adapter->vfs_allocated_count <<
4503                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4504                         wr32(E1000_VT_CTL, vtctl);
4505                 }
4506                 if (adapter->rss_queues > 1)
4507                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4508                 else
4509                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
4510         } else {
4511                 mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4512         }
4513         igb_vmm_control(adapter);
4514
4515         wr32(E1000_MRQC, mrqc);
4516 }
4517
4518 /**
4519  *  igb_setup_rctl - configure the receive control registers
4520  *  @adapter: Board private structure
4521  **/
4522 void igb_setup_rctl(struct igb_adapter *adapter)
4523 {
4524         struct e1000_hw *hw = &adapter->hw;
4525         u32 rctl;
4526
4527         rctl = rd32(E1000_RCTL);
4528
4529         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4530         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4531
4532         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4533                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4534
4535         /* enable stripping of CRC. It's unlikely this will break BMC
4536          * redirection as it did with e1000. Newer features require
4537          * that the HW strips the CRC.
4538          */
4539         rctl |= E1000_RCTL_SECRC;
4540
4541         /* disable store bad packets and clear size bits. */
4542         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4543
4544         /* enable LPE to allow for reception of jumbo frames */
4545         rctl |= E1000_RCTL_LPE;
4546
4547         /* disable queue 0 to prevent tail write w/o re-config */
4548         wr32(E1000_RXDCTL(0), 0);
4549
4550         /* Attention!!!  For SR-IOV PF driver operations you must enable
4551          * queue drop for all VF and PF queues to prevent head of line blocking
4552          * if an un-trusted VF does not provide descriptors to hardware.
4553          */
4554         if (adapter->vfs_allocated_count) {
4555                 /* set all queue drop enable bits */
4556                 wr32(E1000_QDE, ALL_QUEUES);
4557         }
4558
4559         /* This is useful for sniffing bad packets. */
4560         if (adapter->netdev->features & NETIF_F_RXALL) {
4561                 /* UPE and MPE will be handled by normal PROMISC logic
4562                  * in e1000e_set_rx_mode
4563                  */
4564                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4565                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
4566                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4567
4568                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4569                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4570                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4571                  * and that breaks VLANs.
4572                  */
4573         }
4574
4575         wr32(E1000_RCTL, rctl);
4576 }
4577
4578 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4579                                    int vfn)
4580 {
4581         struct e1000_hw *hw = &adapter->hw;
4582         u32 vmolr;
4583
4584         if (size > MAX_JUMBO_FRAME_SIZE)
4585                 size = MAX_JUMBO_FRAME_SIZE;
4586
4587         vmolr = rd32(E1000_VMOLR(vfn));
4588         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4589         vmolr |= size | E1000_VMOLR_LPE;
4590         wr32(E1000_VMOLR(vfn), vmolr);
4591
4592         return 0;
4593 }
4594
4595 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4596                                          int vfn, bool enable)
4597 {
4598         struct e1000_hw *hw = &adapter->hw;
4599         u32 val, reg;
4600
4601         if (hw->mac.type < e1000_82576)
4602                 return;
4603
4604         if (hw->mac.type == e1000_i350)
4605                 reg = E1000_DVMOLR(vfn);
4606         else
4607                 reg = E1000_VMOLR(vfn);
4608
4609         val = rd32(reg);
4610         if (enable)
4611                 val |= E1000_VMOLR_STRVLAN;
4612         else
4613                 val &= ~(E1000_VMOLR_STRVLAN);
4614         wr32(reg, val);
4615 }
4616
4617 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4618                                  int vfn, bool aupe)
4619 {
4620         struct e1000_hw *hw = &adapter->hw;
4621         u32 vmolr;
4622
4623         /* This register exists only on 82576 and newer so if we are older then
4624          * we should exit and do nothing
4625          */
4626         if (hw->mac.type < e1000_82576)
4627                 return;
4628
4629         vmolr = rd32(E1000_VMOLR(vfn));
4630         if (aupe)
4631                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4632         else
4633                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4634
4635         /* clear all bits that might not be set */
4636         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4637
4638         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4639                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4640         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4641          * multicast packets
4642          */
4643         if (vfn <= adapter->vfs_allocated_count)
4644                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4645
4646         wr32(E1000_VMOLR(vfn), vmolr);
4647 }
4648
4649 /**
4650  *  igb_setup_srrctl - configure the split and replication receive control
4651  *                     registers
4652  *  @adapter: Board private structure
4653  *  @ring: receive ring to be configured
4654  **/
4655 void igb_setup_srrctl(struct igb_adapter *adapter, struct igb_ring *ring)
4656 {
4657         struct e1000_hw *hw = &adapter->hw;
4658         int reg_idx = ring->reg_idx;
4659         u32 srrctl = 0;
4660
4661         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4662         if (ring_uses_large_buffer(ring))
4663                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4664         else
4665                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4666         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4667         if (hw->mac.type >= e1000_82580)
4668                 srrctl |= E1000_SRRCTL_TIMESTAMP;
4669         /* Only set Drop Enable if VFs allocated, or we are supporting multiple
4670          * queues and rx flow control is disabled
4671          */
4672         if (adapter->vfs_allocated_count ||
4673             (!(hw->fc.current_mode & e1000_fc_rx_pause) &&
4674              adapter->num_rx_queues > 1))
4675                 srrctl |= E1000_SRRCTL_DROP_EN;
4676
4677         wr32(E1000_SRRCTL(reg_idx), srrctl);
4678 }
4679
4680 /**
4681  *  igb_configure_rx_ring - Configure a receive ring after Reset
4682  *  @adapter: board private structure
4683  *  @ring: receive ring to be configured
4684  *
4685  *  Configure the Rx unit of the MAC after a reset.
4686  **/
4687 void igb_configure_rx_ring(struct igb_adapter *adapter,
4688                            struct igb_ring *ring)
4689 {
4690         struct e1000_hw *hw = &adapter->hw;
4691         union e1000_adv_rx_desc *rx_desc;
4692         u64 rdba = ring->dma;
4693         int reg_idx = ring->reg_idx;
4694         u32 rxdctl = 0;
4695
4696         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4697         WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4698                                            MEM_TYPE_PAGE_SHARED, NULL));
4699
4700         /* disable the queue */
4701         wr32(E1000_RXDCTL(reg_idx), 0);
4702
4703         /* Set DMA base address registers */
4704         wr32(E1000_RDBAL(reg_idx),
4705              rdba & 0x00000000ffffffffULL);
4706         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4707         wr32(E1000_RDLEN(reg_idx),
4708              ring->count * sizeof(union e1000_adv_rx_desc));
4709
4710         /* initialize head and tail */
4711         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4712         wr32(E1000_RDH(reg_idx), 0);
4713         writel(0, ring->tail);
4714
4715         /* set descriptor configuration */
4716         igb_setup_srrctl(adapter, ring);
4717
4718         /* set filtering for VMDQ pools */
4719         igb_set_vmolr(adapter, reg_idx & 0x7, true);
4720
4721         rxdctl |= IGB_RX_PTHRESH;
4722         rxdctl |= IGB_RX_HTHRESH << 8;
4723         rxdctl |= IGB_RX_WTHRESH << 16;
4724
4725         /* initialize rx_buffer_info */
4726         memset(ring->rx_buffer_info, 0,
4727                sizeof(struct igb_rx_buffer) * ring->count);
4728
4729         /* initialize Rx descriptor 0 */
4730         rx_desc = IGB_RX_DESC(ring, 0);
4731         rx_desc->wb.upper.length = 0;
4732
4733         /* enable receive descriptor fetching */
4734         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4735         wr32(E1000_RXDCTL(reg_idx), rxdctl);
4736 }
4737
4738 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4739                                   struct igb_ring *rx_ring)
4740 {
4741         /* set build_skb and buffer size flags */
4742         clear_ring_build_skb_enabled(rx_ring);
4743         clear_ring_uses_large_buffer(rx_ring);
4744
4745         if (adapter->flags & IGB_FLAG_RX_LEGACY)
4746                 return;
4747
4748         set_ring_build_skb_enabled(rx_ring);
4749
4750 #if (PAGE_SIZE < 8192)
4751         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4752                 return;
4753
4754         set_ring_uses_large_buffer(rx_ring);
4755 #endif
4756 }
4757
4758 /**
4759  *  igb_configure_rx - Configure receive Unit after Reset
4760  *  @adapter: board private structure
4761  *
4762  *  Configure the Rx unit of the MAC after a reset.
4763  **/
4764 static void igb_configure_rx(struct igb_adapter *adapter)
4765 {
4766         int i;
4767
4768         /* set the correct pool for the PF default MAC address in entry 0 */
4769         igb_set_default_mac_filter(adapter);
4770
4771         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4772          * the Base and Length of the Rx Descriptor Ring
4773          */
4774         for (i = 0; i < adapter->num_rx_queues; i++) {
4775                 struct igb_ring *rx_ring = adapter->rx_ring[i];
4776
4777                 igb_set_rx_buffer_len(adapter, rx_ring);
4778                 igb_configure_rx_ring(adapter, rx_ring);
4779         }
4780 }
4781
4782 /**
4783  *  igb_free_tx_resources - Free Tx Resources per Queue
4784  *  @tx_ring: Tx descriptor ring for a specific queue
4785  *
4786  *  Free all transmit software resources
4787  **/
4788 void igb_free_tx_resources(struct igb_ring *tx_ring)
4789 {
4790         igb_clean_tx_ring(tx_ring);
4791
4792         vfree(tx_ring->tx_buffer_info);
4793         tx_ring->tx_buffer_info = NULL;
4794
4795         /* if not set, then don't free */
4796         if (!tx_ring->desc)
4797                 return;
4798
4799         dma_free_coherent(tx_ring->dev, tx_ring->size,
4800                           tx_ring->desc, tx_ring->dma);
4801
4802         tx_ring->desc = NULL;
4803 }
4804
4805 /**
4806  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
4807  *  @adapter: board private structure
4808  *
4809  *  Free all transmit software resources
4810  **/
4811 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4812 {
4813         int i;
4814
4815         for (i = 0; i < adapter->num_tx_queues; i++)
4816                 if (adapter->tx_ring[i])
4817                         igb_free_tx_resources(adapter->tx_ring[i]);
4818 }
4819
4820 /**
4821  *  igb_clean_tx_ring - Free Tx Buffers
4822  *  @tx_ring: ring to be cleaned
4823  **/
4824 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4825 {
4826         u16 i = tx_ring->next_to_clean;
4827         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4828
4829         while (i != tx_ring->next_to_use) {
4830                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4831
4832                 /* Free all the Tx ring sk_buffs or xdp frames */
4833                 if (tx_buffer->type == IGB_TYPE_SKB)
4834                         dev_kfree_skb_any(tx_buffer->skb);
4835                 else
4836                         xdp_return_frame(tx_buffer->xdpf);
4837
4838                 /* unmap skb header data */
4839                 dma_unmap_single(tx_ring->dev,
4840                                  dma_unmap_addr(tx_buffer, dma),
4841                                  dma_unmap_len(tx_buffer, len),
4842                                  DMA_TO_DEVICE);
4843
4844                 /* check for eop_desc to determine the end of the packet */
4845                 eop_desc = tx_buffer->next_to_watch;
4846                 tx_desc = IGB_TX_DESC(tx_ring, i);
4847
4848                 /* unmap remaining buffers */
4849                 while (tx_desc != eop_desc) {
4850                         tx_buffer++;
4851                         tx_desc++;
4852                         i++;
4853                         if (unlikely(i == tx_ring->count)) {
4854                                 i = 0;
4855                                 tx_buffer = tx_ring->tx_buffer_info;
4856                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4857                         }
4858
4859                         /* unmap any remaining paged data */
4860                         if (dma_unmap_len(tx_buffer, len))
4861                                 dma_unmap_page(tx_ring->dev,
4862                                                dma_unmap_addr(tx_buffer, dma),
4863                                                dma_unmap_len(tx_buffer, len),
4864                                                DMA_TO_DEVICE);
4865                 }
4866
4867                 tx_buffer->next_to_watch = NULL;
4868
4869                 /* move us one more past the eop_desc for start of next pkt */
4870                 tx_buffer++;
4871                 i++;
4872                 if (unlikely(i == tx_ring->count)) {
4873                         i = 0;
4874                         tx_buffer = tx_ring->tx_buffer_info;
4875                 }
4876         }
4877
4878         /* reset BQL for queue */
4879         netdev_tx_reset_queue(txring_txq(tx_ring));
4880
4881         /* reset next_to_use and next_to_clean */
4882         tx_ring->next_to_use = 0;
4883         tx_ring->next_to_clean = 0;
4884 }
4885
4886 /**
4887  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4888  *  @adapter: board private structure
4889  **/
4890 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4891 {
4892         int i;
4893
4894         for (i = 0; i < adapter->num_tx_queues; i++)
4895                 if (adapter->tx_ring[i])
4896                         igb_clean_tx_ring(adapter->tx_ring[i]);
4897 }
4898
4899 /**
4900  *  igb_free_rx_resources - Free Rx Resources
4901  *  @rx_ring: ring to clean the resources from
4902  *
4903  *  Free all receive software resources
4904  **/
4905 void igb_free_rx_resources(struct igb_ring *rx_ring)
4906 {
4907         igb_clean_rx_ring(rx_ring);
4908
4909         rx_ring->xdp_prog = NULL;
4910         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4911         vfree(rx_ring->rx_buffer_info);
4912         rx_ring->rx_buffer_info = NULL;
4913
4914         /* if not set, then don't free */
4915         if (!rx_ring->desc)
4916                 return;
4917
4918         dma_free_coherent(rx_ring->dev, rx_ring->size,
4919                           rx_ring->desc, rx_ring->dma);
4920
4921         rx_ring->desc = NULL;
4922 }
4923
4924 /**
4925  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4926  *  @adapter: board private structure
4927  *
4928  *  Free all receive software resources
4929  **/
4930 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4931 {
4932         int i;
4933
4934         for (i = 0; i < adapter->num_rx_queues; i++)
4935                 if (adapter->rx_ring[i])
4936                         igb_free_rx_resources(adapter->rx_ring[i]);
4937 }
4938
4939 /**
4940  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4941  *  @rx_ring: ring to free buffers from
4942  **/
4943 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4944 {
4945         u16 i = rx_ring->next_to_clean;
4946
4947         dev_kfree_skb(rx_ring->skb);
4948         rx_ring->skb = NULL;
4949
4950         /* Free all the Rx ring sk_buffs */
4951         while (i != rx_ring->next_to_alloc) {
4952                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4953
4954                 /* Invalidate cache lines that may have been written to by
4955                  * device so that we avoid corrupting memory.
4956                  */
4957                 dma_sync_single_range_for_cpu(rx_ring->dev,
4958                                               buffer_info->dma,
4959                                               buffer_info->page_offset,
4960                                               igb_rx_bufsz(rx_ring),
4961                                               DMA_FROM_DEVICE);
4962
4963                 /* free resources associated with mapping */
4964                 dma_unmap_page_attrs(rx_ring->dev,
4965                                      buffer_info->dma,
4966                                      igb_rx_pg_size(rx_ring),
4967                                      DMA_FROM_DEVICE,
4968                                      IGB_RX_DMA_ATTR);
4969                 __page_frag_cache_drain(buffer_info->page,
4970                                         buffer_info->pagecnt_bias);
4971
4972                 i++;
4973                 if (i == rx_ring->count)
4974                         i = 0;
4975         }
4976
4977         rx_ring->next_to_alloc = 0;
4978         rx_ring->next_to_clean = 0;
4979         rx_ring->next_to_use = 0;
4980 }
4981
4982 /**
4983  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
4984  *  @adapter: board private structure
4985  **/
4986 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4987 {
4988         int i;
4989
4990         for (i = 0; i < adapter->num_rx_queues; i++)
4991                 if (adapter->rx_ring[i])
4992                         igb_clean_rx_ring(adapter->rx_ring[i]);
4993 }
4994
4995 /**
4996  *  igb_set_mac - Change the Ethernet Address of the NIC
4997  *  @netdev: network interface device structure
4998  *  @p: pointer to an address structure
4999  *
5000  *  Returns 0 on success, negative on failure
5001  **/
5002 static int igb_set_mac(struct net_device *netdev, void *p)
5003 {
5004         struct igb_adapter *adapter = netdev_priv(netdev);
5005         struct e1000_hw *hw = &adapter->hw;
5006         struct sockaddr *addr = p;
5007
5008         if (!is_valid_ether_addr(addr->sa_data))
5009                 return -EADDRNOTAVAIL;
5010
5011         eth_hw_addr_set(netdev, addr->sa_data);
5012         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
5013
5014         /* set the correct pool for the new PF MAC address in entry 0 */
5015         igb_set_default_mac_filter(adapter);
5016
5017         return 0;
5018 }
5019
5020 /**
5021  *  igb_write_mc_addr_list - write multicast addresses to MTA
5022  *  @netdev: network interface device structure
5023  *
5024  *  Writes multicast address list to the MTA hash table.
5025  *  Returns: -ENOMEM on failure
5026  *           0 on no addresses written
5027  *           X on writing X addresses to MTA
5028  **/
5029 static int igb_write_mc_addr_list(struct net_device *netdev)
5030 {
5031         struct igb_adapter *adapter = netdev_priv(netdev);
5032         struct e1000_hw *hw = &adapter->hw;
5033         struct netdev_hw_addr *ha;
5034         u8  *mta_list;
5035         int i;
5036
5037         if (netdev_mc_empty(netdev)) {
5038                 /* nothing to program, so clear mc list */
5039                 igb_update_mc_addr_list(hw, NULL, 0);
5040                 igb_restore_vf_multicasts(adapter);
5041                 return 0;
5042         }
5043
5044         mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
5045         if (!mta_list)
5046                 return -ENOMEM;
5047
5048         /* The shared function expects a packed array of only addresses. */
5049         i = 0;
5050         netdev_for_each_mc_addr(ha, netdev)
5051                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
5052
5053         igb_update_mc_addr_list(hw, mta_list, i);
5054         kfree(mta_list);
5055
5056         return netdev_mc_count(netdev);
5057 }
5058
5059 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
5060 {
5061         struct e1000_hw *hw = &adapter->hw;
5062         u32 i, pf_id;
5063
5064         switch (hw->mac.type) {
5065         case e1000_i210:
5066         case e1000_i211:
5067         case e1000_i350:
5068                 /* VLAN filtering needed for VLAN prio filter */
5069                 if (adapter->netdev->features & NETIF_F_NTUPLE)
5070                         break;
5071                 fallthrough;
5072         case e1000_82576:
5073         case e1000_82580:
5074         case e1000_i354:
5075                 /* VLAN filtering needed for pool filtering */
5076                 if (adapter->vfs_allocated_count)
5077                         break;
5078                 fallthrough;
5079         default:
5080                 return 1;
5081         }
5082
5083         /* We are already in VLAN promisc, nothing to do */
5084         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
5085                 return 0;
5086
5087         if (!adapter->vfs_allocated_count)
5088                 goto set_vfta;
5089
5090         /* Add PF to all active pools */
5091         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5092
5093         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5094                 u32 vlvf = rd32(E1000_VLVF(i));
5095
5096                 vlvf |= BIT(pf_id);
5097                 wr32(E1000_VLVF(i), vlvf);
5098         }
5099
5100 set_vfta:
5101         /* Set all bits in the VLAN filter table array */
5102         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
5103                 hw->mac.ops.write_vfta(hw, i, ~0U);
5104
5105         /* Set flag so we don't redo unnecessary work */
5106         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
5107
5108         return 0;
5109 }
5110
5111 #define VFTA_BLOCK_SIZE 8
5112 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
5113 {
5114         struct e1000_hw *hw = &adapter->hw;
5115         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
5116         u32 vid_start = vfta_offset * 32;
5117         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
5118         u32 i, vid, word, bits, pf_id;
5119
5120         /* guarantee that we don't scrub out management VLAN */
5121         vid = adapter->mng_vlan_id;
5122         if (vid >= vid_start && vid < vid_end)
5123                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5124
5125         if (!adapter->vfs_allocated_count)
5126                 goto set_vfta;
5127
5128         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5129
5130         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5131                 u32 vlvf = rd32(E1000_VLVF(i));
5132
5133                 /* pull VLAN ID from VLVF */
5134                 vid = vlvf & VLAN_VID_MASK;
5135
5136                 /* only concern ourselves with a certain range */
5137                 if (vid < vid_start || vid >= vid_end)
5138                         continue;
5139
5140                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
5141                         /* record VLAN ID in VFTA */
5142                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5143
5144                         /* if PF is part of this then continue */
5145                         if (test_bit(vid, adapter->active_vlans))
5146                                 continue;
5147                 }
5148
5149                 /* remove PF from the pool */
5150                 bits = ~BIT(pf_id);
5151                 bits &= rd32(E1000_VLVF(i));
5152                 wr32(E1000_VLVF(i), bits);
5153         }
5154
5155 set_vfta:
5156         /* extract values from active_vlans and write back to VFTA */
5157         for (i = VFTA_BLOCK_SIZE; i--;) {
5158                 vid = (vfta_offset + i) * 32;
5159                 word = vid / BITS_PER_LONG;
5160                 bits = vid % BITS_PER_LONG;
5161
5162                 vfta[i] |= adapter->active_vlans[word] >> bits;
5163
5164                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
5165         }
5166 }
5167
5168 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
5169 {
5170         u32 i;
5171
5172         /* We are not in VLAN promisc, nothing to do */
5173         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
5174                 return;
5175
5176         /* Set flag so we don't redo unnecessary work */
5177         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
5178
5179         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
5180                 igb_scrub_vfta(adapter, i);
5181 }
5182
5183 /**
5184  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
5185  *  @netdev: network interface device structure
5186  *
5187  *  The set_rx_mode entry point is called whenever the unicast or multicast
5188  *  address lists or the network interface flags are updated.  This routine is
5189  *  responsible for configuring the hardware for proper unicast, multicast,
5190  *  promiscuous mode, and all-multi behavior.
5191  **/
5192 static void igb_set_rx_mode(struct net_device *netdev)
5193 {
5194         struct igb_adapter *adapter = netdev_priv(netdev);
5195         struct e1000_hw *hw = &adapter->hw;
5196         unsigned int vfn = adapter->vfs_allocated_count;
5197         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
5198         int count;
5199
5200         /* Check for Promiscuous and All Multicast modes */
5201         if (netdev->flags & IFF_PROMISC) {
5202                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
5203                 vmolr |= E1000_VMOLR_MPME;
5204
5205                 /* enable use of UTA filter to force packets to default pool */
5206                 if (hw->mac.type == e1000_82576)
5207                         vmolr |= E1000_VMOLR_ROPE;
5208         } else {
5209                 if (netdev->flags & IFF_ALLMULTI) {
5210                         rctl |= E1000_RCTL_MPE;
5211                         vmolr |= E1000_VMOLR_MPME;
5212                 } else {
5213                         /* Write addresses to the MTA, if the attempt fails
5214                          * then we should just turn on promiscuous mode so
5215                          * that we can at least receive multicast traffic
5216                          */
5217                         count = igb_write_mc_addr_list(netdev);
5218                         if (count < 0) {
5219                                 rctl |= E1000_RCTL_MPE;
5220                                 vmolr |= E1000_VMOLR_MPME;
5221                         } else if (count) {
5222                                 vmolr |= E1000_VMOLR_ROMPE;
5223                         }
5224                 }
5225         }
5226
5227         /* Write addresses to available RAR registers, if there is not
5228          * sufficient space to store all the addresses then enable
5229          * unicast promiscuous mode
5230          */
5231         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5232                 rctl |= E1000_RCTL_UPE;
5233                 vmolr |= E1000_VMOLR_ROPE;
5234         }
5235
5236         /* enable VLAN filtering by default */
5237         rctl |= E1000_RCTL_VFE;
5238
5239         /* disable VLAN filtering for modes that require it */
5240         if ((netdev->flags & IFF_PROMISC) ||
5241             (netdev->features & NETIF_F_RXALL)) {
5242                 /* if we fail to set all rules then just clear VFE */
5243                 if (igb_vlan_promisc_enable(adapter))
5244                         rctl &= ~E1000_RCTL_VFE;
5245         } else {
5246                 igb_vlan_promisc_disable(adapter);
5247         }
5248
5249         /* update state of unicast, multicast, and VLAN filtering modes */
5250         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5251                                      E1000_RCTL_VFE);
5252         wr32(E1000_RCTL, rctl);
5253
5254 #if (PAGE_SIZE < 8192)
5255         if (!adapter->vfs_allocated_count) {
5256                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5257                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
5258         }
5259 #endif
5260         wr32(E1000_RLPML, rlpml);
5261
5262         /* In order to support SR-IOV and eventually VMDq it is necessary to set
5263          * the VMOLR to enable the appropriate modes.  Without this workaround
5264          * we will have issues with VLAN tag stripping not being done for frames
5265          * that are only arriving because we are the default pool
5266          */
5267         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5268                 return;
5269
5270         /* set UTA to appropriate mode */
5271         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5272
5273         vmolr |= rd32(E1000_VMOLR(vfn)) &
5274                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5275
5276         /* enable Rx jumbo frames, restrict as needed to support build_skb */
5277         vmolr &= ~E1000_VMOLR_RLPML_MASK;
5278 #if (PAGE_SIZE < 8192)
5279         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5280                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5281         else
5282 #endif
5283                 vmolr |= MAX_JUMBO_FRAME_SIZE;
5284         vmolr |= E1000_VMOLR_LPE;
5285
5286         wr32(E1000_VMOLR(vfn), vmolr);
5287
5288         igb_restore_vf_multicasts(adapter);
5289 }
5290
5291 static void igb_check_wvbr(struct igb_adapter *adapter)
5292 {
5293         struct e1000_hw *hw = &adapter->hw;
5294         u32 wvbr = 0;
5295
5296         switch (hw->mac.type) {
5297         case e1000_82576:
5298         case e1000_i350:
5299                 wvbr = rd32(E1000_WVBR);
5300                 if (!wvbr)
5301                         return;
5302                 break;
5303         default:
5304                 break;
5305         }
5306
5307         adapter->wvbr |= wvbr;
5308 }
5309
5310 #define IGB_STAGGERED_QUEUE_OFFSET 8
5311
5312 static void igb_spoof_check(struct igb_adapter *adapter)
5313 {
5314         int j;
5315
5316         if (!adapter->wvbr)
5317                 return;
5318
5319         for (j = 0; j < adapter->vfs_allocated_count; j++) {
5320                 if (adapter->wvbr & BIT(j) ||
5321                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5322                         dev_warn(&adapter->pdev->dev,
5323                                 "Spoof event(s) detected on VF %d\n", j);
5324                         adapter->wvbr &=
5325                                 ~(BIT(j) |
5326                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5327                 }
5328         }
5329 }
5330
5331 /* Need to wait a few seconds after link up to get diagnostic information from
5332  * the phy
5333  */
5334 static void igb_update_phy_info(struct timer_list *t)
5335 {
5336         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5337         igb_get_phy_info(&adapter->hw);
5338 }
5339
5340 /**
5341  *  igb_has_link - check shared code for link and determine up/down
5342  *  @adapter: pointer to driver private info
5343  **/
5344 bool igb_has_link(struct igb_adapter *adapter)
5345 {
5346         struct e1000_hw *hw = &adapter->hw;
5347         bool link_active = false;
5348
5349         /* get_link_status is set on LSC (link status) interrupt or
5350          * rx sequence error interrupt.  get_link_status will stay
5351          * false until the e1000_check_for_link establishes link
5352          * for copper adapters ONLY
5353          */
5354         switch (hw->phy.media_type) {
5355         case e1000_media_type_copper:
5356                 if (!hw->mac.get_link_status)
5357                         return true;
5358                 fallthrough;
5359         case e1000_media_type_internal_serdes:
5360                 hw->mac.ops.check_for_link(hw);
5361                 link_active = !hw->mac.get_link_status;
5362                 break;
5363         default:
5364         case e1000_media_type_unknown:
5365                 break;
5366         }
5367
5368         if (((hw->mac.type == e1000_i210) ||
5369              (hw->mac.type == e1000_i211)) &&
5370              (hw->phy.id == I210_I_PHY_ID)) {
5371                 if (!netif_carrier_ok(adapter->netdev)) {
5372                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5373                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5374                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5375                         adapter->link_check_timeout = jiffies;
5376                 }
5377         }
5378
5379         return link_active;
5380 }
5381
5382 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5383 {
5384         bool ret = false;
5385         u32 ctrl_ext, thstat;
5386
5387         /* check for thermal sensor event on i350 copper only */
5388         if (hw->mac.type == e1000_i350) {
5389                 thstat = rd32(E1000_THSTAT);
5390                 ctrl_ext = rd32(E1000_CTRL_EXT);
5391
5392                 if ((hw->phy.media_type == e1000_media_type_copper) &&
5393                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5394                         ret = !!(thstat & event);
5395         }
5396
5397         return ret;
5398 }
5399
5400 /**
5401  *  igb_check_lvmmc - check for malformed packets received
5402  *  and indicated in LVMMC register
5403  *  @adapter: pointer to adapter
5404  **/
5405 static void igb_check_lvmmc(struct igb_adapter *adapter)
5406 {
5407         struct e1000_hw *hw = &adapter->hw;
5408         u32 lvmmc;
5409
5410         lvmmc = rd32(E1000_LVMMC);
5411         if (lvmmc) {
5412                 if (unlikely(net_ratelimit())) {
5413                         netdev_warn(adapter->netdev,
5414                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5415                                     lvmmc);
5416                 }
5417         }
5418 }
5419
5420 /**
5421  *  igb_watchdog - Timer Call-back
5422  *  @t: pointer to timer_list containing our private info pointer
5423  **/
5424 static void igb_watchdog(struct timer_list *t)
5425 {
5426         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5427         /* Do the rest outside of interrupt context */
5428         schedule_work(&adapter->watchdog_task);
5429 }
5430
5431 static void igb_watchdog_task(struct work_struct *work)
5432 {
5433         struct igb_adapter *adapter = container_of(work,
5434                                                    struct igb_adapter,
5435                                                    watchdog_task);
5436         struct e1000_hw *hw = &adapter->hw;
5437         struct e1000_phy_info *phy = &hw->phy;
5438         struct net_device *netdev = adapter->netdev;
5439         u32 link;
5440         int i;
5441         u32 connsw;
5442         u16 phy_data, retry_count = 20;
5443
5444         link = igb_has_link(adapter);
5445
5446         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5447                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5448                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5449                 else
5450                         link = false;
5451         }
5452
5453         /* Force link down if we have fiber to swap to */
5454         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5455                 if (hw->phy.media_type == e1000_media_type_copper) {
5456                         connsw = rd32(E1000_CONNSW);
5457                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5458                                 link = 0;
5459                 }
5460         }
5461         if (link) {
5462                 /* Perform a reset if the media type changed. */
5463                 if (hw->dev_spec._82575.media_changed) {
5464                         hw->dev_spec._82575.media_changed = false;
5465                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
5466                         igb_reset(adapter);
5467                 }
5468                 /* Cancel scheduled suspend requests. */
5469                 pm_runtime_resume(netdev->dev.parent);
5470
5471                 if (!netif_carrier_ok(netdev)) {
5472                         u32 ctrl;
5473
5474                         hw->mac.ops.get_speed_and_duplex(hw,
5475                                                          &adapter->link_speed,
5476                                                          &adapter->link_duplex);
5477
5478                         ctrl = rd32(E1000_CTRL);
5479                         /* Links status message must follow this format */
5480                         netdev_info(netdev,
5481                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5482                                netdev->name,
5483                                adapter->link_speed,
5484                                adapter->link_duplex == FULL_DUPLEX ?
5485                                "Full" : "Half",
5486                                (ctrl & E1000_CTRL_TFCE) &&
5487                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5488                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
5489                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
5490
5491                         /* disable EEE if enabled */
5492                         if ((adapter->flags & IGB_FLAG_EEE) &&
5493                                 (adapter->link_duplex == HALF_DUPLEX)) {
5494                                 dev_info(&adapter->pdev->dev,
5495                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5496                                 adapter->hw.dev_spec._82575.eee_disable = true;
5497                                 adapter->flags &= ~IGB_FLAG_EEE;
5498                         }
5499
5500                         /* check if SmartSpeed worked */
5501                         igb_check_downshift(hw);
5502                         if (phy->speed_downgraded)
5503                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5504
5505                         /* check for thermal sensor event */
5506                         if (igb_thermal_sensor_event(hw,
5507                             E1000_THSTAT_LINK_THROTTLE))
5508                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5509
5510                         /* adjust timeout factor according to speed/duplex */
5511                         adapter->tx_timeout_factor = 1;
5512                         switch (adapter->link_speed) {
5513                         case SPEED_10:
5514                                 adapter->tx_timeout_factor = 14;
5515                                 break;
5516                         case SPEED_100:
5517                                 /* maybe add some timeout factor ? */
5518                                 break;
5519                         }
5520
5521                         if (adapter->link_speed != SPEED_1000 ||
5522                             !hw->phy.ops.read_reg)
5523                                 goto no_wait;
5524
5525                         /* wait for Remote receiver status OK */
5526 retry_read_status:
5527                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5528                                               &phy_data)) {
5529                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5530                                     retry_count) {
5531                                         msleep(100);
5532                                         retry_count--;
5533                                         goto retry_read_status;
5534                                 } else if (!retry_count) {
5535                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5536                                 }
5537                         } else {
5538                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5539                         }
5540 no_wait:
5541                         netif_carrier_on(netdev);
5542
5543                         igb_ping_all_vfs(adapter);
5544                         igb_check_vf_rate_limit(adapter);
5545
5546                         /* link state has changed, schedule phy info update */
5547                         if (!test_bit(__IGB_DOWN, &adapter->state))
5548                                 mod_timer(&adapter->phy_info_timer,
5549                                           round_jiffies(jiffies + 2 * HZ));
5550                 }
5551         } else {
5552                 if (netif_carrier_ok(netdev)) {
5553                         adapter->link_speed = 0;
5554                         adapter->link_duplex = 0;
5555
5556                         /* check for thermal sensor event */
5557                         if (igb_thermal_sensor_event(hw,
5558                             E1000_THSTAT_PWR_DOWN)) {
5559                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5560                         }
5561
5562                         /* Links status message must follow this format */
5563                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
5564                                netdev->name);
5565                         netif_carrier_off(netdev);
5566
5567                         igb_ping_all_vfs(adapter);
5568
5569                         /* link state has changed, schedule phy info update */
5570                         if (!test_bit(__IGB_DOWN, &adapter->state))
5571                                 mod_timer(&adapter->phy_info_timer,
5572                                           round_jiffies(jiffies + 2 * HZ));
5573
5574                         /* link is down, time to check for alternate media */
5575                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5576                                 igb_check_swap_media(adapter);
5577                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5578                                         schedule_work(&adapter->reset_task);
5579                                         /* return immediately */
5580                                         return;
5581                                 }
5582                         }
5583                         pm_schedule_suspend(netdev->dev.parent,
5584                                             MSEC_PER_SEC * 5);
5585
5586                 /* also check for alternate media here */
5587                 } else if (!netif_carrier_ok(netdev) &&
5588                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5589                         igb_check_swap_media(adapter);
5590                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5591                                 schedule_work(&adapter->reset_task);
5592                                 /* return immediately */
5593                                 return;
5594                         }
5595                 }
5596         }
5597
5598         spin_lock(&adapter->stats64_lock);
5599         igb_update_stats(adapter);
5600         spin_unlock(&adapter->stats64_lock);
5601
5602         for (i = 0; i < adapter->num_tx_queues; i++) {
5603                 struct igb_ring *tx_ring = adapter->tx_ring[i];
5604                 if (!netif_carrier_ok(netdev)) {
5605                         /* We've lost link, so the controller stops DMA,
5606                          * but we've got queued Tx work that's never going
5607                          * to get done, so reset controller to flush Tx.
5608                          * (Do the reset outside of interrupt context).
5609                          */
5610                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5611                                 adapter->tx_timeout_count++;
5612                                 schedule_work(&adapter->reset_task);
5613                                 /* return immediately since reset is imminent */
5614                                 return;
5615                         }
5616                 }
5617
5618                 /* Force detection of hung controller every watchdog period */
5619                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5620         }
5621
5622         /* Cause software interrupt to ensure Rx ring is cleaned */
5623         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5624                 u32 eics = 0;
5625
5626                 for (i = 0; i < adapter->num_q_vectors; i++)
5627                         eics |= adapter->q_vector[i]->eims_value;
5628                 wr32(E1000_EICS, eics);
5629         } else {
5630                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5631         }
5632
5633         igb_spoof_check(adapter);
5634         igb_ptp_rx_hang(adapter);
5635         igb_ptp_tx_hang(adapter);
5636
5637         /* Check LVMMC register on i350/i354 only */
5638         if ((adapter->hw.mac.type == e1000_i350) ||
5639             (adapter->hw.mac.type == e1000_i354))
5640                 igb_check_lvmmc(adapter);
5641
5642         /* Reset the timer */
5643         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5644                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5645                         mod_timer(&adapter->watchdog_timer,
5646                                   round_jiffies(jiffies +  HZ));
5647                 else
5648                         mod_timer(&adapter->watchdog_timer,
5649                                   round_jiffies(jiffies + 2 * HZ));
5650         }
5651 }
5652
5653 enum latency_range {
5654         lowest_latency = 0,
5655         low_latency = 1,
5656         bulk_latency = 2,
5657         latency_invalid = 255
5658 };
5659
5660 /**
5661  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
5662  *  @q_vector: pointer to q_vector
5663  *
5664  *  Stores a new ITR value based on strictly on packet size.  This
5665  *  algorithm is less sophisticated than that used in igb_update_itr,
5666  *  due to the difficulty of synchronizing statistics across multiple
5667  *  receive rings.  The divisors and thresholds used by this function
5668  *  were determined based on theoretical maximum wire speed and testing
5669  *  data, in order to minimize response time while increasing bulk
5670  *  throughput.
5671  *  This functionality is controlled by ethtool's coalescing settings.
5672  *  NOTE:  This function is called only when operating in a multiqueue
5673  *         receive environment.
5674  **/
5675 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5676 {
5677         int new_val = q_vector->itr_val;
5678         int avg_wire_size = 0;
5679         struct igb_adapter *adapter = q_vector->adapter;
5680         unsigned int packets;
5681
5682         /* For non-gigabit speeds, just fix the interrupt rate at 4000
5683          * ints/sec - ITR timer value of 120 ticks.
5684          */
5685         if (adapter->link_speed != SPEED_1000) {
5686                 new_val = IGB_4K_ITR;
5687                 goto set_itr_val;
5688         }
5689
5690         packets = q_vector->rx.total_packets;
5691         if (packets)
5692                 avg_wire_size = q_vector->rx.total_bytes / packets;
5693
5694         packets = q_vector->tx.total_packets;
5695         if (packets)
5696                 avg_wire_size = max_t(u32, avg_wire_size,
5697                                       q_vector->tx.total_bytes / packets);
5698
5699         /* if avg_wire_size isn't set no work was done */
5700         if (!avg_wire_size)
5701                 goto clear_counts;
5702
5703         /* Add 24 bytes to size to account for CRC, preamble, and gap */
5704         avg_wire_size += 24;
5705
5706         /* Don't starve jumbo frames */
5707         avg_wire_size = min(avg_wire_size, 3000);
5708
5709         /* Give a little boost to mid-size frames */
5710         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5711                 new_val = avg_wire_size / 3;
5712         else
5713                 new_val = avg_wire_size / 2;
5714
5715         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5716         if (new_val < IGB_20K_ITR &&
5717             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5718              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5719                 new_val = IGB_20K_ITR;
5720
5721 set_itr_val:
5722         if (new_val != q_vector->itr_val) {
5723                 q_vector->itr_val = new_val;
5724                 q_vector->set_itr = 1;
5725         }
5726 clear_counts:
5727         q_vector->rx.total_bytes = 0;
5728         q_vector->rx.total_packets = 0;
5729         q_vector->tx.total_bytes = 0;
5730         q_vector->tx.total_packets = 0;
5731 }
5732
5733 /**
5734  *  igb_update_itr - update the dynamic ITR value based on statistics
5735  *  @q_vector: pointer to q_vector
5736  *  @ring_container: ring info to update the itr for
5737  *
5738  *  Stores a new ITR value based on packets and byte
5739  *  counts during the last interrupt.  The advantage of per interrupt
5740  *  computation is faster updates and more accurate ITR for the current
5741  *  traffic pattern.  Constants in this function were computed
5742  *  based on theoretical maximum wire speed and thresholds were set based
5743  *  on testing data as well as attempting to minimize response time
5744  *  while increasing bulk throughput.
5745  *  This functionality is controlled by ethtool's coalescing settings.
5746  *  NOTE:  These calculations are only valid when operating in a single-
5747  *         queue environment.
5748  **/
5749 static void igb_update_itr(struct igb_q_vector *q_vector,
5750                            struct igb_ring_container *ring_container)
5751 {
5752         unsigned int packets = ring_container->total_packets;
5753         unsigned int bytes = ring_container->total_bytes;
5754         u8 itrval = ring_container->itr;
5755
5756         /* no packets, exit with status unchanged */
5757         if (packets == 0)
5758                 return;
5759
5760         switch (itrval) {
5761         case lowest_latency:
5762                 /* handle TSO and jumbo frames */
5763                 if (bytes/packets > 8000)
5764                         itrval = bulk_latency;
5765                 else if ((packets < 5) && (bytes > 512))
5766                         itrval = low_latency;
5767                 break;
5768         case low_latency:  /* 50 usec aka 20000 ints/s */
5769                 if (bytes > 10000) {
5770                         /* this if handles the TSO accounting */
5771                         if (bytes/packets > 8000)
5772                                 itrval = bulk_latency;
5773                         else if ((packets < 10) || ((bytes/packets) > 1200))
5774                                 itrval = bulk_latency;
5775                         else if ((packets > 35))
5776                                 itrval = lowest_latency;
5777                 } else if (bytes/packets > 2000) {
5778                         itrval = bulk_latency;
5779                 } else if (packets <= 2 && bytes < 512) {
5780                         itrval = lowest_latency;
5781                 }
5782                 break;
5783         case bulk_latency: /* 250 usec aka 4000 ints/s */
5784                 if (bytes > 25000) {
5785                         if (packets > 35)
5786                                 itrval = low_latency;
5787                 } else if (bytes < 1500) {
5788                         itrval = low_latency;
5789                 }
5790                 break;
5791         }
5792
5793         /* clear work counters since we have the values we need */
5794         ring_container->total_bytes = 0;
5795         ring_container->total_packets = 0;
5796
5797         /* write updated itr to ring container */
5798         ring_container->itr = itrval;
5799 }
5800
5801 static void igb_set_itr(struct igb_q_vector *q_vector)
5802 {
5803         struct igb_adapter *adapter = q_vector->adapter;
5804         u32 new_itr = q_vector->itr_val;
5805         u8 current_itr = 0;
5806
5807         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5808         if (adapter->link_speed != SPEED_1000) {
5809                 current_itr = 0;
5810                 new_itr = IGB_4K_ITR;
5811                 goto set_itr_now;
5812         }
5813
5814         igb_update_itr(q_vector, &q_vector->tx);
5815         igb_update_itr(q_vector, &q_vector->rx);
5816
5817         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5818
5819         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5820         if (current_itr == lowest_latency &&
5821             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5822              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5823                 current_itr = low_latency;
5824
5825         switch (current_itr) {
5826         /* counts and packets in update_itr are dependent on these numbers */
5827         case lowest_latency:
5828                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5829                 break;
5830         case low_latency:
5831                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5832                 break;
5833         case bulk_latency:
5834                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5835                 break;
5836         default:
5837                 break;
5838         }
5839
5840 set_itr_now:
5841         if (new_itr != q_vector->itr_val) {
5842                 /* this attempts to bias the interrupt rate towards Bulk
5843                  * by adding intermediate steps when interrupt rate is
5844                  * increasing
5845                  */
5846                 new_itr = new_itr > q_vector->itr_val ?
5847                           max((new_itr * q_vector->itr_val) /
5848                           (new_itr + (q_vector->itr_val >> 2)),
5849                           new_itr) : new_itr;
5850                 /* Don't write the value here; it resets the adapter's
5851                  * internal timer, and causes us to delay far longer than
5852                  * we should between interrupts.  Instead, we write the ITR
5853                  * value at the beginning of the next interrupt so the timing
5854                  * ends up being correct.
5855                  */
5856                 q_vector->itr_val = new_itr;
5857                 q_vector->set_itr = 1;
5858         }
5859 }
5860
5861 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5862                             struct igb_tx_buffer *first,
5863                             u32 vlan_macip_lens, u32 type_tucmd,
5864                             u32 mss_l4len_idx)
5865 {
5866         struct e1000_adv_tx_context_desc *context_desc;
5867         u16 i = tx_ring->next_to_use;
5868         struct timespec64 ts;
5869
5870         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5871
5872         i++;
5873         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5874
5875         /* set bits to identify this as an advanced context descriptor */
5876         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5877
5878         /* For 82575, context index must be unique per ring. */
5879         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5880                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5881
5882         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5883         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5884         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5885
5886         /* We assume there is always a valid tx time available. Invalid times
5887          * should have been handled by the upper layers.
5888          */
5889         if (tx_ring->launchtime_enable) {
5890                 ts = ktime_to_timespec64(first->skb->tstamp);
5891                 skb_txtime_consumed(first->skb);
5892                 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5893         } else {
5894                 context_desc->seqnum_seed = 0;
5895         }
5896 }
5897
5898 static int igb_tso(struct igb_ring *tx_ring,
5899                    struct igb_tx_buffer *first,
5900                    u8 *hdr_len)
5901 {
5902         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5903         struct sk_buff *skb = first->skb;
5904         union {
5905                 struct iphdr *v4;
5906                 struct ipv6hdr *v6;
5907                 unsigned char *hdr;
5908         } ip;
5909         union {
5910                 struct tcphdr *tcp;
5911                 struct udphdr *udp;
5912                 unsigned char *hdr;
5913         } l4;
5914         u32 paylen, l4_offset;
5915         int err;
5916
5917         if (skb->ip_summed != CHECKSUM_PARTIAL)
5918                 return 0;
5919
5920         if (!skb_is_gso(skb))
5921                 return 0;
5922
5923         err = skb_cow_head(skb, 0);
5924         if (err < 0)
5925                 return err;
5926
5927         ip.hdr = skb_network_header(skb);
5928         l4.hdr = skb_checksum_start(skb);
5929
5930         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5931         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
5932                       E1000_ADVTXD_TUCMD_L4T_UDP : E1000_ADVTXD_TUCMD_L4T_TCP;
5933
5934         /* initialize outer IP header fields */
5935         if (ip.v4->version == 4) {
5936                 unsigned char *csum_start = skb_checksum_start(skb);
5937                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5938
5939                 /* IP header will have to cancel out any data that
5940                  * is not a part of the outer IP header
5941                  */
5942                 ip.v4->check = csum_fold(csum_partial(trans_start,
5943                                                       csum_start - trans_start,
5944                                                       0));
5945                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5946
5947                 ip.v4->tot_len = 0;
5948                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5949                                    IGB_TX_FLAGS_CSUM |
5950                                    IGB_TX_FLAGS_IPV4;
5951         } else {
5952                 ip.v6->payload_len = 0;
5953                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5954                                    IGB_TX_FLAGS_CSUM;
5955         }
5956
5957         /* determine offset of inner transport header */
5958         l4_offset = l4.hdr - skb->data;
5959
5960         /* remove payload length from inner checksum */
5961         paylen = skb->len - l4_offset;
5962         if (type_tucmd & E1000_ADVTXD_TUCMD_L4T_TCP) {
5963                 /* compute length of segmentation header */
5964                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5965                 csum_replace_by_diff(&l4.tcp->check,
5966                         (__force __wsum)htonl(paylen));
5967         } else {
5968                 /* compute length of segmentation header */
5969                 *hdr_len = sizeof(*l4.udp) + l4_offset;
5970                 csum_replace_by_diff(&l4.udp->check,
5971                                      (__force __wsum)htonl(paylen));
5972         }
5973
5974         /* update gso size and bytecount with header size */
5975         first->gso_segs = skb_shinfo(skb)->gso_segs;
5976         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5977
5978         /* MSS L4LEN IDX */
5979         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5980         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5981
5982         /* VLAN MACLEN IPLEN */
5983         vlan_macip_lens = l4.hdr - ip.hdr;
5984         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5985         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5986
5987         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
5988                         type_tucmd, mss_l4len_idx);
5989
5990         return 1;
5991 }
5992
5993 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5994 {
5995         struct sk_buff *skb = first->skb;
5996         u32 vlan_macip_lens = 0;
5997         u32 type_tucmd = 0;
5998
5999         if (skb->ip_summed != CHECKSUM_PARTIAL) {
6000 csum_failed:
6001                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
6002                     !tx_ring->launchtime_enable)
6003                         return;
6004                 goto no_csum;
6005         }
6006
6007         switch (skb->csum_offset) {
6008         case offsetof(struct tcphdr, check):
6009                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
6010                 fallthrough;
6011         case offsetof(struct udphdr, check):
6012                 break;
6013         case offsetof(struct sctphdr, checksum):
6014                 /* validate that this is actually an SCTP request */
6015                 if (skb_csum_is_sctp(skb)) {
6016                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
6017                         break;
6018                 }
6019                 fallthrough;
6020         default:
6021                 skb_checksum_help(skb);
6022                 goto csum_failed;
6023         }
6024
6025         /* update TX checksum flag */
6026         first->tx_flags |= IGB_TX_FLAGS_CSUM;
6027         vlan_macip_lens = skb_checksum_start_offset(skb) -
6028                           skb_network_offset(skb);
6029 no_csum:
6030         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
6031         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
6032
6033         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
6034 }
6035
6036 #define IGB_SET_FLAG(_input, _flag, _result) \
6037         ((_flag <= _result) ? \
6038          ((u32)(_input & _flag) * (_result / _flag)) : \
6039          ((u32)(_input & _flag) / (_flag / _result)))
6040
6041 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6042 {
6043         /* set type for advanced descriptor with frame checksum insertion */
6044         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
6045                        E1000_ADVTXD_DCMD_DEXT |
6046                        E1000_ADVTXD_DCMD_IFCS;
6047
6048         /* set HW vlan bit if vlan is present */
6049         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
6050                                  (E1000_ADVTXD_DCMD_VLE));
6051
6052         /* set segmentation bits for TSO */
6053         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
6054                                  (E1000_ADVTXD_DCMD_TSE));
6055
6056         /* set timestamp bit if present */
6057         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
6058                                  (E1000_ADVTXD_MAC_TSTAMP));
6059
6060         /* insert frame checksum */
6061         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
6062
6063         return cmd_type;
6064 }
6065
6066 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
6067                                  union e1000_adv_tx_desc *tx_desc,
6068                                  u32 tx_flags, unsigned int paylen)
6069 {
6070         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
6071
6072         /* 82575 requires a unique index per ring */
6073         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6074                 olinfo_status |= tx_ring->reg_idx << 4;
6075
6076         /* insert L4 checksum */
6077         olinfo_status |= IGB_SET_FLAG(tx_flags,
6078                                       IGB_TX_FLAGS_CSUM,
6079                                       (E1000_TXD_POPTS_TXSM << 8));
6080
6081         /* insert IPv4 checksum */
6082         olinfo_status |= IGB_SET_FLAG(tx_flags,
6083                                       IGB_TX_FLAGS_IPV4,
6084                                       (E1000_TXD_POPTS_IXSM << 8));
6085
6086         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6087 }
6088
6089 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6090 {
6091         struct net_device *netdev = tx_ring->netdev;
6092
6093         netif_stop_subqueue(netdev, tx_ring->queue_index);
6094
6095         /* Herbert's original patch had:
6096          *  smp_mb__after_netif_stop_queue();
6097          * but since that doesn't exist yet, just open code it.
6098          */
6099         smp_mb();
6100
6101         /* We need to check again in a case another CPU has just
6102          * made room available.
6103          */
6104         if (igb_desc_unused(tx_ring) < size)
6105                 return -EBUSY;
6106
6107         /* A reprieve! */
6108         netif_wake_subqueue(netdev, tx_ring->queue_index);
6109
6110         u64_stats_update_begin(&tx_ring->tx_syncp2);
6111         tx_ring->tx_stats.restart_queue2++;
6112         u64_stats_update_end(&tx_ring->tx_syncp2);
6113
6114         return 0;
6115 }
6116
6117 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6118 {
6119         if (igb_desc_unused(tx_ring) >= size)
6120                 return 0;
6121         return __igb_maybe_stop_tx(tx_ring, size);
6122 }
6123
6124 static int igb_tx_map(struct igb_ring *tx_ring,
6125                       struct igb_tx_buffer *first,
6126                       const u8 hdr_len)
6127 {
6128         struct sk_buff *skb = first->skb;
6129         struct igb_tx_buffer *tx_buffer;
6130         union e1000_adv_tx_desc *tx_desc;
6131         skb_frag_t *frag;
6132         dma_addr_t dma;
6133         unsigned int data_len, size;
6134         u32 tx_flags = first->tx_flags;
6135         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
6136         u16 i = tx_ring->next_to_use;
6137
6138         tx_desc = IGB_TX_DESC(tx_ring, i);
6139
6140         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
6141
6142         size = skb_headlen(skb);
6143         data_len = skb->data_len;
6144
6145         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6146
6147         tx_buffer = first;
6148
6149         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6150                 if (dma_mapping_error(tx_ring->dev, dma))
6151                         goto dma_error;
6152
6153                 /* record length, and DMA address */
6154                 dma_unmap_len_set(tx_buffer, len, size);
6155                 dma_unmap_addr_set(tx_buffer, dma, dma);
6156
6157                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6158
6159                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
6160                         tx_desc->read.cmd_type_len =
6161                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
6162
6163                         i++;
6164                         tx_desc++;
6165                         if (i == tx_ring->count) {
6166                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6167                                 i = 0;
6168                         }
6169                         tx_desc->read.olinfo_status = 0;
6170
6171                         dma += IGB_MAX_DATA_PER_TXD;
6172                         size -= IGB_MAX_DATA_PER_TXD;
6173
6174                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6175                 }
6176
6177                 if (likely(!data_len))
6178                         break;
6179
6180                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6181
6182                 i++;
6183                 tx_desc++;
6184                 if (i == tx_ring->count) {
6185                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6186                         i = 0;
6187                 }
6188                 tx_desc->read.olinfo_status = 0;
6189
6190                 size = skb_frag_size(frag);
6191                 data_len -= size;
6192
6193                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
6194                                        size, DMA_TO_DEVICE);
6195
6196                 tx_buffer = &tx_ring->tx_buffer_info[i];
6197         }
6198
6199         /* write last descriptor with RS and EOP bits */
6200         cmd_type |= size | IGB_TXD_DCMD;
6201         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6202
6203         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6204
6205         /* set the timestamp */
6206         first->time_stamp = jiffies;
6207
6208         skb_tx_timestamp(skb);
6209
6210         /* Force memory writes to complete before letting h/w know there
6211          * are new descriptors to fetch.  (Only applicable for weak-ordered
6212          * memory model archs, such as IA-64).
6213          *
6214          * We also need this memory barrier to make certain all of the
6215          * status bits have been updated before next_to_watch is written.
6216          */
6217         dma_wmb();
6218
6219         /* set next_to_watch value indicating a packet is present */
6220         first->next_to_watch = tx_desc;
6221
6222         i++;
6223         if (i == tx_ring->count)
6224                 i = 0;
6225
6226         tx_ring->next_to_use = i;
6227
6228         /* Make sure there is space in the ring for the next send. */
6229         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6230
6231         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
6232                 writel(i, tx_ring->tail);
6233         }
6234         return 0;
6235
6236 dma_error:
6237         dev_err(tx_ring->dev, "TX DMA map failed\n");
6238         tx_buffer = &tx_ring->tx_buffer_info[i];
6239
6240         /* clear dma mappings for failed tx_buffer_info map */
6241         while (tx_buffer != first) {
6242                 if (dma_unmap_len(tx_buffer, len))
6243                         dma_unmap_page(tx_ring->dev,
6244                                        dma_unmap_addr(tx_buffer, dma),
6245                                        dma_unmap_len(tx_buffer, len),
6246                                        DMA_TO_DEVICE);
6247                 dma_unmap_len_set(tx_buffer, len, 0);
6248
6249                 if (i-- == 0)
6250                         i += tx_ring->count;
6251                 tx_buffer = &tx_ring->tx_buffer_info[i];
6252         }
6253
6254         if (dma_unmap_len(tx_buffer, len))
6255                 dma_unmap_single(tx_ring->dev,
6256                                  dma_unmap_addr(tx_buffer, dma),
6257                                  dma_unmap_len(tx_buffer, len),
6258                                  DMA_TO_DEVICE);
6259         dma_unmap_len_set(tx_buffer, len, 0);
6260
6261         dev_kfree_skb_any(tx_buffer->skb);
6262         tx_buffer->skb = NULL;
6263
6264         tx_ring->next_to_use = i;
6265
6266         return -1;
6267 }
6268
6269 int igb_xmit_xdp_ring(struct igb_adapter *adapter,
6270                       struct igb_ring *tx_ring,
6271                       struct xdp_frame *xdpf)
6272 {
6273         struct skb_shared_info *sinfo = xdp_get_shared_info_from_frame(xdpf);
6274         u8 nr_frags = unlikely(xdp_frame_has_frags(xdpf)) ? sinfo->nr_frags : 0;
6275         u16 count, i, index = tx_ring->next_to_use;
6276         struct igb_tx_buffer *tx_head = &tx_ring->tx_buffer_info[index];
6277         struct igb_tx_buffer *tx_buffer = tx_head;
6278         union e1000_adv_tx_desc *tx_desc = IGB_TX_DESC(tx_ring, index);
6279         u32 len = xdpf->len, cmd_type, olinfo_status;
6280         void *data = xdpf->data;
6281
6282         count = TXD_USE_COUNT(len);
6283         for (i = 0; i < nr_frags; i++)
6284                 count += TXD_USE_COUNT(skb_frag_size(&sinfo->frags[i]));
6285
6286         if (igb_maybe_stop_tx(tx_ring, count + 3))
6287                 return IGB_XDP_CONSUMED;
6288
6289         i = 0;
6290         /* record the location of the first descriptor for this packet */
6291         tx_head->bytecount = xdp_get_frame_len(xdpf);
6292         tx_head->type = IGB_TYPE_XDP;
6293         tx_head->gso_segs = 1;
6294         tx_head->xdpf = xdpf;
6295
6296         olinfo_status = tx_head->bytecount << E1000_ADVTXD_PAYLEN_SHIFT;
6297         /* 82575 requires a unique index per ring */
6298         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6299                 olinfo_status |= tx_ring->reg_idx << 4;
6300         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6301
6302         for (;;) {
6303                 dma_addr_t dma;
6304
6305                 dma = dma_map_single(tx_ring->dev, data, len, DMA_TO_DEVICE);
6306                 if (dma_mapping_error(tx_ring->dev, dma))
6307                         goto unmap;
6308
6309                 /* record length, and DMA address */
6310                 dma_unmap_len_set(tx_buffer, len, len);
6311                 dma_unmap_addr_set(tx_buffer, dma, dma);
6312
6313                 /* put descriptor type bits */
6314                 cmd_type = E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_DEXT |
6315                            E1000_ADVTXD_DCMD_IFCS | len;
6316
6317                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6318                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6319
6320                 tx_buffer->protocol = 0;
6321
6322                 if (++index == tx_ring->count)
6323                         index = 0;
6324
6325                 if (i == nr_frags)
6326                         break;
6327
6328                 tx_buffer = &tx_ring->tx_buffer_info[index];
6329                 tx_desc = IGB_TX_DESC(tx_ring, index);
6330                 tx_desc->read.olinfo_status = 0;
6331
6332                 data = skb_frag_address(&sinfo->frags[i]);
6333                 len = skb_frag_size(&sinfo->frags[i]);
6334                 i++;
6335         }
6336         tx_desc->read.cmd_type_len |= cpu_to_le32(IGB_TXD_DCMD);
6337
6338         netdev_tx_sent_queue(txring_txq(tx_ring), tx_head->bytecount);
6339         /* set the timestamp */
6340         tx_head->time_stamp = jiffies;
6341
6342         /* Avoid any potential race with xdp_xmit and cleanup */
6343         smp_wmb();
6344
6345         /* set next_to_watch value indicating a packet is present */
6346         tx_head->next_to_watch = tx_desc;
6347         tx_ring->next_to_use = index;
6348
6349         /* Make sure there is space in the ring for the next send. */
6350         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6351
6352         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more())
6353                 writel(index, tx_ring->tail);
6354
6355         return IGB_XDP_TX;
6356
6357 unmap:
6358         for (;;) {
6359                 tx_buffer = &tx_ring->tx_buffer_info[index];
6360                 if (dma_unmap_len(tx_buffer, len))
6361                         dma_unmap_page(tx_ring->dev,
6362                                        dma_unmap_addr(tx_buffer, dma),
6363                                        dma_unmap_len(tx_buffer, len),
6364                                        DMA_TO_DEVICE);
6365                 dma_unmap_len_set(tx_buffer, len, 0);
6366                 if (tx_buffer == tx_head)
6367                         break;
6368
6369                 if (!index)
6370                         index += tx_ring->count;
6371                 index--;
6372         }
6373
6374         return IGB_XDP_CONSUMED;
6375 }
6376
6377 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6378                                 struct igb_ring *tx_ring)
6379 {
6380         struct igb_tx_buffer *first;
6381         int tso;
6382         u32 tx_flags = 0;
6383         unsigned short f;
6384         u16 count = TXD_USE_COUNT(skb_headlen(skb));
6385         __be16 protocol = vlan_get_protocol(skb);
6386         u8 hdr_len = 0;
6387
6388         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6389          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6390          *       + 2 desc gap to keep tail from touching head,
6391          *       + 1 desc for context descriptor,
6392          * otherwise try next time
6393          */
6394         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6395                 count += TXD_USE_COUNT(skb_frag_size(
6396                                                 &skb_shinfo(skb)->frags[f]));
6397
6398         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6399                 /* this is a hard error */
6400                 return NETDEV_TX_BUSY;
6401         }
6402
6403         /* record the location of the first descriptor for this packet */
6404         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6405         first->type = IGB_TYPE_SKB;
6406         first->skb = skb;
6407         first->bytecount = skb->len;
6408         first->gso_segs = 1;
6409
6410         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6411                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6412
6413                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6414                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6415                                            &adapter->state)) {
6416                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6417                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
6418
6419                         adapter->ptp_tx_skb = skb_get(skb);
6420                         adapter->ptp_tx_start = jiffies;
6421                         if (adapter->hw.mac.type == e1000_82576)
6422                                 schedule_work(&adapter->ptp_tx_work);
6423                 } else {
6424                         adapter->tx_hwtstamp_skipped++;
6425                 }
6426         }
6427
6428         if (skb_vlan_tag_present(skb)) {
6429                 tx_flags |= IGB_TX_FLAGS_VLAN;
6430                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6431         }
6432
6433         /* record initial flags and protocol */
6434         first->tx_flags = tx_flags;
6435         first->protocol = protocol;
6436
6437         tso = igb_tso(tx_ring, first, &hdr_len);
6438         if (tso < 0)
6439                 goto out_drop;
6440         else if (!tso)
6441                 igb_tx_csum(tx_ring, first);
6442
6443         if (igb_tx_map(tx_ring, first, hdr_len))
6444                 goto cleanup_tx_tstamp;
6445
6446         return NETDEV_TX_OK;
6447
6448 out_drop:
6449         dev_kfree_skb_any(first->skb);
6450         first->skb = NULL;
6451 cleanup_tx_tstamp:
6452         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6453                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6454
6455                 dev_kfree_skb_any(adapter->ptp_tx_skb);
6456                 adapter->ptp_tx_skb = NULL;
6457                 if (adapter->hw.mac.type == e1000_82576)
6458                         cancel_work_sync(&adapter->ptp_tx_work);
6459                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6460         }
6461
6462         return NETDEV_TX_OK;
6463 }
6464
6465 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6466                                                     struct sk_buff *skb)
6467 {
6468         unsigned int r_idx = skb->queue_mapping;
6469
6470         if (r_idx >= adapter->num_tx_queues)
6471                 r_idx = r_idx % adapter->num_tx_queues;
6472
6473         return adapter->tx_ring[r_idx];
6474 }
6475
6476 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6477                                   struct net_device *netdev)
6478 {
6479         struct igb_adapter *adapter = netdev_priv(netdev);
6480
6481         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6482          * in order to meet this minimum size requirement.
6483          */
6484         if (skb_put_padto(skb, 17))
6485                 return NETDEV_TX_OK;
6486
6487         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6488 }
6489
6490 /**
6491  *  igb_tx_timeout - Respond to a Tx Hang
6492  *  @netdev: network interface device structure
6493  *  @txqueue: number of the Tx queue that hung (unused)
6494  **/
6495 static void igb_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6496 {
6497         struct igb_adapter *adapter = netdev_priv(netdev);
6498         struct e1000_hw *hw = &adapter->hw;
6499
6500         /* Do the reset outside of interrupt context */
6501         adapter->tx_timeout_count++;
6502
6503         if (hw->mac.type >= e1000_82580)
6504                 hw->dev_spec._82575.global_device_reset = true;
6505
6506         schedule_work(&adapter->reset_task);
6507         wr32(E1000_EICS,
6508              (adapter->eims_enable_mask & ~adapter->eims_other));
6509 }
6510
6511 static void igb_reset_task(struct work_struct *work)
6512 {
6513         struct igb_adapter *adapter;
6514         adapter = container_of(work, struct igb_adapter, reset_task);
6515
6516         rtnl_lock();
6517         /* If we're already down or resetting, just bail */
6518         if (test_bit(__IGB_DOWN, &adapter->state) ||
6519             test_bit(__IGB_RESETTING, &adapter->state)) {
6520                 rtnl_unlock();
6521                 return;
6522         }
6523
6524         igb_dump(adapter);
6525         netdev_err(adapter->netdev, "Reset adapter\n");
6526         igb_reinit_locked(adapter);
6527         rtnl_unlock();
6528 }
6529
6530 /**
6531  *  igb_get_stats64 - Get System Network Statistics
6532  *  @netdev: network interface device structure
6533  *  @stats: rtnl_link_stats64 pointer
6534  **/
6535 static void igb_get_stats64(struct net_device *netdev,
6536                             struct rtnl_link_stats64 *stats)
6537 {
6538         struct igb_adapter *adapter = netdev_priv(netdev);
6539
6540         spin_lock(&adapter->stats64_lock);
6541         igb_update_stats(adapter);
6542         memcpy(stats, &adapter->stats64, sizeof(*stats));
6543         spin_unlock(&adapter->stats64_lock);
6544 }
6545
6546 /**
6547  *  igb_change_mtu - Change the Maximum Transfer Unit
6548  *  @netdev: network interface device structure
6549  *  @new_mtu: new value for maximum frame size
6550  *
6551  *  Returns 0 on success, negative on failure
6552  **/
6553 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6554 {
6555         struct igb_adapter *adapter = netdev_priv(netdev);
6556         int max_frame = new_mtu + IGB_ETH_PKT_HDR_PAD;
6557
6558         if (adapter->xdp_prog) {
6559                 int i;
6560
6561                 for (i = 0; i < adapter->num_rx_queues; i++) {
6562                         struct igb_ring *ring = adapter->rx_ring[i];
6563
6564                         if (max_frame > igb_rx_bufsz(ring)) {
6565                                 netdev_warn(adapter->netdev,
6566                                             "Requested MTU size is not supported with XDP. Max frame size is %d\n",
6567                                             max_frame);
6568                                 return -EINVAL;
6569                         }
6570                 }
6571         }
6572
6573         /* adjust max frame to be at least the size of a standard frame */
6574         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6575                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6576
6577         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6578                 usleep_range(1000, 2000);
6579
6580         /* igb_down has a dependency on max_frame_size */
6581         adapter->max_frame_size = max_frame;
6582
6583         if (netif_running(netdev))
6584                 igb_down(adapter);
6585
6586         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6587                    netdev->mtu, new_mtu);
6588         netdev->mtu = new_mtu;
6589
6590         if (netif_running(netdev))
6591                 igb_up(adapter);
6592         else
6593                 igb_reset(adapter);
6594
6595         clear_bit(__IGB_RESETTING, &adapter->state);
6596
6597         return 0;
6598 }
6599
6600 /**
6601  *  igb_update_stats - Update the board statistics counters
6602  *  @adapter: board private structure
6603  **/
6604 void igb_update_stats(struct igb_adapter *adapter)
6605 {
6606         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6607         struct e1000_hw *hw = &adapter->hw;
6608         struct pci_dev *pdev = adapter->pdev;
6609         u32 reg, mpc;
6610         int i;
6611         u64 bytes, packets;
6612         unsigned int start;
6613         u64 _bytes, _packets;
6614
6615         /* Prevent stats update while adapter is being reset, or if the pci
6616          * connection is down.
6617          */
6618         if (adapter->link_speed == 0)
6619                 return;
6620         if (pci_channel_offline(pdev))
6621                 return;
6622
6623         bytes = 0;
6624         packets = 0;
6625
6626         rcu_read_lock();
6627         for (i = 0; i < adapter->num_rx_queues; i++) {
6628                 struct igb_ring *ring = adapter->rx_ring[i];
6629                 u32 rqdpc = rd32(E1000_RQDPC(i));
6630                 if (hw->mac.type >= e1000_i210)
6631                         wr32(E1000_RQDPC(i), 0);
6632
6633                 if (rqdpc) {
6634                         ring->rx_stats.drops += rqdpc;
6635                         net_stats->rx_fifo_errors += rqdpc;
6636                 }
6637
6638                 do {
6639                         start = u64_stats_fetch_begin(&ring->rx_syncp);
6640                         _bytes = ring->rx_stats.bytes;
6641                         _packets = ring->rx_stats.packets;
6642                 } while (u64_stats_fetch_retry(&ring->rx_syncp, start));
6643                 bytes += _bytes;
6644                 packets += _packets;
6645         }
6646
6647         net_stats->rx_bytes = bytes;
6648         net_stats->rx_packets = packets;
6649
6650         bytes = 0;
6651         packets = 0;
6652         for (i = 0; i < adapter->num_tx_queues; i++) {
6653                 struct igb_ring *ring = adapter->tx_ring[i];
6654                 do {
6655                         start = u64_stats_fetch_begin(&ring->tx_syncp);
6656                         _bytes = ring->tx_stats.bytes;
6657                         _packets = ring->tx_stats.packets;
6658                 } while (u64_stats_fetch_retry(&ring->tx_syncp, start));
6659                 bytes += _bytes;
6660                 packets += _packets;
6661         }
6662         net_stats->tx_bytes = bytes;
6663         net_stats->tx_packets = packets;
6664         rcu_read_unlock();
6665
6666         /* read stats registers */
6667         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6668         adapter->stats.gprc += rd32(E1000_GPRC);
6669         adapter->stats.gorc += rd32(E1000_GORCL);
6670         rd32(E1000_GORCH); /* clear GORCL */
6671         adapter->stats.bprc += rd32(E1000_BPRC);
6672         adapter->stats.mprc += rd32(E1000_MPRC);
6673         adapter->stats.roc += rd32(E1000_ROC);
6674
6675         adapter->stats.prc64 += rd32(E1000_PRC64);
6676         adapter->stats.prc127 += rd32(E1000_PRC127);
6677         adapter->stats.prc255 += rd32(E1000_PRC255);
6678         adapter->stats.prc511 += rd32(E1000_PRC511);
6679         adapter->stats.prc1023 += rd32(E1000_PRC1023);
6680         adapter->stats.prc1522 += rd32(E1000_PRC1522);
6681         adapter->stats.symerrs += rd32(E1000_SYMERRS);
6682         adapter->stats.sec += rd32(E1000_SEC);
6683
6684         mpc = rd32(E1000_MPC);
6685         adapter->stats.mpc += mpc;
6686         net_stats->rx_fifo_errors += mpc;
6687         adapter->stats.scc += rd32(E1000_SCC);
6688         adapter->stats.ecol += rd32(E1000_ECOL);
6689         adapter->stats.mcc += rd32(E1000_MCC);
6690         adapter->stats.latecol += rd32(E1000_LATECOL);
6691         adapter->stats.dc += rd32(E1000_DC);
6692         adapter->stats.rlec += rd32(E1000_RLEC);
6693         adapter->stats.xonrxc += rd32(E1000_XONRXC);
6694         adapter->stats.xontxc += rd32(E1000_XONTXC);
6695         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6696         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6697         adapter->stats.fcruc += rd32(E1000_FCRUC);
6698         adapter->stats.gptc += rd32(E1000_GPTC);
6699         adapter->stats.gotc += rd32(E1000_GOTCL);
6700         rd32(E1000_GOTCH); /* clear GOTCL */
6701         adapter->stats.rnbc += rd32(E1000_RNBC);
6702         adapter->stats.ruc += rd32(E1000_RUC);
6703         adapter->stats.rfc += rd32(E1000_RFC);
6704         adapter->stats.rjc += rd32(E1000_RJC);
6705         adapter->stats.tor += rd32(E1000_TORH);
6706         adapter->stats.tot += rd32(E1000_TOTH);
6707         adapter->stats.tpr += rd32(E1000_TPR);
6708
6709         adapter->stats.ptc64 += rd32(E1000_PTC64);
6710         adapter->stats.ptc127 += rd32(E1000_PTC127);
6711         adapter->stats.ptc255 += rd32(E1000_PTC255);
6712         adapter->stats.ptc511 += rd32(E1000_PTC511);
6713         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6714         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6715
6716         adapter->stats.mptc += rd32(E1000_MPTC);
6717         adapter->stats.bptc += rd32(E1000_BPTC);
6718
6719         adapter->stats.tpt += rd32(E1000_TPT);
6720         adapter->stats.colc += rd32(E1000_COLC);
6721
6722         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6723         /* read internal phy specific stats */
6724         reg = rd32(E1000_CTRL_EXT);
6725         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6726                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6727
6728                 /* this stat has invalid values on i210/i211 */
6729                 if ((hw->mac.type != e1000_i210) &&
6730                     (hw->mac.type != e1000_i211))
6731                         adapter->stats.tncrs += rd32(E1000_TNCRS);
6732         }
6733
6734         adapter->stats.tsctc += rd32(E1000_TSCTC);
6735         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6736
6737         adapter->stats.iac += rd32(E1000_IAC);
6738         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6739         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6740         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6741         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6742         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6743         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6744         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6745         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6746
6747         /* Fill out the OS statistics structure */
6748         net_stats->multicast = adapter->stats.mprc;
6749         net_stats->collisions = adapter->stats.colc;
6750
6751         /* Rx Errors */
6752
6753         /* RLEC on some newer hardware can be incorrect so build
6754          * our own version based on RUC and ROC
6755          */
6756         net_stats->rx_errors = adapter->stats.rxerrc +
6757                 adapter->stats.crcerrs + adapter->stats.algnerrc +
6758                 adapter->stats.ruc + adapter->stats.roc +
6759                 adapter->stats.cexterr;
6760         net_stats->rx_length_errors = adapter->stats.ruc +
6761                                       adapter->stats.roc;
6762         net_stats->rx_crc_errors = adapter->stats.crcerrs;
6763         net_stats->rx_frame_errors = adapter->stats.algnerrc;
6764         net_stats->rx_missed_errors = adapter->stats.mpc;
6765
6766         /* Tx Errors */
6767         net_stats->tx_errors = adapter->stats.ecol +
6768                                adapter->stats.latecol;
6769         net_stats->tx_aborted_errors = adapter->stats.ecol;
6770         net_stats->tx_window_errors = adapter->stats.latecol;
6771         net_stats->tx_carrier_errors = adapter->stats.tncrs;
6772
6773         /* Tx Dropped needs to be maintained elsewhere */
6774
6775         /* Management Stats */
6776         adapter->stats.mgptc += rd32(E1000_MGTPTC);
6777         adapter->stats.mgprc += rd32(E1000_MGTPRC);
6778         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6779
6780         /* OS2BMC Stats */
6781         reg = rd32(E1000_MANC);
6782         if (reg & E1000_MANC_EN_BMC2OS) {
6783                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6784                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6785                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6786                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6787         }
6788 }
6789
6790 static void igb_perout(struct igb_adapter *adapter, int tsintr_tt)
6791 {
6792         int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_PEROUT, tsintr_tt);
6793         struct e1000_hw *hw = &adapter->hw;
6794         struct timespec64 ts;
6795         u32 tsauxc;
6796
6797         if (pin < 0 || pin >= IGB_N_PEROUT)
6798                 return;
6799
6800         spin_lock(&adapter->tmreg_lock);
6801
6802         if (hw->mac.type == e1000_82580 ||
6803             hw->mac.type == e1000_i354 ||
6804             hw->mac.type == e1000_i350) {
6805                 s64 ns = timespec64_to_ns(&adapter->perout[pin].period);
6806                 u32 systiml, systimh, level_mask, level, rem;
6807                 u64 systim, now;
6808
6809                 /* read systim registers in sequence */
6810                 rd32(E1000_SYSTIMR);
6811                 systiml = rd32(E1000_SYSTIML);
6812                 systimh = rd32(E1000_SYSTIMH);
6813                 systim = (((u64)(systimh & 0xFF)) << 32) | ((u64)systiml);
6814                 now = timecounter_cyc2time(&adapter->tc, systim);
6815
6816                 if (pin < 2) {
6817                         level_mask = (tsintr_tt == 1) ? 0x80000 : 0x40000;
6818                         level = (rd32(E1000_CTRL) & level_mask) ? 1 : 0;
6819                 } else {
6820                         level_mask = (tsintr_tt == 1) ? 0x80 : 0x40;
6821                         level = (rd32(E1000_CTRL_EXT) & level_mask) ? 1 : 0;
6822                 }
6823
6824                 div_u64_rem(now, ns, &rem);
6825                 systim = systim + (ns - rem);
6826
6827                 /* synchronize pin level with rising/falling edges */
6828                 div_u64_rem(now, ns << 1, &rem);
6829                 if (rem < ns) {
6830                         /* first half of period */
6831                         if (level == 0) {
6832                                 /* output is already low, skip this period */
6833                                 systim += ns;
6834                                 pr_notice("igb: periodic output on %s missed falling edge\n",
6835                                           adapter->sdp_config[pin].name);
6836                         }
6837                 } else {
6838                         /* second half of period */
6839                         if (level == 1) {
6840                                 /* output is already high, skip this period */
6841                                 systim += ns;
6842                                 pr_notice("igb: periodic output on %s missed rising edge\n",
6843                                           adapter->sdp_config[pin].name);
6844                         }
6845                 }
6846
6847                 /* for this chip family tv_sec is the upper part of the binary value,
6848                  * so not seconds
6849                  */
6850                 ts.tv_nsec = (u32)systim;
6851                 ts.tv_sec  = ((u32)(systim >> 32)) & 0xFF;
6852         } else {
6853                 ts = timespec64_add(adapter->perout[pin].start,
6854                                     adapter->perout[pin].period);
6855         }
6856
6857         /* u32 conversion of tv_sec is safe until y2106 */
6858         wr32((tsintr_tt == 1) ? E1000_TRGTTIML1 : E1000_TRGTTIML0, ts.tv_nsec);
6859         wr32((tsintr_tt == 1) ? E1000_TRGTTIMH1 : E1000_TRGTTIMH0, (u32)ts.tv_sec);
6860         tsauxc = rd32(E1000_TSAUXC);
6861         tsauxc |= TSAUXC_EN_TT0;
6862         wr32(E1000_TSAUXC, tsauxc);
6863         adapter->perout[pin].start = ts;
6864
6865         spin_unlock(&adapter->tmreg_lock);
6866 }
6867
6868 static void igb_extts(struct igb_adapter *adapter, int tsintr_tt)
6869 {
6870         int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_EXTTS, tsintr_tt);
6871         int auxstmpl = (tsintr_tt == 1) ? E1000_AUXSTMPL1 : E1000_AUXSTMPL0;
6872         int auxstmph = (tsintr_tt == 1) ? E1000_AUXSTMPH1 : E1000_AUXSTMPH0;
6873         struct e1000_hw *hw = &adapter->hw;
6874         struct ptp_clock_event event;
6875         struct timespec64 ts;
6876
6877         if (pin < 0 || pin >= IGB_N_EXTTS)
6878                 return;
6879
6880         if (hw->mac.type == e1000_82580 ||
6881             hw->mac.type == e1000_i354 ||
6882             hw->mac.type == e1000_i350) {
6883                 s64 ns = rd32(auxstmpl);
6884
6885                 ns += ((s64)(rd32(auxstmph) & 0xFF)) << 32;
6886                 ts = ns_to_timespec64(ns);
6887         } else {
6888                 ts.tv_nsec = rd32(auxstmpl);
6889                 ts.tv_sec  = rd32(auxstmph);
6890         }
6891
6892         event.type = PTP_CLOCK_EXTTS;
6893         event.index = tsintr_tt;
6894         event.timestamp = ts.tv_sec * 1000000000ULL + ts.tv_nsec;
6895         ptp_clock_event(adapter->ptp_clock, &event);
6896 }
6897
6898 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6899 {
6900         struct e1000_hw *hw = &adapter->hw;
6901         u32 ack = 0, tsicr = rd32(E1000_TSICR);
6902         struct ptp_clock_event event;
6903
6904         if (tsicr & TSINTR_SYS_WRAP) {
6905                 event.type = PTP_CLOCK_PPS;
6906                 if (adapter->ptp_caps.pps)
6907                         ptp_clock_event(adapter->ptp_clock, &event);
6908                 ack |= TSINTR_SYS_WRAP;
6909         }
6910
6911         if (tsicr & E1000_TSICR_TXTS) {
6912                 /* retrieve hardware timestamp */
6913                 schedule_work(&adapter->ptp_tx_work);
6914                 ack |= E1000_TSICR_TXTS;
6915         }
6916
6917         if (tsicr & TSINTR_TT0) {
6918                 igb_perout(adapter, 0);
6919                 ack |= TSINTR_TT0;
6920         }
6921
6922         if (tsicr & TSINTR_TT1) {
6923                 igb_perout(adapter, 1);
6924                 ack |= TSINTR_TT1;
6925         }
6926
6927         if (tsicr & TSINTR_AUTT0) {
6928                 igb_extts(adapter, 0);
6929                 ack |= TSINTR_AUTT0;
6930         }
6931
6932         if (tsicr & TSINTR_AUTT1) {
6933                 igb_extts(adapter, 1);
6934                 ack |= TSINTR_AUTT1;
6935         }
6936
6937         /* acknowledge the interrupts */
6938         wr32(E1000_TSICR, ack);
6939 }
6940
6941 static irqreturn_t igb_msix_other(int irq, void *data)
6942 {
6943         struct igb_adapter *adapter = data;
6944         struct e1000_hw *hw = &adapter->hw;
6945         u32 icr = rd32(E1000_ICR);
6946         /* reading ICR causes bit 31 of EICR to be cleared */
6947
6948         if (icr & E1000_ICR_DRSTA)
6949                 schedule_work(&adapter->reset_task);
6950
6951         if (icr & E1000_ICR_DOUTSYNC) {
6952                 /* HW is reporting DMA is out of sync */
6953                 adapter->stats.doosync++;
6954                 /* The DMA Out of Sync is also indication of a spoof event
6955                  * in IOV mode. Check the Wrong VM Behavior register to
6956                  * see if it is really a spoof event.
6957                  */
6958                 igb_check_wvbr(adapter);
6959         }
6960
6961         /* Check for a mailbox event */
6962         if (icr & E1000_ICR_VMMB)
6963                 igb_msg_task(adapter);
6964
6965         if (icr & E1000_ICR_LSC) {
6966                 hw->mac.get_link_status = 1;
6967                 /* guard against interrupt when we're going down */
6968                 if (!test_bit(__IGB_DOWN, &adapter->state))
6969                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6970         }
6971
6972         if (icr & E1000_ICR_TS)
6973                 igb_tsync_interrupt(adapter);
6974
6975         wr32(E1000_EIMS, adapter->eims_other);
6976
6977         return IRQ_HANDLED;
6978 }
6979
6980 static void igb_write_itr(struct igb_q_vector *q_vector)
6981 {
6982         struct igb_adapter *adapter = q_vector->adapter;
6983         u32 itr_val = q_vector->itr_val & 0x7FFC;
6984
6985         if (!q_vector->set_itr)
6986                 return;
6987
6988         if (!itr_val)
6989                 itr_val = 0x4;
6990
6991         if (adapter->hw.mac.type == e1000_82575)
6992                 itr_val |= itr_val << 16;
6993         else
6994                 itr_val |= E1000_EITR_CNT_IGNR;
6995
6996         writel(itr_val, q_vector->itr_register);
6997         q_vector->set_itr = 0;
6998 }
6999
7000 static irqreturn_t igb_msix_ring(int irq, void *data)
7001 {
7002         struct igb_q_vector *q_vector = data;
7003
7004         /* Write the ITR value calculated from the previous interrupt. */
7005         igb_write_itr(q_vector);
7006
7007         napi_schedule(&q_vector->napi);
7008
7009         return IRQ_HANDLED;
7010 }
7011
7012 #ifdef CONFIG_IGB_DCA
7013 static void igb_update_tx_dca(struct igb_adapter *adapter,
7014                               struct igb_ring *tx_ring,
7015                               int cpu)
7016 {
7017         struct e1000_hw *hw = &adapter->hw;
7018         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
7019
7020         if (hw->mac.type != e1000_82575)
7021                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
7022
7023         /* We can enable relaxed ordering for reads, but not writes when
7024          * DCA is enabled.  This is due to a known issue in some chipsets
7025          * which will cause the DCA tag to be cleared.
7026          */
7027         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
7028                   E1000_DCA_TXCTRL_DATA_RRO_EN |
7029                   E1000_DCA_TXCTRL_DESC_DCA_EN;
7030
7031         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
7032 }
7033
7034 static void igb_update_rx_dca(struct igb_adapter *adapter,
7035                               struct igb_ring *rx_ring,
7036                               int cpu)
7037 {
7038         struct e1000_hw *hw = &adapter->hw;
7039         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
7040
7041         if (hw->mac.type != e1000_82575)
7042                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
7043
7044         /* We can enable relaxed ordering for reads, but not writes when
7045          * DCA is enabled.  This is due to a known issue in some chipsets
7046          * which will cause the DCA tag to be cleared.
7047          */
7048         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
7049                   E1000_DCA_RXCTRL_DESC_DCA_EN;
7050
7051         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
7052 }
7053
7054 static void igb_update_dca(struct igb_q_vector *q_vector)
7055 {
7056         struct igb_adapter *adapter = q_vector->adapter;
7057         int cpu = get_cpu();
7058
7059         if (q_vector->cpu == cpu)
7060                 goto out_no_update;
7061
7062         if (q_vector->tx.ring)
7063                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
7064
7065         if (q_vector->rx.ring)
7066                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
7067
7068         q_vector->cpu = cpu;
7069 out_no_update:
7070         put_cpu();
7071 }
7072
7073 static void igb_setup_dca(struct igb_adapter *adapter)
7074 {
7075         struct e1000_hw *hw = &adapter->hw;
7076         int i;
7077
7078         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
7079                 return;
7080
7081         /* Always use CB2 mode, difference is masked in the CB driver. */
7082         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
7083
7084         for (i = 0; i < adapter->num_q_vectors; i++) {
7085                 adapter->q_vector[i]->cpu = -1;
7086                 igb_update_dca(adapter->q_vector[i]);
7087         }
7088 }
7089
7090 static int __igb_notify_dca(struct device *dev, void *data)
7091 {
7092         struct net_device *netdev = dev_get_drvdata(dev);
7093         struct igb_adapter *adapter = netdev_priv(netdev);
7094         struct pci_dev *pdev = adapter->pdev;
7095         struct e1000_hw *hw = &adapter->hw;
7096         unsigned long event = *(unsigned long *)data;
7097
7098         switch (event) {
7099         case DCA_PROVIDER_ADD:
7100                 /* if already enabled, don't do it again */
7101                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
7102                         break;
7103                 if (dca_add_requester(dev) == 0) {
7104                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
7105                         dev_info(&pdev->dev, "DCA enabled\n");
7106                         igb_setup_dca(adapter);
7107                         break;
7108                 }
7109                 fallthrough; /* since DCA is disabled. */
7110         case DCA_PROVIDER_REMOVE:
7111                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
7112                         /* without this a class_device is left
7113                          * hanging around in the sysfs model
7114                          */
7115                         dca_remove_requester(dev);
7116                         dev_info(&pdev->dev, "DCA disabled\n");
7117                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
7118                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
7119                 }
7120                 break;
7121         }
7122
7123         return 0;
7124 }
7125
7126 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
7127                           void *p)
7128 {
7129         int ret_val;
7130
7131         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
7132                                          __igb_notify_dca);
7133
7134         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7135 }
7136 #endif /* CONFIG_IGB_DCA */
7137
7138 #ifdef CONFIG_PCI_IOV
7139 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
7140 {
7141         unsigned char mac_addr[ETH_ALEN];
7142
7143         eth_zero_addr(mac_addr);
7144         igb_set_vf_mac(adapter, vf, mac_addr);
7145
7146         /* By default spoof check is enabled for all VFs */
7147         adapter->vf_data[vf].spoofchk_enabled = true;
7148
7149         /* By default VFs are not trusted */
7150         adapter->vf_data[vf].trusted = false;
7151
7152         return 0;
7153 }
7154
7155 #endif
7156 static void igb_ping_all_vfs(struct igb_adapter *adapter)
7157 {
7158         struct e1000_hw *hw = &adapter->hw;
7159         u32 ping;
7160         int i;
7161
7162         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
7163                 ping = E1000_PF_CONTROL_MSG;
7164                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
7165                         ping |= E1000_VT_MSGTYPE_CTS;
7166                 igb_write_mbx(hw, &ping, 1, i);
7167         }
7168 }
7169
7170 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7171 {
7172         struct e1000_hw *hw = &adapter->hw;
7173         u32 vmolr = rd32(E1000_VMOLR(vf));
7174         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7175
7176         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
7177                             IGB_VF_FLAG_MULTI_PROMISC);
7178         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7179
7180         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
7181                 vmolr |= E1000_VMOLR_MPME;
7182                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
7183                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
7184         } else {
7185                 /* if we have hashes and we are clearing a multicast promisc
7186                  * flag we need to write the hashes to the MTA as this step
7187                  * was previously skipped
7188                  */
7189                 if (vf_data->num_vf_mc_hashes > 30) {
7190                         vmolr |= E1000_VMOLR_MPME;
7191                 } else if (vf_data->num_vf_mc_hashes) {
7192                         int j;
7193
7194                         vmolr |= E1000_VMOLR_ROMPE;
7195                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7196                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7197                 }
7198         }
7199
7200         wr32(E1000_VMOLR(vf), vmolr);
7201
7202         /* there are flags left unprocessed, likely not supported */
7203         if (*msgbuf & E1000_VT_MSGINFO_MASK)
7204                 return -EINVAL;
7205
7206         return 0;
7207 }
7208
7209 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
7210                                   u32 *msgbuf, u32 vf)
7211 {
7212         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7213         u16 *hash_list = (u16 *)&msgbuf[1];
7214         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7215         int i;
7216
7217         /* salt away the number of multicast addresses assigned
7218          * to this VF for later use to restore when the PF multi cast
7219          * list changes
7220          */
7221         vf_data->num_vf_mc_hashes = n;
7222
7223         /* only up to 30 hash values supported */
7224         if (n > 30)
7225                 n = 30;
7226
7227         /* store the hashes for later use */
7228         for (i = 0; i < n; i++)
7229                 vf_data->vf_mc_hashes[i] = hash_list[i];
7230
7231         /* Flush and reset the mta with the new values */
7232         igb_set_rx_mode(adapter->netdev);
7233
7234         return 0;
7235 }
7236
7237 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
7238 {
7239         struct e1000_hw *hw = &adapter->hw;
7240         struct vf_data_storage *vf_data;
7241         int i, j;
7242
7243         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7244                 u32 vmolr = rd32(E1000_VMOLR(i));
7245
7246                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7247
7248                 vf_data = &adapter->vf_data[i];
7249
7250                 if ((vf_data->num_vf_mc_hashes > 30) ||
7251                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
7252                         vmolr |= E1000_VMOLR_MPME;
7253                 } else if (vf_data->num_vf_mc_hashes) {
7254                         vmolr |= E1000_VMOLR_ROMPE;
7255                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7256                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7257                 }
7258                 wr32(E1000_VMOLR(i), vmolr);
7259         }
7260 }
7261
7262 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
7263 {
7264         struct e1000_hw *hw = &adapter->hw;
7265         u32 pool_mask, vlvf_mask, i;
7266
7267         /* create mask for VF and other pools */
7268         pool_mask = E1000_VLVF_POOLSEL_MASK;
7269         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
7270
7271         /* drop PF from pool bits */
7272         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
7273                              adapter->vfs_allocated_count);
7274
7275         /* Find the vlan filter for this id */
7276         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
7277                 u32 vlvf = rd32(E1000_VLVF(i));
7278                 u32 vfta_mask, vid, vfta;
7279
7280                 /* remove the vf from the pool */
7281                 if (!(vlvf & vlvf_mask))
7282                         continue;
7283
7284                 /* clear out bit from VLVF */
7285                 vlvf ^= vlvf_mask;
7286
7287                 /* if other pools are present, just remove ourselves */
7288                 if (vlvf & pool_mask)
7289                         goto update_vlvfb;
7290
7291                 /* if PF is present, leave VFTA */
7292                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
7293                         goto update_vlvf;
7294
7295                 vid = vlvf & E1000_VLVF_VLANID_MASK;
7296                 vfta_mask = BIT(vid % 32);
7297
7298                 /* clear bit from VFTA */
7299                 vfta = adapter->shadow_vfta[vid / 32];
7300                 if (vfta & vfta_mask)
7301                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
7302 update_vlvf:
7303                 /* clear pool selection enable */
7304                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7305                         vlvf &= E1000_VLVF_POOLSEL_MASK;
7306                 else
7307                         vlvf = 0;
7308 update_vlvfb:
7309                 /* clear pool bits */
7310                 wr32(E1000_VLVF(i), vlvf);
7311         }
7312 }
7313
7314 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
7315 {
7316         u32 vlvf;
7317         int idx;
7318
7319         /* short cut the special case */
7320         if (vlan == 0)
7321                 return 0;
7322
7323         /* Search for the VLAN id in the VLVF entries */
7324         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
7325                 vlvf = rd32(E1000_VLVF(idx));
7326                 if ((vlvf & VLAN_VID_MASK) == vlan)
7327                         break;
7328         }
7329
7330         return idx;
7331 }
7332
7333 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
7334 {
7335         struct e1000_hw *hw = &adapter->hw;
7336         u32 bits, pf_id;
7337         int idx;
7338
7339         idx = igb_find_vlvf_entry(hw, vid);
7340         if (!idx)
7341                 return;
7342
7343         /* See if any other pools are set for this VLAN filter
7344          * entry other than the PF.
7345          */
7346         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
7347         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
7348         bits &= rd32(E1000_VLVF(idx));
7349
7350         /* Disable the filter so this falls into the default pool. */
7351         if (!bits) {
7352                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7353                         wr32(E1000_VLVF(idx), BIT(pf_id));
7354                 else
7355                         wr32(E1000_VLVF(idx), 0);
7356         }
7357 }
7358
7359 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
7360                            bool add, u32 vf)
7361 {
7362         int pf_id = adapter->vfs_allocated_count;
7363         struct e1000_hw *hw = &adapter->hw;
7364         int err;
7365
7366         /* If VLAN overlaps with one the PF is currently monitoring make
7367          * sure that we are able to allocate a VLVF entry.  This may be
7368          * redundant but it guarantees PF will maintain visibility to
7369          * the VLAN.
7370          */
7371         if (add && test_bit(vid, adapter->active_vlans)) {
7372                 err = igb_vfta_set(hw, vid, pf_id, true, false);
7373                 if (err)
7374                         return err;
7375         }
7376
7377         err = igb_vfta_set(hw, vid, vf, add, false);
7378
7379         if (add && !err)
7380                 return err;
7381
7382         /* If we failed to add the VF VLAN or we are removing the VF VLAN
7383          * we may need to drop the PF pool bit in order to allow us to free
7384          * up the VLVF resources.
7385          */
7386         if (test_bit(vid, adapter->active_vlans) ||
7387             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
7388                 igb_update_pf_vlvf(adapter, vid);
7389
7390         return err;
7391 }
7392
7393 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
7394 {
7395         struct e1000_hw *hw = &adapter->hw;
7396
7397         if (vid)
7398                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
7399         else
7400                 wr32(E1000_VMVIR(vf), 0);
7401 }
7402
7403 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
7404                                 u16 vlan, u8 qos)
7405 {
7406         int err;
7407
7408         err = igb_set_vf_vlan(adapter, vlan, true, vf);
7409         if (err)
7410                 return err;
7411
7412         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
7413         igb_set_vmolr(adapter, vf, !vlan);
7414
7415         /* revoke access to previous VLAN */
7416         if (vlan != adapter->vf_data[vf].pf_vlan)
7417                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7418                                 false, vf);
7419
7420         adapter->vf_data[vf].pf_vlan = vlan;
7421         adapter->vf_data[vf].pf_qos = qos;
7422         igb_set_vf_vlan_strip(adapter, vf, true);
7423         dev_info(&adapter->pdev->dev,
7424                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7425         if (test_bit(__IGB_DOWN, &adapter->state)) {
7426                 dev_warn(&adapter->pdev->dev,
7427                          "The VF VLAN has been set, but the PF device is not up.\n");
7428                 dev_warn(&adapter->pdev->dev,
7429                          "Bring the PF device up before attempting to use the VF device.\n");
7430         }
7431
7432         return err;
7433 }
7434
7435 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7436 {
7437         /* Restore tagless access via VLAN 0 */
7438         igb_set_vf_vlan(adapter, 0, true, vf);
7439
7440         igb_set_vmvir(adapter, 0, vf);
7441         igb_set_vmolr(adapter, vf, true);
7442
7443         /* Remove any PF assigned VLAN */
7444         if (adapter->vf_data[vf].pf_vlan)
7445                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7446                                 false, vf);
7447
7448         adapter->vf_data[vf].pf_vlan = 0;
7449         adapter->vf_data[vf].pf_qos = 0;
7450         igb_set_vf_vlan_strip(adapter, vf, false);
7451
7452         return 0;
7453 }
7454
7455 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7456                                u16 vlan, u8 qos, __be16 vlan_proto)
7457 {
7458         struct igb_adapter *adapter = netdev_priv(netdev);
7459
7460         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7461                 return -EINVAL;
7462
7463         if (vlan_proto != htons(ETH_P_8021Q))
7464                 return -EPROTONOSUPPORT;
7465
7466         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7467                                igb_disable_port_vlan(adapter, vf);
7468 }
7469
7470 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7471 {
7472         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7473         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7474         int ret;
7475
7476         if (adapter->vf_data[vf].pf_vlan)
7477                 return -1;
7478
7479         /* VLAN 0 is a special case, don't allow it to be removed */
7480         if (!vid && !add)
7481                 return 0;
7482
7483         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7484         if (!ret)
7485                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7486         return ret;
7487 }
7488
7489 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7490 {
7491         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7492
7493         /* clear flags - except flag that indicates PF has set the MAC */
7494         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7495         vf_data->last_nack = jiffies;
7496
7497         /* reset vlans for device */
7498         igb_clear_vf_vfta(adapter, vf);
7499         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7500         igb_set_vmvir(adapter, vf_data->pf_vlan |
7501                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7502         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7503         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7504
7505         /* reset multicast table array for vf */
7506         adapter->vf_data[vf].num_vf_mc_hashes = 0;
7507
7508         /* Flush and reset the mta with the new values */
7509         igb_set_rx_mode(adapter->netdev);
7510 }
7511
7512 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7513 {
7514         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7515
7516         /* clear mac address as we were hotplug removed/added */
7517         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7518                 eth_zero_addr(vf_mac);
7519
7520         /* process remaining reset events */
7521         igb_vf_reset(adapter, vf);
7522 }
7523
7524 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7525 {
7526         struct e1000_hw *hw = &adapter->hw;
7527         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7528         u32 reg, msgbuf[3] = {};
7529         u8 *addr = (u8 *)(&msgbuf[1]);
7530
7531         /* process all the same items cleared in a function level reset */
7532         igb_vf_reset(adapter, vf);
7533
7534         /* set vf mac address */
7535         igb_set_vf_mac(adapter, vf, vf_mac);
7536
7537         /* enable transmit and receive for vf */
7538         reg = rd32(E1000_VFTE);
7539         wr32(E1000_VFTE, reg | BIT(vf));
7540         reg = rd32(E1000_VFRE);
7541         wr32(E1000_VFRE, reg | BIT(vf));
7542
7543         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7544
7545         /* reply to reset with ack and vf mac address */
7546         if (!is_zero_ether_addr(vf_mac)) {
7547                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7548                 memcpy(addr, vf_mac, ETH_ALEN);
7549         } else {
7550                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7551         }
7552         igb_write_mbx(hw, msgbuf, 3, vf);
7553 }
7554
7555 static void igb_flush_mac_table(struct igb_adapter *adapter)
7556 {
7557         struct e1000_hw *hw = &adapter->hw;
7558         int i;
7559
7560         for (i = 0; i < hw->mac.rar_entry_count; i++) {
7561                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7562                 eth_zero_addr(adapter->mac_table[i].addr);
7563                 adapter->mac_table[i].queue = 0;
7564                 igb_rar_set_index(adapter, i);
7565         }
7566 }
7567
7568 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7569 {
7570         struct e1000_hw *hw = &adapter->hw;
7571         /* do not count rar entries reserved for VFs MAC addresses */
7572         int rar_entries = hw->mac.rar_entry_count -
7573                           adapter->vfs_allocated_count;
7574         int i, count = 0;
7575
7576         for (i = 0; i < rar_entries; i++) {
7577                 /* do not count default entries */
7578                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7579                         continue;
7580
7581                 /* do not count "in use" entries for different queues */
7582                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7583                     (adapter->mac_table[i].queue != queue))
7584                         continue;
7585
7586                 count++;
7587         }
7588
7589         return count;
7590 }
7591
7592 /* Set default MAC address for the PF in the first RAR entry */
7593 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7594 {
7595         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7596
7597         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7598         mac_table->queue = adapter->vfs_allocated_count;
7599         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7600
7601         igb_rar_set_index(adapter, 0);
7602 }
7603
7604 /* If the filter to be added and an already existing filter express
7605  * the same address and address type, it should be possible to only
7606  * override the other configurations, for example the queue to steer
7607  * traffic.
7608  */
7609 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7610                                       const u8 *addr, const u8 flags)
7611 {
7612         if (!(entry->state & IGB_MAC_STATE_IN_USE))
7613                 return true;
7614
7615         if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7616             (flags & IGB_MAC_STATE_SRC_ADDR))
7617                 return false;
7618
7619         if (!ether_addr_equal(addr, entry->addr))
7620                 return false;
7621
7622         return true;
7623 }
7624
7625 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7626  * 'flags' is used to indicate what kind of match is made, match is by
7627  * default for the destination address, if matching by source address
7628  * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7629  */
7630 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7631                                     const u8 *addr, const u8 queue,
7632                                     const u8 flags)
7633 {
7634         struct e1000_hw *hw = &adapter->hw;
7635         int rar_entries = hw->mac.rar_entry_count -
7636                           adapter->vfs_allocated_count;
7637         int i;
7638
7639         if (is_zero_ether_addr(addr))
7640                 return -EINVAL;
7641
7642         /* Search for the first empty entry in the MAC table.
7643          * Do not touch entries at the end of the table reserved for the VF MAC
7644          * addresses.
7645          */
7646         for (i = 0; i < rar_entries; i++) {
7647                 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7648                                                addr, flags))
7649                         continue;
7650
7651                 ether_addr_copy(adapter->mac_table[i].addr, addr);
7652                 adapter->mac_table[i].queue = queue;
7653                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7654
7655                 igb_rar_set_index(adapter, i);
7656                 return i;
7657         }
7658
7659         return -ENOSPC;
7660 }
7661
7662 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7663                               const u8 queue)
7664 {
7665         return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7666 }
7667
7668 /* Remove a MAC filter for 'addr' directing matching traffic to
7669  * 'queue', 'flags' is used to indicate what kind of match need to be
7670  * removed, match is by default for the destination address, if
7671  * matching by source address is to be removed the flag
7672  * IGB_MAC_STATE_SRC_ADDR can be used.
7673  */
7674 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7675                                     const u8 *addr, const u8 queue,
7676                                     const u8 flags)
7677 {
7678         struct e1000_hw *hw = &adapter->hw;
7679         int rar_entries = hw->mac.rar_entry_count -
7680                           adapter->vfs_allocated_count;
7681         int i;
7682
7683         if (is_zero_ether_addr(addr))
7684                 return -EINVAL;
7685
7686         /* Search for matching entry in the MAC table based on given address
7687          * and queue. Do not touch entries at the end of the table reserved
7688          * for the VF MAC addresses.
7689          */
7690         for (i = 0; i < rar_entries; i++) {
7691                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7692                         continue;
7693                 if ((adapter->mac_table[i].state & flags) != flags)
7694                         continue;
7695                 if (adapter->mac_table[i].queue != queue)
7696                         continue;
7697                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7698                         continue;
7699
7700                 /* When a filter for the default address is "deleted",
7701                  * we return it to its initial configuration
7702                  */
7703                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7704                         adapter->mac_table[i].state =
7705                                 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7706                         adapter->mac_table[i].queue =
7707                                 adapter->vfs_allocated_count;
7708                 } else {
7709                         adapter->mac_table[i].state = 0;
7710                         adapter->mac_table[i].queue = 0;
7711                         eth_zero_addr(adapter->mac_table[i].addr);
7712                 }
7713
7714                 igb_rar_set_index(adapter, i);
7715                 return 0;
7716         }
7717
7718         return -ENOENT;
7719 }
7720
7721 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7722                               const u8 queue)
7723 {
7724         return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7725 }
7726
7727 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7728                                 const u8 *addr, u8 queue, u8 flags)
7729 {
7730         struct e1000_hw *hw = &adapter->hw;
7731
7732         /* In theory, this should be supported on 82575 as well, but
7733          * that part wasn't easily accessible during development.
7734          */
7735         if (hw->mac.type != e1000_i210)
7736                 return -EOPNOTSUPP;
7737
7738         return igb_add_mac_filter_flags(adapter, addr, queue,
7739                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7740 }
7741
7742 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7743                                 const u8 *addr, u8 queue, u8 flags)
7744 {
7745         return igb_del_mac_filter_flags(adapter, addr, queue,
7746                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7747 }
7748
7749 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7750 {
7751         struct igb_adapter *adapter = netdev_priv(netdev);
7752         int ret;
7753
7754         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7755
7756         return min_t(int, ret, 0);
7757 }
7758
7759 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7760 {
7761         struct igb_adapter *adapter = netdev_priv(netdev);
7762
7763         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7764
7765         return 0;
7766 }
7767
7768 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7769                                  const u32 info, const u8 *addr)
7770 {
7771         struct pci_dev *pdev = adapter->pdev;
7772         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7773         struct list_head *pos;
7774         struct vf_mac_filter *entry = NULL;
7775         int ret = 0;
7776
7777         if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7778             !vf_data->trusted) {
7779                 dev_warn(&pdev->dev,
7780                          "VF %d requested MAC filter but is administratively denied\n",
7781                           vf);
7782                 return -EINVAL;
7783         }
7784         if (!is_valid_ether_addr(addr)) {
7785                 dev_warn(&pdev->dev,
7786                          "VF %d attempted to set invalid MAC filter\n",
7787                           vf);
7788                 return -EINVAL;
7789         }
7790
7791         switch (info) {
7792         case E1000_VF_MAC_FILTER_CLR:
7793                 /* remove all unicast MAC filters related to the current VF */
7794                 list_for_each(pos, &adapter->vf_macs.l) {
7795                         entry = list_entry(pos, struct vf_mac_filter, l);
7796                         if (entry->vf == vf) {
7797                                 entry->vf = -1;
7798                                 entry->free = true;
7799                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7800                         }
7801                 }
7802                 break;
7803         case E1000_VF_MAC_FILTER_ADD:
7804                 /* try to find empty slot in the list */
7805                 list_for_each(pos, &adapter->vf_macs.l) {
7806                         entry = list_entry(pos, struct vf_mac_filter, l);
7807                         if (entry->free)
7808                                 break;
7809                 }
7810
7811                 if (entry && entry->free) {
7812                         entry->free = false;
7813                         entry->vf = vf;
7814                         ether_addr_copy(entry->vf_mac, addr);
7815
7816                         ret = igb_add_mac_filter(adapter, addr, vf);
7817                         ret = min_t(int, ret, 0);
7818                 } else {
7819                         ret = -ENOSPC;
7820                 }
7821
7822                 if (ret == -ENOSPC)
7823                         dev_warn(&pdev->dev,
7824                                  "VF %d has requested MAC filter but there is no space for it\n",
7825                                  vf);
7826                 break;
7827         default:
7828                 ret = -EINVAL;
7829                 break;
7830         }
7831
7832         return ret;
7833 }
7834
7835 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7836 {
7837         struct pci_dev *pdev = adapter->pdev;
7838         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7839         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7840
7841         /* The VF MAC Address is stored in a packed array of bytes
7842          * starting at the second 32 bit word of the msg array
7843          */
7844         unsigned char *addr = (unsigned char *)&msg[1];
7845         int ret = 0;
7846
7847         if (!info) {
7848                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7849                     !vf_data->trusted) {
7850                         dev_warn(&pdev->dev,
7851                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7852                                  vf);
7853                         return -EINVAL;
7854                 }
7855
7856                 if (!is_valid_ether_addr(addr)) {
7857                         dev_warn(&pdev->dev,
7858                                  "VF %d attempted to set invalid MAC\n",
7859                                  vf);
7860                         return -EINVAL;
7861                 }
7862
7863                 ret = igb_set_vf_mac(adapter, vf, addr);
7864         } else {
7865                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7866         }
7867
7868         return ret;
7869 }
7870
7871 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7872 {
7873         struct e1000_hw *hw = &adapter->hw;
7874         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7875         u32 msg = E1000_VT_MSGTYPE_NACK;
7876
7877         /* if device isn't clear to send it shouldn't be reading either */
7878         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7879             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7880                 igb_write_mbx(hw, &msg, 1, vf);
7881                 vf_data->last_nack = jiffies;
7882         }
7883 }
7884
7885 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7886 {
7887         struct pci_dev *pdev = adapter->pdev;
7888         u32 msgbuf[E1000_VFMAILBOX_SIZE];
7889         struct e1000_hw *hw = &adapter->hw;
7890         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7891         s32 retval;
7892
7893         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7894
7895         if (retval) {
7896                 /* if receive failed revoke VF CTS stats and restart init */
7897                 dev_err(&pdev->dev, "Error receiving message from VF\n");
7898                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7899                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7900                         goto unlock;
7901                 goto out;
7902         }
7903
7904         /* this is a message we already processed, do nothing */
7905         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7906                 goto unlock;
7907
7908         /* until the vf completes a reset it should not be
7909          * allowed to start any configuration.
7910          */
7911         if (msgbuf[0] == E1000_VF_RESET) {
7912                 /* unlocks mailbox */
7913                 igb_vf_reset_msg(adapter, vf);
7914                 return;
7915         }
7916
7917         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7918                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7919                         goto unlock;
7920                 retval = -1;
7921                 goto out;
7922         }
7923
7924         switch ((msgbuf[0] & 0xFFFF)) {
7925         case E1000_VF_SET_MAC_ADDR:
7926                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7927                 break;
7928         case E1000_VF_SET_PROMISC:
7929                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7930                 break;
7931         case E1000_VF_SET_MULTICAST:
7932                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7933                 break;
7934         case E1000_VF_SET_LPE:
7935                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7936                 break;
7937         case E1000_VF_SET_VLAN:
7938                 retval = -1;
7939                 if (vf_data->pf_vlan)
7940                         dev_warn(&pdev->dev,
7941                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7942                                  vf);
7943                 else
7944                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7945                 break;
7946         default:
7947                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7948                 retval = -1;
7949                 break;
7950         }
7951
7952         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7953 out:
7954         /* notify the VF of the results of what it sent us */
7955         if (retval)
7956                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7957         else
7958                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7959
7960         /* unlocks mailbox */
7961         igb_write_mbx(hw, msgbuf, 1, vf);
7962         return;
7963
7964 unlock:
7965         igb_unlock_mbx(hw, vf);
7966 }
7967
7968 static void igb_msg_task(struct igb_adapter *adapter)
7969 {
7970         struct e1000_hw *hw = &adapter->hw;
7971         unsigned long flags;
7972         u32 vf;
7973
7974         spin_lock_irqsave(&adapter->vfs_lock, flags);
7975         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
7976                 /* process any reset requests */
7977                 if (!igb_check_for_rst(hw, vf))
7978                         igb_vf_reset_event(adapter, vf);
7979
7980                 /* process any messages pending */
7981                 if (!igb_check_for_msg(hw, vf))
7982                         igb_rcv_msg_from_vf(adapter, vf);
7983
7984                 /* process any acks */
7985                 if (!igb_check_for_ack(hw, vf))
7986                         igb_rcv_ack_from_vf(adapter, vf);
7987         }
7988         spin_unlock_irqrestore(&adapter->vfs_lock, flags);
7989 }
7990
7991 /**
7992  *  igb_set_uta - Set unicast filter table address
7993  *  @adapter: board private structure
7994  *  @set: boolean indicating if we are setting or clearing bits
7995  *
7996  *  The unicast table address is a register array of 32-bit registers.
7997  *  The table is meant to be used in a way similar to how the MTA is used
7998  *  however due to certain limitations in the hardware it is necessary to
7999  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
8000  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
8001  **/
8002 static void igb_set_uta(struct igb_adapter *adapter, bool set)
8003 {
8004         struct e1000_hw *hw = &adapter->hw;
8005         u32 uta = set ? ~0 : 0;
8006         int i;
8007
8008         /* we only need to do this if VMDq is enabled */
8009         if (!adapter->vfs_allocated_count)
8010                 return;
8011
8012         for (i = hw->mac.uta_reg_count; i--;)
8013                 array_wr32(E1000_UTA, i, uta);
8014 }
8015
8016 /**
8017  *  igb_intr_msi - Interrupt Handler
8018  *  @irq: interrupt number
8019  *  @data: pointer to a network interface device structure
8020  **/
8021 static irqreturn_t igb_intr_msi(int irq, void *data)
8022 {
8023         struct igb_adapter *adapter = data;
8024         struct igb_q_vector *q_vector = adapter->q_vector[0];
8025         struct e1000_hw *hw = &adapter->hw;
8026         /* read ICR disables interrupts using IAM */
8027         u32 icr = rd32(E1000_ICR);
8028
8029         igb_write_itr(q_vector);
8030
8031         if (icr & E1000_ICR_DRSTA)
8032                 schedule_work(&adapter->reset_task);
8033
8034         if (icr & E1000_ICR_DOUTSYNC) {
8035                 /* HW is reporting DMA is out of sync */
8036                 adapter->stats.doosync++;
8037         }
8038
8039         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
8040                 hw->mac.get_link_status = 1;
8041                 if (!test_bit(__IGB_DOWN, &adapter->state))
8042                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
8043         }
8044
8045         if (icr & E1000_ICR_TS)
8046                 igb_tsync_interrupt(adapter);
8047
8048         napi_schedule(&q_vector->napi);
8049
8050         return IRQ_HANDLED;
8051 }
8052
8053 /**
8054  *  igb_intr - Legacy Interrupt Handler
8055  *  @irq: interrupt number
8056  *  @data: pointer to a network interface device structure
8057  **/
8058 static irqreturn_t igb_intr(int irq, void *data)
8059 {
8060         struct igb_adapter *adapter = data;
8061         struct igb_q_vector *q_vector = adapter->q_vector[0];
8062         struct e1000_hw *hw = &adapter->hw;
8063         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
8064          * need for the IMC write
8065          */
8066         u32 icr = rd32(E1000_ICR);
8067
8068         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
8069          * not set, then the adapter didn't send an interrupt
8070          */
8071         if (!(icr & E1000_ICR_INT_ASSERTED))
8072                 return IRQ_NONE;
8073
8074         igb_write_itr(q_vector);
8075
8076         if (icr & E1000_ICR_DRSTA)
8077                 schedule_work(&adapter->reset_task);
8078
8079         if (icr & E1000_ICR_DOUTSYNC) {
8080                 /* HW is reporting DMA is out of sync */
8081                 adapter->stats.doosync++;
8082         }
8083
8084         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
8085                 hw->mac.get_link_status = 1;
8086                 /* guard against interrupt when we're going down */
8087                 if (!test_bit(__IGB_DOWN, &adapter->state))
8088                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
8089         }
8090
8091         if (icr & E1000_ICR_TS)
8092                 igb_tsync_interrupt(adapter);
8093
8094         napi_schedule(&q_vector->napi);
8095
8096         return IRQ_HANDLED;
8097 }
8098
8099 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
8100 {
8101         struct igb_adapter *adapter = q_vector->adapter;
8102         struct e1000_hw *hw = &adapter->hw;
8103
8104         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
8105             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
8106                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
8107                         igb_set_itr(q_vector);
8108                 else
8109                         igb_update_ring_itr(q_vector);
8110         }
8111
8112         if (!test_bit(__IGB_DOWN, &adapter->state)) {
8113                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
8114                         wr32(E1000_EIMS, q_vector->eims_value);
8115                 else
8116                         igb_irq_enable(adapter);
8117         }
8118 }
8119
8120 /**
8121  *  igb_poll - NAPI Rx polling callback
8122  *  @napi: napi polling structure
8123  *  @budget: count of how many packets we should handle
8124  **/
8125 static int igb_poll(struct napi_struct *napi, int budget)
8126 {
8127         struct igb_q_vector *q_vector = container_of(napi,
8128                                                      struct igb_q_vector,
8129                                                      napi);
8130         bool clean_complete = true;
8131         int work_done = 0;
8132
8133 #ifdef CONFIG_IGB_DCA
8134         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
8135                 igb_update_dca(q_vector);
8136 #endif
8137         if (q_vector->tx.ring)
8138                 clean_complete = igb_clean_tx_irq(q_vector, budget);
8139
8140         if (q_vector->rx.ring) {
8141                 int cleaned = igb_clean_rx_irq(q_vector, budget);
8142
8143                 work_done += cleaned;
8144                 if (cleaned >= budget)
8145                         clean_complete = false;
8146         }
8147
8148         /* If all work not completed, return budget and keep polling */
8149         if (!clean_complete)
8150                 return budget;
8151
8152         /* Exit the polling mode, but don't re-enable interrupts if stack might
8153          * poll us due to busy-polling
8154          */
8155         if (likely(napi_complete_done(napi, work_done)))
8156                 igb_ring_irq_enable(q_vector);
8157
8158         return work_done;
8159 }
8160
8161 /**
8162  *  igb_clean_tx_irq - Reclaim resources after transmit completes
8163  *  @q_vector: pointer to q_vector containing needed info
8164  *  @napi_budget: Used to determine if we are in netpoll
8165  *
8166  *  returns true if ring is completely cleaned
8167  **/
8168 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
8169 {
8170         struct igb_adapter *adapter = q_vector->adapter;
8171         struct igb_ring *tx_ring = q_vector->tx.ring;
8172         struct igb_tx_buffer *tx_buffer;
8173         union e1000_adv_tx_desc *tx_desc;
8174         unsigned int total_bytes = 0, total_packets = 0;
8175         unsigned int budget = q_vector->tx.work_limit;
8176         unsigned int i = tx_ring->next_to_clean;
8177
8178         if (test_bit(__IGB_DOWN, &adapter->state))
8179                 return true;
8180
8181         tx_buffer = &tx_ring->tx_buffer_info[i];
8182         tx_desc = IGB_TX_DESC(tx_ring, i);
8183         i -= tx_ring->count;
8184
8185         do {
8186                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
8187
8188                 /* if next_to_watch is not set then there is no work pending */
8189                 if (!eop_desc)
8190                         break;
8191
8192                 /* prevent any other reads prior to eop_desc */
8193                 smp_rmb();
8194
8195                 /* if DD is not set pending work has not been completed */
8196                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
8197                         break;
8198
8199                 /* clear next_to_watch to prevent false hangs */
8200                 tx_buffer->next_to_watch = NULL;
8201
8202                 /* update the statistics for this packet */
8203                 total_bytes += tx_buffer->bytecount;
8204                 total_packets += tx_buffer->gso_segs;
8205
8206                 /* free the skb */
8207                 if (tx_buffer->type == IGB_TYPE_SKB)
8208                         napi_consume_skb(tx_buffer->skb, napi_budget);
8209                 else
8210                         xdp_return_frame(tx_buffer->xdpf);
8211
8212                 /* unmap skb header data */
8213                 dma_unmap_single(tx_ring->dev,
8214                                  dma_unmap_addr(tx_buffer, dma),
8215                                  dma_unmap_len(tx_buffer, len),
8216                                  DMA_TO_DEVICE);
8217
8218                 /* clear tx_buffer data */
8219                 dma_unmap_len_set(tx_buffer, len, 0);
8220
8221                 /* clear last DMA location and unmap remaining buffers */
8222                 while (tx_desc != eop_desc) {
8223                         tx_buffer++;
8224                         tx_desc++;
8225                         i++;
8226                         if (unlikely(!i)) {
8227                                 i -= tx_ring->count;
8228                                 tx_buffer = tx_ring->tx_buffer_info;
8229                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
8230                         }
8231
8232                         /* unmap any remaining paged data */
8233                         if (dma_unmap_len(tx_buffer, len)) {
8234                                 dma_unmap_page(tx_ring->dev,
8235                                                dma_unmap_addr(tx_buffer, dma),
8236                                                dma_unmap_len(tx_buffer, len),
8237                                                DMA_TO_DEVICE);
8238                                 dma_unmap_len_set(tx_buffer, len, 0);
8239                         }
8240                 }
8241
8242                 /* move us one more past the eop_desc for start of next pkt */
8243                 tx_buffer++;
8244                 tx_desc++;
8245                 i++;
8246                 if (unlikely(!i)) {
8247                         i -= tx_ring->count;
8248                         tx_buffer = tx_ring->tx_buffer_info;
8249                         tx_desc = IGB_TX_DESC(tx_ring, 0);
8250                 }
8251
8252                 /* issue prefetch for next Tx descriptor */
8253                 prefetch(tx_desc);
8254
8255                 /* update budget accounting */
8256                 budget--;
8257         } while (likely(budget));
8258
8259         netdev_tx_completed_queue(txring_txq(tx_ring),
8260                                   total_packets, total_bytes);
8261         i += tx_ring->count;
8262         tx_ring->next_to_clean = i;
8263         u64_stats_update_begin(&tx_ring->tx_syncp);
8264         tx_ring->tx_stats.bytes += total_bytes;
8265         tx_ring->tx_stats.packets += total_packets;
8266         u64_stats_update_end(&tx_ring->tx_syncp);
8267         q_vector->tx.total_bytes += total_bytes;
8268         q_vector->tx.total_packets += total_packets;
8269
8270         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
8271                 struct e1000_hw *hw = &adapter->hw;
8272
8273                 /* Detect a transmit hang in hardware, this serializes the
8274                  * check with the clearing of time_stamp and movement of i
8275                  */
8276                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
8277                 if (tx_buffer->next_to_watch &&
8278                     time_after(jiffies, tx_buffer->time_stamp +
8279                                (adapter->tx_timeout_factor * HZ)) &&
8280                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
8281
8282                         /* detected Tx unit hang */
8283                         dev_err(tx_ring->dev,
8284                                 "Detected Tx Unit Hang\n"
8285                                 "  Tx Queue             <%d>\n"
8286                                 "  TDH                  <%x>\n"
8287                                 "  TDT                  <%x>\n"
8288                                 "  next_to_use          <%x>\n"
8289                                 "  next_to_clean        <%x>\n"
8290                                 "buffer_info[next_to_clean]\n"
8291                                 "  time_stamp           <%lx>\n"
8292                                 "  next_to_watch        <%p>\n"
8293                                 "  jiffies              <%lx>\n"
8294                                 "  desc.status          <%x>\n",
8295                                 tx_ring->queue_index,
8296                                 rd32(E1000_TDH(tx_ring->reg_idx)),
8297                                 readl(tx_ring->tail),
8298                                 tx_ring->next_to_use,
8299                                 tx_ring->next_to_clean,
8300                                 tx_buffer->time_stamp,
8301                                 tx_buffer->next_to_watch,
8302                                 jiffies,
8303                                 tx_buffer->next_to_watch->wb.status);
8304                         netif_stop_subqueue(tx_ring->netdev,
8305                                             tx_ring->queue_index);
8306
8307                         /* we are about to reset, no point in enabling stuff */
8308                         return true;
8309                 }
8310         }
8311
8312 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
8313         if (unlikely(total_packets &&
8314             netif_carrier_ok(tx_ring->netdev) &&
8315             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
8316                 /* Make sure that anybody stopping the queue after this
8317                  * sees the new next_to_clean.
8318                  */
8319                 smp_mb();
8320                 if (__netif_subqueue_stopped(tx_ring->netdev,
8321                                              tx_ring->queue_index) &&
8322                     !(test_bit(__IGB_DOWN, &adapter->state))) {
8323                         netif_wake_subqueue(tx_ring->netdev,
8324                                             tx_ring->queue_index);
8325
8326                         u64_stats_update_begin(&tx_ring->tx_syncp);
8327                         tx_ring->tx_stats.restart_queue++;
8328                         u64_stats_update_end(&tx_ring->tx_syncp);
8329                 }
8330         }
8331
8332         return !!budget;
8333 }
8334
8335 /**
8336  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
8337  *  @rx_ring: rx descriptor ring to store buffers on
8338  *  @old_buff: donor buffer to have page reused
8339  *
8340  *  Synchronizes page for reuse by the adapter
8341  **/
8342 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
8343                               struct igb_rx_buffer *old_buff)
8344 {
8345         struct igb_rx_buffer *new_buff;
8346         u16 nta = rx_ring->next_to_alloc;
8347
8348         new_buff = &rx_ring->rx_buffer_info[nta];
8349
8350         /* update, and store next to alloc */
8351         nta++;
8352         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
8353
8354         /* Transfer page from old buffer to new buffer.
8355          * Move each member individually to avoid possible store
8356          * forwarding stalls.
8357          */
8358         new_buff->dma           = old_buff->dma;
8359         new_buff->page          = old_buff->page;
8360         new_buff->page_offset   = old_buff->page_offset;
8361         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
8362 }
8363
8364 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
8365                                   int rx_buf_pgcnt)
8366 {
8367         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
8368         struct page *page = rx_buffer->page;
8369
8370         /* avoid re-using remote and pfmemalloc pages */
8371         if (!dev_page_is_reusable(page))
8372                 return false;
8373
8374 #if (PAGE_SIZE < 8192)
8375         /* if we are only owner of page we can reuse it */
8376         if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
8377                 return false;
8378 #else
8379 #define IGB_LAST_OFFSET \
8380         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
8381
8382         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
8383                 return false;
8384 #endif
8385
8386         /* If we have drained the page fragment pool we need to update
8387          * the pagecnt_bias and page count so that we fully restock the
8388          * number of references the driver holds.
8389          */
8390         if (unlikely(pagecnt_bias == 1)) {
8391                 page_ref_add(page, USHRT_MAX - 1);
8392                 rx_buffer->pagecnt_bias = USHRT_MAX;
8393         }
8394
8395         return true;
8396 }
8397
8398 /**
8399  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
8400  *  @rx_ring: rx descriptor ring to transact packets on
8401  *  @rx_buffer: buffer containing page to add
8402  *  @skb: sk_buff to place the data into
8403  *  @size: size of buffer to be added
8404  *
8405  *  This function will add the data contained in rx_buffer->page to the skb.
8406  **/
8407 static void igb_add_rx_frag(struct igb_ring *rx_ring,
8408                             struct igb_rx_buffer *rx_buffer,
8409                             struct sk_buff *skb,
8410                             unsigned int size)
8411 {
8412 #if (PAGE_SIZE < 8192)
8413         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8414 #else
8415         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
8416                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
8417                                 SKB_DATA_ALIGN(size);
8418 #endif
8419         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
8420                         rx_buffer->page_offset, size, truesize);
8421 #if (PAGE_SIZE < 8192)
8422         rx_buffer->page_offset ^= truesize;
8423 #else
8424         rx_buffer->page_offset += truesize;
8425 #endif
8426 }
8427
8428 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8429                                          struct igb_rx_buffer *rx_buffer,
8430                                          struct xdp_buff *xdp,
8431                                          ktime_t timestamp)
8432 {
8433 #if (PAGE_SIZE < 8192)
8434         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8435 #else
8436         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
8437                                                xdp->data_hard_start);
8438 #endif
8439         unsigned int size = xdp->data_end - xdp->data;
8440         unsigned int headlen;
8441         struct sk_buff *skb;
8442
8443         /* prefetch first cache line of first page */
8444         net_prefetch(xdp->data);
8445
8446         /* allocate a skb to store the frags */
8447         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8448         if (unlikely(!skb))
8449                 return NULL;
8450
8451         if (timestamp)
8452                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8453
8454         /* Determine available headroom for copy */
8455         headlen = size;
8456         if (headlen > IGB_RX_HDR_LEN)
8457                 headlen = eth_get_headlen(skb->dev, xdp->data, IGB_RX_HDR_LEN);
8458
8459         /* align pull length to size of long to optimize memcpy performance */
8460         memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen, sizeof(long)));
8461
8462         /* update all of the pointers */
8463         size -= headlen;
8464         if (size) {
8465                 skb_add_rx_frag(skb, 0, rx_buffer->page,
8466                                 (xdp->data + headlen) - page_address(rx_buffer->page),
8467                                 size, truesize);
8468 #if (PAGE_SIZE < 8192)
8469                 rx_buffer->page_offset ^= truesize;
8470 #else
8471                 rx_buffer->page_offset += truesize;
8472 #endif
8473         } else {
8474                 rx_buffer->pagecnt_bias++;
8475         }
8476
8477         return skb;
8478 }
8479
8480 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8481                                      struct igb_rx_buffer *rx_buffer,
8482                                      struct xdp_buff *xdp,
8483                                      ktime_t timestamp)
8484 {
8485 #if (PAGE_SIZE < 8192)
8486         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8487 #else
8488         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8489                                 SKB_DATA_ALIGN(xdp->data_end -
8490                                                xdp->data_hard_start);
8491 #endif
8492         unsigned int metasize = xdp->data - xdp->data_meta;
8493         struct sk_buff *skb;
8494
8495         /* prefetch first cache line of first page */
8496         net_prefetch(xdp->data_meta);
8497
8498         /* build an skb around the page buffer */
8499         skb = napi_build_skb(xdp->data_hard_start, truesize);
8500         if (unlikely(!skb))
8501                 return NULL;
8502
8503         /* update pointers within the skb to store the data */
8504         skb_reserve(skb, xdp->data - xdp->data_hard_start);
8505         __skb_put(skb, xdp->data_end - xdp->data);
8506
8507         if (metasize)
8508                 skb_metadata_set(skb, metasize);
8509
8510         if (timestamp)
8511                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8512
8513         /* update buffer offset */
8514 #if (PAGE_SIZE < 8192)
8515         rx_buffer->page_offset ^= truesize;
8516 #else
8517         rx_buffer->page_offset += truesize;
8518 #endif
8519
8520         return skb;
8521 }
8522
8523 static struct sk_buff *igb_run_xdp(struct igb_adapter *adapter,
8524                                    struct igb_ring *rx_ring,
8525                                    struct xdp_buff *xdp)
8526 {
8527         int err, result = IGB_XDP_PASS;
8528         struct bpf_prog *xdp_prog;
8529         u32 act;
8530
8531         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
8532
8533         if (!xdp_prog)
8534                 goto xdp_out;
8535
8536         prefetchw(xdp->data_hard_start); /* xdp_frame write */
8537
8538         act = bpf_prog_run_xdp(xdp_prog, xdp);
8539         switch (act) {
8540         case XDP_PASS:
8541                 break;
8542         case XDP_TX:
8543                 result = igb_xdp_xmit_back(adapter, xdp);
8544                 if (result == IGB_XDP_CONSUMED)
8545                         goto out_failure;
8546                 break;
8547         case XDP_REDIRECT:
8548                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
8549                 if (err)
8550                         goto out_failure;
8551                 result = IGB_XDP_REDIR;
8552                 break;
8553         default:
8554                 bpf_warn_invalid_xdp_action(adapter->netdev, xdp_prog, act);
8555                 fallthrough;
8556         case XDP_ABORTED:
8557 out_failure:
8558                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
8559                 fallthrough;
8560         case XDP_DROP:
8561                 result = IGB_XDP_CONSUMED;
8562                 break;
8563         }
8564 xdp_out:
8565         return ERR_PTR(-result);
8566 }
8567
8568 static unsigned int igb_rx_frame_truesize(struct igb_ring *rx_ring,
8569                                           unsigned int size)
8570 {
8571         unsigned int truesize;
8572
8573 #if (PAGE_SIZE < 8192)
8574         truesize = igb_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
8575 #else
8576         truesize = ring_uses_build_skb(rx_ring) ?
8577                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) +
8578                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
8579                 SKB_DATA_ALIGN(size);
8580 #endif
8581         return truesize;
8582 }
8583
8584 static void igb_rx_buffer_flip(struct igb_ring *rx_ring,
8585                                struct igb_rx_buffer *rx_buffer,
8586                                unsigned int size)
8587 {
8588         unsigned int truesize = igb_rx_frame_truesize(rx_ring, size);
8589 #if (PAGE_SIZE < 8192)
8590         rx_buffer->page_offset ^= truesize;
8591 #else
8592         rx_buffer->page_offset += truesize;
8593 #endif
8594 }
8595
8596 static inline void igb_rx_checksum(struct igb_ring *ring,
8597                                    union e1000_adv_rx_desc *rx_desc,
8598                                    struct sk_buff *skb)
8599 {
8600         skb_checksum_none_assert(skb);
8601
8602         /* Ignore Checksum bit is set */
8603         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8604                 return;
8605
8606         /* Rx checksum disabled via ethtool */
8607         if (!(ring->netdev->features & NETIF_F_RXCSUM))
8608                 return;
8609
8610         /* TCP/UDP checksum error bit is set */
8611         if (igb_test_staterr(rx_desc,
8612                              E1000_RXDEXT_STATERR_TCPE |
8613                              E1000_RXDEXT_STATERR_IPE)) {
8614                 /* work around errata with sctp packets where the TCPE aka
8615                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8616                  * packets, (aka let the stack check the crc32c)
8617                  */
8618                 if (!((skb->len == 60) &&
8619                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8620                         u64_stats_update_begin(&ring->rx_syncp);
8621                         ring->rx_stats.csum_err++;
8622                         u64_stats_update_end(&ring->rx_syncp);
8623                 }
8624                 /* let the stack verify checksum errors */
8625                 return;
8626         }
8627         /* It must be a TCP or UDP packet with a valid checksum */
8628         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8629                                       E1000_RXD_STAT_UDPCS))
8630                 skb->ip_summed = CHECKSUM_UNNECESSARY;
8631
8632         dev_dbg(ring->dev, "cksum success: bits %08X\n",
8633                 le32_to_cpu(rx_desc->wb.upper.status_error));
8634 }
8635
8636 static inline void igb_rx_hash(struct igb_ring *ring,
8637                                union e1000_adv_rx_desc *rx_desc,
8638                                struct sk_buff *skb)
8639 {
8640         if (ring->netdev->features & NETIF_F_RXHASH)
8641                 skb_set_hash(skb,
8642                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8643                              PKT_HASH_TYPE_L3);
8644 }
8645
8646 /**
8647  *  igb_is_non_eop - process handling of non-EOP buffers
8648  *  @rx_ring: Rx ring being processed
8649  *  @rx_desc: Rx descriptor for current buffer
8650  *
8651  *  This function updates next to clean.  If the buffer is an EOP buffer
8652  *  this function exits returning false, otherwise it will place the
8653  *  sk_buff in the next buffer to be chained and return true indicating
8654  *  that this is in fact a non-EOP buffer.
8655  **/
8656 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8657                            union e1000_adv_rx_desc *rx_desc)
8658 {
8659         u32 ntc = rx_ring->next_to_clean + 1;
8660
8661         /* fetch, update, and store next to clean */
8662         ntc = (ntc < rx_ring->count) ? ntc : 0;
8663         rx_ring->next_to_clean = ntc;
8664
8665         prefetch(IGB_RX_DESC(rx_ring, ntc));
8666
8667         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8668                 return false;
8669
8670         return true;
8671 }
8672
8673 /**
8674  *  igb_cleanup_headers - Correct corrupted or empty headers
8675  *  @rx_ring: rx descriptor ring packet is being transacted on
8676  *  @rx_desc: pointer to the EOP Rx descriptor
8677  *  @skb: pointer to current skb being fixed
8678  *
8679  *  Address the case where we are pulling data in on pages only
8680  *  and as such no data is present in the skb header.
8681  *
8682  *  In addition if skb is not at least 60 bytes we need to pad it so that
8683  *  it is large enough to qualify as a valid Ethernet frame.
8684  *
8685  *  Returns true if an error was encountered and skb was freed.
8686  **/
8687 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8688                                 union e1000_adv_rx_desc *rx_desc,
8689                                 struct sk_buff *skb)
8690 {
8691         /* XDP packets use error pointer so abort at this point */
8692         if (IS_ERR(skb))
8693                 return true;
8694
8695         if (unlikely((igb_test_staterr(rx_desc,
8696                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8697                 struct net_device *netdev = rx_ring->netdev;
8698                 if (!(netdev->features & NETIF_F_RXALL)) {
8699                         dev_kfree_skb_any(skb);
8700                         return true;
8701                 }
8702         }
8703
8704         /* if eth_skb_pad returns an error the skb was freed */
8705         if (eth_skb_pad(skb))
8706                 return true;
8707
8708         return false;
8709 }
8710
8711 /**
8712  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
8713  *  @rx_ring: rx descriptor ring packet is being transacted on
8714  *  @rx_desc: pointer to the EOP Rx descriptor
8715  *  @skb: pointer to current skb being populated
8716  *
8717  *  This function checks the ring, descriptor, and packet information in
8718  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
8719  *  other fields within the skb.
8720  **/
8721 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8722                                    union e1000_adv_rx_desc *rx_desc,
8723                                    struct sk_buff *skb)
8724 {
8725         struct net_device *dev = rx_ring->netdev;
8726
8727         igb_rx_hash(rx_ring, rx_desc, skb);
8728
8729         igb_rx_checksum(rx_ring, rx_desc, skb);
8730
8731         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8732             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8733                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8734
8735         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8736             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8737                 u16 vid;
8738
8739                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8740                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8741                         vid = be16_to_cpu((__force __be16)rx_desc->wb.upper.vlan);
8742                 else
8743                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8744
8745                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8746         }
8747
8748         skb_record_rx_queue(skb, rx_ring->queue_index);
8749
8750         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8751 }
8752
8753 static unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8754 {
8755         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8756 }
8757
8758 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8759                                                const unsigned int size, int *rx_buf_pgcnt)
8760 {
8761         struct igb_rx_buffer *rx_buffer;
8762
8763         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8764         *rx_buf_pgcnt =
8765 #if (PAGE_SIZE < 8192)
8766                 page_count(rx_buffer->page);
8767 #else
8768                 0;
8769 #endif
8770         prefetchw(rx_buffer->page);
8771
8772         /* we are reusing so sync this buffer for CPU use */
8773         dma_sync_single_range_for_cpu(rx_ring->dev,
8774                                       rx_buffer->dma,
8775                                       rx_buffer->page_offset,
8776                                       size,
8777                                       DMA_FROM_DEVICE);
8778
8779         rx_buffer->pagecnt_bias--;
8780
8781         return rx_buffer;
8782 }
8783
8784 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8785                               struct igb_rx_buffer *rx_buffer, int rx_buf_pgcnt)
8786 {
8787         if (igb_can_reuse_rx_page(rx_buffer, rx_buf_pgcnt)) {
8788                 /* hand second half of page back to the ring */
8789                 igb_reuse_rx_page(rx_ring, rx_buffer);
8790         } else {
8791                 /* We are not reusing the buffer so unmap it and free
8792                  * any references we are holding to it
8793                  */
8794                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8795                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8796                                      IGB_RX_DMA_ATTR);
8797                 __page_frag_cache_drain(rx_buffer->page,
8798                                         rx_buffer->pagecnt_bias);
8799         }
8800
8801         /* clear contents of rx_buffer */
8802         rx_buffer->page = NULL;
8803 }
8804
8805 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8806 {
8807         struct igb_adapter *adapter = q_vector->adapter;
8808         struct igb_ring *rx_ring = q_vector->rx.ring;
8809         struct sk_buff *skb = rx_ring->skb;
8810         unsigned int total_bytes = 0, total_packets = 0;
8811         u16 cleaned_count = igb_desc_unused(rx_ring);
8812         unsigned int xdp_xmit = 0;
8813         struct xdp_buff xdp;
8814         u32 frame_sz = 0;
8815         int rx_buf_pgcnt;
8816
8817         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
8818 #if (PAGE_SIZE < 8192)
8819         frame_sz = igb_rx_frame_truesize(rx_ring, 0);
8820 #endif
8821         xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
8822
8823         while (likely(total_packets < budget)) {
8824                 union e1000_adv_rx_desc *rx_desc;
8825                 struct igb_rx_buffer *rx_buffer;
8826                 ktime_t timestamp = 0;
8827                 int pkt_offset = 0;
8828                 unsigned int size;
8829                 void *pktbuf;
8830
8831                 /* return some buffers to hardware, one at a time is too slow */
8832                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8833                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8834                         cleaned_count = 0;
8835                 }
8836
8837                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8838                 size = le16_to_cpu(rx_desc->wb.upper.length);
8839                 if (!size)
8840                         break;
8841
8842                 /* This memory barrier is needed to keep us from reading
8843                  * any other fields out of the rx_desc until we know the
8844                  * descriptor has been written back
8845                  */
8846                 dma_rmb();
8847
8848                 rx_buffer = igb_get_rx_buffer(rx_ring, size, &rx_buf_pgcnt);
8849                 pktbuf = page_address(rx_buffer->page) + rx_buffer->page_offset;
8850
8851                 /* pull rx packet timestamp if available and valid */
8852                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8853                         int ts_hdr_len;
8854
8855                         ts_hdr_len = igb_ptp_rx_pktstamp(rx_ring->q_vector,
8856                                                          pktbuf, &timestamp);
8857
8858                         pkt_offset += ts_hdr_len;
8859                         size -= ts_hdr_len;
8860                 }
8861
8862                 /* retrieve a buffer from the ring */
8863                 if (!skb) {
8864                         unsigned char *hard_start = pktbuf - igb_rx_offset(rx_ring);
8865                         unsigned int offset = pkt_offset + igb_rx_offset(rx_ring);
8866
8867                         xdp_prepare_buff(&xdp, hard_start, offset, size, true);
8868                         xdp_buff_clear_frags_flag(&xdp);
8869 #if (PAGE_SIZE > 4096)
8870                         /* At larger PAGE_SIZE, frame_sz depend on len size */
8871                         xdp.frame_sz = igb_rx_frame_truesize(rx_ring, size);
8872 #endif
8873                         skb = igb_run_xdp(adapter, rx_ring, &xdp);
8874                 }
8875
8876                 if (IS_ERR(skb)) {
8877                         unsigned int xdp_res = -PTR_ERR(skb);
8878
8879                         if (xdp_res & (IGB_XDP_TX | IGB_XDP_REDIR)) {
8880                                 xdp_xmit |= xdp_res;
8881                                 igb_rx_buffer_flip(rx_ring, rx_buffer, size);
8882                         } else {
8883                                 rx_buffer->pagecnt_bias++;
8884                         }
8885                         total_packets++;
8886                         total_bytes += size;
8887                 } else if (skb)
8888                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8889                 else if (ring_uses_build_skb(rx_ring))
8890                         skb = igb_build_skb(rx_ring, rx_buffer, &xdp,
8891                                             timestamp);
8892                 else
8893                         skb = igb_construct_skb(rx_ring, rx_buffer,
8894                                                 &xdp, timestamp);
8895
8896                 /* exit if we failed to retrieve a buffer */
8897                 if (!skb) {
8898                         rx_ring->rx_stats.alloc_failed++;
8899                         rx_buffer->pagecnt_bias++;
8900                         break;
8901                 }
8902
8903                 igb_put_rx_buffer(rx_ring, rx_buffer, rx_buf_pgcnt);
8904                 cleaned_count++;
8905
8906                 /* fetch next buffer in frame if non-eop */
8907                 if (igb_is_non_eop(rx_ring, rx_desc))
8908                         continue;
8909
8910                 /* verify the packet layout is correct */
8911                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8912                         skb = NULL;
8913                         continue;
8914                 }
8915
8916                 /* probably a little skewed due to removing CRC */
8917                 total_bytes += skb->len;
8918
8919                 /* populate checksum, timestamp, VLAN, and protocol */
8920                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8921
8922                 napi_gro_receive(&q_vector->napi, skb);
8923
8924                 /* reset skb pointer */
8925                 skb = NULL;
8926
8927                 /* update budget accounting */
8928                 total_packets++;
8929         }
8930
8931         /* place incomplete frames back on ring for completion */
8932         rx_ring->skb = skb;
8933
8934         if (xdp_xmit & IGB_XDP_REDIR)
8935                 xdp_do_flush();
8936
8937         if (xdp_xmit & IGB_XDP_TX) {
8938                 struct igb_ring *tx_ring = igb_xdp_tx_queue_mapping(adapter);
8939
8940                 igb_xdp_ring_update_tail(tx_ring);
8941         }
8942
8943         u64_stats_update_begin(&rx_ring->rx_syncp);
8944         rx_ring->rx_stats.packets += total_packets;
8945         rx_ring->rx_stats.bytes += total_bytes;
8946         u64_stats_update_end(&rx_ring->rx_syncp);
8947         q_vector->rx.total_packets += total_packets;
8948         q_vector->rx.total_bytes += total_bytes;
8949
8950         if (cleaned_count)
8951                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8952
8953         return total_packets;
8954 }
8955
8956 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8957                                   struct igb_rx_buffer *bi)
8958 {
8959         struct page *page = bi->page;
8960         dma_addr_t dma;
8961
8962         /* since we are recycling buffers we should seldom need to alloc */
8963         if (likely(page))
8964                 return true;
8965
8966         /* alloc new page for storage */
8967         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
8968         if (unlikely(!page)) {
8969                 rx_ring->rx_stats.alloc_failed++;
8970                 return false;
8971         }
8972
8973         /* map page for use */
8974         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
8975                                  igb_rx_pg_size(rx_ring),
8976                                  DMA_FROM_DEVICE,
8977                                  IGB_RX_DMA_ATTR);
8978
8979         /* if mapping failed free memory back to system since
8980          * there isn't much point in holding memory we can't use
8981          */
8982         if (dma_mapping_error(rx_ring->dev, dma)) {
8983                 __free_pages(page, igb_rx_pg_order(rx_ring));
8984
8985                 rx_ring->rx_stats.alloc_failed++;
8986                 return false;
8987         }
8988
8989         bi->dma = dma;
8990         bi->page = page;
8991         bi->page_offset = igb_rx_offset(rx_ring);
8992         page_ref_add(page, USHRT_MAX - 1);
8993         bi->pagecnt_bias = USHRT_MAX;
8994
8995         return true;
8996 }
8997
8998 /**
8999  *  igb_alloc_rx_buffers - Replace used receive buffers
9000  *  @rx_ring: rx descriptor ring to allocate new receive buffers
9001  *  @cleaned_count: count of buffers to allocate
9002  **/
9003 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
9004 {
9005         union e1000_adv_rx_desc *rx_desc;
9006         struct igb_rx_buffer *bi;
9007         u16 i = rx_ring->next_to_use;
9008         u16 bufsz;
9009
9010         /* nothing to do */
9011         if (!cleaned_count)
9012                 return;
9013
9014         rx_desc = IGB_RX_DESC(rx_ring, i);
9015         bi = &rx_ring->rx_buffer_info[i];
9016         i -= rx_ring->count;
9017
9018         bufsz = igb_rx_bufsz(rx_ring);
9019
9020         do {
9021                 if (!igb_alloc_mapped_page(rx_ring, bi))
9022                         break;
9023
9024                 /* sync the buffer for use by the device */
9025                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
9026                                                  bi->page_offset, bufsz,
9027                                                  DMA_FROM_DEVICE);
9028
9029                 /* Refresh the desc even if buffer_addrs didn't change
9030                  * because each write-back erases this info.
9031                  */
9032                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
9033
9034                 rx_desc++;
9035                 bi++;
9036                 i++;
9037                 if (unlikely(!i)) {
9038                         rx_desc = IGB_RX_DESC(rx_ring, 0);
9039                         bi = rx_ring->rx_buffer_info;
9040                         i -= rx_ring->count;
9041                 }
9042
9043                 /* clear the length for the next_to_use descriptor */
9044                 rx_desc->wb.upper.length = 0;
9045
9046                 cleaned_count--;
9047         } while (cleaned_count);
9048
9049         i += rx_ring->count;
9050
9051         if (rx_ring->next_to_use != i) {
9052                 /* record the next descriptor to use */
9053                 rx_ring->next_to_use = i;
9054
9055                 /* update next to alloc since we have filled the ring */
9056                 rx_ring->next_to_alloc = i;
9057
9058                 /* Force memory writes to complete before letting h/w
9059                  * know there are new descriptors to fetch.  (Only
9060                  * applicable for weak-ordered memory model archs,
9061                  * such as IA-64).
9062                  */
9063                 dma_wmb();
9064                 writel(i, rx_ring->tail);
9065         }
9066 }
9067
9068 /**
9069  * igb_mii_ioctl -
9070  * @netdev: pointer to netdev struct
9071  * @ifr: interface structure
9072  * @cmd: ioctl command to execute
9073  **/
9074 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
9075 {
9076         struct igb_adapter *adapter = netdev_priv(netdev);
9077         struct mii_ioctl_data *data = if_mii(ifr);
9078
9079         if (adapter->hw.phy.media_type != e1000_media_type_copper)
9080                 return -EOPNOTSUPP;
9081
9082         switch (cmd) {
9083         case SIOCGMIIPHY:
9084                 data->phy_id = adapter->hw.phy.addr;
9085                 break;
9086         case SIOCGMIIREG:
9087                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
9088                                      &data->val_out))
9089                         return -EIO;
9090                 break;
9091         case SIOCSMIIREG:
9092         default:
9093                 return -EOPNOTSUPP;
9094         }
9095         return 0;
9096 }
9097
9098 /**
9099  * igb_ioctl -
9100  * @netdev: pointer to netdev struct
9101  * @ifr: interface structure
9102  * @cmd: ioctl command to execute
9103  **/
9104 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
9105 {
9106         switch (cmd) {
9107         case SIOCGMIIPHY:
9108         case SIOCGMIIREG:
9109         case SIOCSMIIREG:
9110                 return igb_mii_ioctl(netdev, ifr, cmd);
9111         case SIOCGHWTSTAMP:
9112                 return igb_ptp_get_ts_config(netdev, ifr);
9113         case SIOCSHWTSTAMP:
9114                 return igb_ptp_set_ts_config(netdev, ifr);
9115         default:
9116                 return -EOPNOTSUPP;
9117         }
9118 }
9119
9120 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9121 {
9122         struct igb_adapter *adapter = hw->back;
9123
9124         pci_read_config_word(adapter->pdev, reg, value);
9125 }
9126
9127 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9128 {
9129         struct igb_adapter *adapter = hw->back;
9130
9131         pci_write_config_word(adapter->pdev, reg, *value);
9132 }
9133
9134 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9135 {
9136         struct igb_adapter *adapter = hw->back;
9137
9138         if (pcie_capability_read_word(adapter->pdev, reg, value))
9139                 return -E1000_ERR_CONFIG;
9140
9141         return 0;
9142 }
9143
9144 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9145 {
9146         struct igb_adapter *adapter = hw->back;
9147
9148         if (pcie_capability_write_word(adapter->pdev, reg, *value))
9149                 return -E1000_ERR_CONFIG;
9150
9151         return 0;
9152 }
9153
9154 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
9155 {
9156         struct igb_adapter *adapter = netdev_priv(netdev);
9157         struct e1000_hw *hw = &adapter->hw;
9158         u32 ctrl, rctl;
9159         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
9160
9161         if (enable) {
9162                 /* enable VLAN tag insert/strip */
9163                 ctrl = rd32(E1000_CTRL);
9164                 ctrl |= E1000_CTRL_VME;
9165                 wr32(E1000_CTRL, ctrl);
9166
9167                 /* Disable CFI check */
9168                 rctl = rd32(E1000_RCTL);
9169                 rctl &= ~E1000_RCTL_CFIEN;
9170                 wr32(E1000_RCTL, rctl);
9171         } else {
9172                 /* disable VLAN tag insert/strip */
9173                 ctrl = rd32(E1000_CTRL);
9174                 ctrl &= ~E1000_CTRL_VME;
9175                 wr32(E1000_CTRL, ctrl);
9176         }
9177
9178         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
9179 }
9180
9181 static int igb_vlan_rx_add_vid(struct net_device *netdev,
9182                                __be16 proto, u16 vid)
9183 {
9184         struct igb_adapter *adapter = netdev_priv(netdev);
9185         struct e1000_hw *hw = &adapter->hw;
9186         int pf_id = adapter->vfs_allocated_count;
9187
9188         /* add the filter since PF can receive vlans w/o entry in vlvf */
9189         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9190                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
9191
9192         set_bit(vid, adapter->active_vlans);
9193
9194         return 0;
9195 }
9196
9197 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
9198                                 __be16 proto, u16 vid)
9199 {
9200         struct igb_adapter *adapter = netdev_priv(netdev);
9201         int pf_id = adapter->vfs_allocated_count;
9202         struct e1000_hw *hw = &adapter->hw;
9203
9204         /* remove VID from filter table */
9205         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9206                 igb_vfta_set(hw, vid, pf_id, false, true);
9207
9208         clear_bit(vid, adapter->active_vlans);
9209
9210         return 0;
9211 }
9212
9213 static void igb_restore_vlan(struct igb_adapter *adapter)
9214 {
9215         u16 vid = 1;
9216
9217         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
9218         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
9219
9220         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
9221                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
9222 }
9223
9224 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
9225 {
9226         struct pci_dev *pdev = adapter->pdev;
9227         struct e1000_mac_info *mac = &adapter->hw.mac;
9228
9229         mac->autoneg = 0;
9230
9231         /* Make sure dplx is at most 1 bit and lsb of speed is not set
9232          * for the switch() below to work
9233          */
9234         if ((spd & 1) || (dplx & ~1))
9235                 goto err_inval;
9236
9237         /* Fiber NIC's only allow 1000 gbps Full duplex
9238          * and 100Mbps Full duplex for 100baseFx sfp
9239          */
9240         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
9241                 switch (spd + dplx) {
9242                 case SPEED_10 + DUPLEX_HALF:
9243                 case SPEED_10 + DUPLEX_FULL:
9244                 case SPEED_100 + DUPLEX_HALF:
9245                         goto err_inval;
9246                 default:
9247                         break;
9248                 }
9249         }
9250
9251         switch (spd + dplx) {
9252         case SPEED_10 + DUPLEX_HALF:
9253                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
9254                 break;
9255         case SPEED_10 + DUPLEX_FULL:
9256                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
9257                 break;
9258         case SPEED_100 + DUPLEX_HALF:
9259                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
9260                 break;
9261         case SPEED_100 + DUPLEX_FULL:
9262                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
9263                 break;
9264         case SPEED_1000 + DUPLEX_FULL:
9265                 mac->autoneg = 1;
9266                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
9267                 break;
9268         case SPEED_1000 + DUPLEX_HALF: /* not supported */
9269         default:
9270                 goto err_inval;
9271         }
9272
9273         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
9274         adapter->hw.phy.mdix = AUTO_ALL_MODES;
9275
9276         return 0;
9277
9278 err_inval:
9279         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
9280         return -EINVAL;
9281 }
9282
9283 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
9284                           bool runtime)
9285 {
9286         struct net_device *netdev = pci_get_drvdata(pdev);
9287         struct igb_adapter *adapter = netdev_priv(netdev);
9288         struct e1000_hw *hw = &adapter->hw;
9289         u32 ctrl, rctl, status;
9290         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
9291         bool wake;
9292
9293         rtnl_lock();
9294         netif_device_detach(netdev);
9295
9296         if (netif_running(netdev))
9297                 __igb_close(netdev, true);
9298
9299         igb_ptp_suspend(adapter);
9300
9301         igb_clear_interrupt_scheme(adapter);
9302         rtnl_unlock();
9303
9304         status = rd32(E1000_STATUS);
9305         if (status & E1000_STATUS_LU)
9306                 wufc &= ~E1000_WUFC_LNKC;
9307
9308         if (wufc) {
9309                 igb_setup_rctl(adapter);
9310                 igb_set_rx_mode(netdev);
9311
9312                 /* turn on all-multi mode if wake on multicast is enabled */
9313                 if (wufc & E1000_WUFC_MC) {
9314                         rctl = rd32(E1000_RCTL);
9315                         rctl |= E1000_RCTL_MPE;
9316                         wr32(E1000_RCTL, rctl);
9317                 }
9318
9319                 ctrl = rd32(E1000_CTRL);
9320                 ctrl |= E1000_CTRL_ADVD3WUC;
9321                 wr32(E1000_CTRL, ctrl);
9322
9323                 /* Allow time for pending master requests to run */
9324                 igb_disable_pcie_master(hw);
9325
9326                 wr32(E1000_WUC, E1000_WUC_PME_EN);
9327                 wr32(E1000_WUFC, wufc);
9328         } else {
9329                 wr32(E1000_WUC, 0);
9330                 wr32(E1000_WUFC, 0);
9331         }
9332
9333         wake = wufc || adapter->en_mng_pt;
9334         if (!wake)
9335                 igb_power_down_link(adapter);
9336         else
9337                 igb_power_up_link(adapter);
9338
9339         if (enable_wake)
9340                 *enable_wake = wake;
9341
9342         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
9343          * would have already happened in close and is redundant.
9344          */
9345         igb_release_hw_control(adapter);
9346
9347         pci_disable_device(pdev);
9348
9349         return 0;
9350 }
9351
9352 static void igb_deliver_wake_packet(struct net_device *netdev)
9353 {
9354         struct igb_adapter *adapter = netdev_priv(netdev);
9355         struct e1000_hw *hw = &adapter->hw;
9356         struct sk_buff *skb;
9357         u32 wupl;
9358
9359         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
9360
9361         /* WUPM stores only the first 128 bytes of the wake packet.
9362          * Read the packet only if we have the whole thing.
9363          */
9364         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
9365                 return;
9366
9367         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
9368         if (!skb)
9369                 return;
9370
9371         skb_put(skb, wupl);
9372
9373         /* Ensure reads are 32-bit aligned */
9374         wupl = roundup(wupl, 4);
9375
9376         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
9377
9378         skb->protocol = eth_type_trans(skb, netdev);
9379         netif_rx(skb);
9380 }
9381
9382 static int __maybe_unused igb_suspend(struct device *dev)
9383 {
9384         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
9385 }
9386
9387 static int __maybe_unused __igb_resume(struct device *dev, bool rpm)
9388 {
9389         struct pci_dev *pdev = to_pci_dev(dev);
9390         struct net_device *netdev = pci_get_drvdata(pdev);
9391         struct igb_adapter *adapter = netdev_priv(netdev);
9392         struct e1000_hw *hw = &adapter->hw;
9393         u32 err, val;
9394
9395         pci_set_power_state(pdev, PCI_D0);
9396         pci_restore_state(pdev);
9397         pci_save_state(pdev);
9398
9399         if (!pci_device_is_present(pdev))
9400                 return -ENODEV;
9401         err = pci_enable_device_mem(pdev);
9402         if (err) {
9403                 dev_err(&pdev->dev,
9404                         "igb: Cannot enable PCI device from suspend\n");
9405                 return err;
9406         }
9407         pci_set_master(pdev);
9408
9409         pci_enable_wake(pdev, PCI_D3hot, 0);
9410         pci_enable_wake(pdev, PCI_D3cold, 0);
9411
9412         if (igb_init_interrupt_scheme(adapter, true)) {
9413                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9414                 return -ENOMEM;
9415         }
9416
9417         igb_reset(adapter);
9418
9419         /* let the f/w know that the h/w is now under the control of the
9420          * driver.
9421          */
9422         igb_get_hw_control(adapter);
9423
9424         val = rd32(E1000_WUS);
9425         if (val & WAKE_PKT_WUS)
9426                 igb_deliver_wake_packet(netdev);
9427
9428         wr32(E1000_WUS, ~0);
9429
9430         if (!rpm)
9431                 rtnl_lock();
9432         if (!err && netif_running(netdev))
9433                 err = __igb_open(netdev, true);
9434
9435         if (!err)
9436                 netif_device_attach(netdev);
9437         if (!rpm)
9438                 rtnl_unlock();
9439
9440         return err;
9441 }
9442
9443 static int __maybe_unused igb_resume(struct device *dev)
9444 {
9445         return __igb_resume(dev, false);
9446 }
9447
9448 static int __maybe_unused igb_runtime_idle(struct device *dev)
9449 {
9450         struct net_device *netdev = dev_get_drvdata(dev);
9451         struct igb_adapter *adapter = netdev_priv(netdev);
9452
9453         if (!igb_has_link(adapter))
9454                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9455
9456         return -EBUSY;
9457 }
9458
9459 static int __maybe_unused igb_runtime_suspend(struct device *dev)
9460 {
9461         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
9462 }
9463
9464 static int __maybe_unused igb_runtime_resume(struct device *dev)
9465 {
9466         return __igb_resume(dev, true);
9467 }
9468
9469 static void igb_shutdown(struct pci_dev *pdev)
9470 {
9471         bool wake;
9472
9473         __igb_shutdown(pdev, &wake, 0);
9474
9475         if (system_state == SYSTEM_POWER_OFF) {
9476                 pci_wake_from_d3(pdev, wake);
9477                 pci_set_power_state(pdev, PCI_D3hot);
9478         }
9479 }
9480
9481 #ifdef CONFIG_PCI_IOV
9482 static int igb_sriov_reinit(struct pci_dev *dev)
9483 {
9484         struct net_device *netdev = pci_get_drvdata(dev);
9485         struct igb_adapter *adapter = netdev_priv(netdev);
9486         struct pci_dev *pdev = adapter->pdev;
9487
9488         rtnl_lock();
9489
9490         if (netif_running(netdev))
9491                 igb_close(netdev);
9492         else
9493                 igb_reset(adapter);
9494
9495         igb_clear_interrupt_scheme(adapter);
9496
9497         igb_init_queue_configuration(adapter);
9498
9499         if (igb_init_interrupt_scheme(adapter, true)) {
9500                 rtnl_unlock();
9501                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9502                 return -ENOMEM;
9503         }
9504
9505         if (netif_running(netdev))
9506                 igb_open(netdev);
9507
9508         rtnl_unlock();
9509
9510         return 0;
9511 }
9512
9513 static int igb_pci_disable_sriov(struct pci_dev *dev)
9514 {
9515         int err = igb_disable_sriov(dev);
9516
9517         if (!err)
9518                 err = igb_sriov_reinit(dev);
9519
9520         return err;
9521 }
9522
9523 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
9524 {
9525         int err = igb_enable_sriov(dev, num_vfs);
9526
9527         if (err)
9528                 goto out;
9529
9530         err = igb_sriov_reinit(dev);
9531         if (!err)
9532                 return num_vfs;
9533
9534 out:
9535         return err;
9536 }
9537
9538 #endif
9539 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
9540 {
9541 #ifdef CONFIG_PCI_IOV
9542         if (num_vfs == 0)
9543                 return igb_pci_disable_sriov(dev);
9544         else
9545                 return igb_pci_enable_sriov(dev, num_vfs);
9546 #endif
9547         return 0;
9548 }
9549
9550 /**
9551  *  igb_io_error_detected - called when PCI error is detected
9552  *  @pdev: Pointer to PCI device
9553  *  @state: The current pci connection state
9554  *
9555  *  This function is called after a PCI bus error affecting
9556  *  this device has been detected.
9557  **/
9558 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9559                                               pci_channel_state_t state)
9560 {
9561         struct net_device *netdev = pci_get_drvdata(pdev);
9562         struct igb_adapter *adapter = netdev_priv(netdev);
9563
9564         netif_device_detach(netdev);
9565
9566         if (state == pci_channel_io_perm_failure)
9567                 return PCI_ERS_RESULT_DISCONNECT;
9568
9569         if (netif_running(netdev))
9570                 igb_down(adapter);
9571         pci_disable_device(pdev);
9572
9573         /* Request a slot reset. */
9574         return PCI_ERS_RESULT_NEED_RESET;
9575 }
9576
9577 /**
9578  *  igb_io_slot_reset - called after the pci bus has been reset.
9579  *  @pdev: Pointer to PCI device
9580  *
9581  *  Restart the card from scratch, as if from a cold-boot. Implementation
9582  *  resembles the first-half of the __igb_resume routine.
9583  **/
9584 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9585 {
9586         struct net_device *netdev = pci_get_drvdata(pdev);
9587         struct igb_adapter *adapter = netdev_priv(netdev);
9588         struct e1000_hw *hw = &adapter->hw;
9589         pci_ers_result_t result;
9590
9591         if (pci_enable_device_mem(pdev)) {
9592                 dev_err(&pdev->dev,
9593                         "Cannot re-enable PCI device after reset.\n");
9594                 result = PCI_ERS_RESULT_DISCONNECT;
9595         } else {
9596                 pci_set_master(pdev);
9597                 pci_restore_state(pdev);
9598                 pci_save_state(pdev);
9599
9600                 pci_enable_wake(pdev, PCI_D3hot, 0);
9601                 pci_enable_wake(pdev, PCI_D3cold, 0);
9602
9603                 /* In case of PCI error, adapter lose its HW address
9604                  * so we should re-assign it here.
9605                  */
9606                 hw->hw_addr = adapter->io_addr;
9607
9608                 igb_reset(adapter);
9609                 wr32(E1000_WUS, ~0);
9610                 result = PCI_ERS_RESULT_RECOVERED;
9611         }
9612
9613         return result;
9614 }
9615
9616 /**
9617  *  igb_io_resume - called when traffic can start flowing again.
9618  *  @pdev: Pointer to PCI device
9619  *
9620  *  This callback is called when the error recovery driver tells us that
9621  *  its OK to resume normal operation. Implementation resembles the
9622  *  second-half of the __igb_resume routine.
9623  */
9624 static void igb_io_resume(struct pci_dev *pdev)
9625 {
9626         struct net_device *netdev = pci_get_drvdata(pdev);
9627         struct igb_adapter *adapter = netdev_priv(netdev);
9628
9629         if (netif_running(netdev)) {
9630                 if (igb_up(adapter)) {
9631                         dev_err(&pdev->dev, "igb_up failed after reset\n");
9632                         return;
9633                 }
9634         }
9635
9636         netif_device_attach(netdev);
9637
9638         /* let the f/w know that the h/w is now under the control of the
9639          * driver.
9640          */
9641         igb_get_hw_control(adapter);
9642 }
9643
9644 /**
9645  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9646  *  @adapter: Pointer to adapter structure
9647  *  @index: Index of the RAR entry which need to be synced with MAC table
9648  **/
9649 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9650 {
9651         struct e1000_hw *hw = &adapter->hw;
9652         u32 rar_low, rar_high;
9653         u8 *addr = adapter->mac_table[index].addr;
9654
9655         /* HW expects these to be in network order when they are plugged
9656          * into the registers which are little endian.  In order to guarantee
9657          * that ordering we need to do an leXX_to_cpup here in order to be
9658          * ready for the byteswap that occurs with writel
9659          */
9660         rar_low = le32_to_cpup((__le32 *)(addr));
9661         rar_high = le16_to_cpup((__le16 *)(addr + 4));
9662
9663         /* Indicate to hardware the Address is Valid. */
9664         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9665                 if (is_valid_ether_addr(addr))
9666                         rar_high |= E1000_RAH_AV;
9667
9668                 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9669                         rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9670
9671                 switch (hw->mac.type) {
9672                 case e1000_82575:
9673                 case e1000_i210:
9674                         if (adapter->mac_table[index].state &
9675                             IGB_MAC_STATE_QUEUE_STEERING)
9676                                 rar_high |= E1000_RAH_QSEL_ENABLE;
9677
9678                         rar_high |= E1000_RAH_POOL_1 *
9679                                     adapter->mac_table[index].queue;
9680                         break;
9681                 default:
9682                         rar_high |= E1000_RAH_POOL_1 <<
9683                                     adapter->mac_table[index].queue;
9684                         break;
9685                 }
9686         }
9687
9688         wr32(E1000_RAL(index), rar_low);
9689         wrfl();
9690         wr32(E1000_RAH(index), rar_high);
9691         wrfl();
9692 }
9693
9694 static int igb_set_vf_mac(struct igb_adapter *adapter,
9695                           int vf, unsigned char *mac_addr)
9696 {
9697         struct e1000_hw *hw = &adapter->hw;
9698         /* VF MAC addresses start at end of receive addresses and moves
9699          * towards the first, as a result a collision should not be possible
9700          */
9701         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9702         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9703
9704         ether_addr_copy(vf_mac_addr, mac_addr);
9705         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9706         adapter->mac_table[rar_entry].queue = vf;
9707         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9708         igb_rar_set_index(adapter, rar_entry);
9709
9710         return 0;
9711 }
9712
9713 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9714 {
9715         struct igb_adapter *adapter = netdev_priv(netdev);
9716
9717         if (vf >= adapter->vfs_allocated_count)
9718                 return -EINVAL;
9719
9720         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9721          * flag and allows to overwrite the MAC via VF netdev.  This
9722          * is necessary to allow libvirt a way to restore the original
9723          * MAC after unbinding vfio-pci and reloading igbvf after shutting
9724          * down a VM.
9725          */
9726         if (is_zero_ether_addr(mac)) {
9727                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9728                 dev_info(&adapter->pdev->dev,
9729                          "remove administratively set MAC on VF %d\n",
9730                          vf);
9731         } else if (is_valid_ether_addr(mac)) {
9732                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9733                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9734                          mac, vf);
9735                 dev_info(&adapter->pdev->dev,
9736                          "Reload the VF driver to make this change effective.");
9737                 /* Generate additional warning if PF is down */
9738                 if (test_bit(__IGB_DOWN, &adapter->state)) {
9739                         dev_warn(&adapter->pdev->dev,
9740                                  "The VF MAC address has been set, but the PF device is not up.\n");
9741                         dev_warn(&adapter->pdev->dev,
9742                                  "Bring the PF device up before attempting to use the VF device.\n");
9743                 }
9744         } else {
9745                 return -EINVAL;
9746         }
9747         return igb_set_vf_mac(adapter, vf, mac);
9748 }
9749
9750 static int igb_link_mbps(int internal_link_speed)
9751 {
9752         switch (internal_link_speed) {
9753         case SPEED_100:
9754                 return 100;
9755         case SPEED_1000:
9756                 return 1000;
9757         default:
9758                 return 0;
9759         }
9760 }
9761
9762 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9763                                   int link_speed)
9764 {
9765         int rf_dec, rf_int;
9766         u32 bcnrc_val;
9767
9768         if (tx_rate != 0) {
9769                 /* Calculate the rate factor values to set */
9770                 rf_int = link_speed / tx_rate;
9771                 rf_dec = (link_speed - (rf_int * tx_rate));
9772                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9773                          tx_rate;
9774
9775                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9776                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9777                               E1000_RTTBCNRC_RF_INT_MASK);
9778                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9779         } else {
9780                 bcnrc_val = 0;
9781         }
9782
9783         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9784         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9785          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9786          */
9787         wr32(E1000_RTTBCNRM, 0x14);
9788         wr32(E1000_RTTBCNRC, bcnrc_val);
9789 }
9790
9791 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9792 {
9793         int actual_link_speed, i;
9794         bool reset_rate = false;
9795
9796         /* VF TX rate limit was not set or not supported */
9797         if ((adapter->vf_rate_link_speed == 0) ||
9798             (adapter->hw.mac.type != e1000_82576))
9799                 return;
9800
9801         actual_link_speed = igb_link_mbps(adapter->link_speed);
9802         if (actual_link_speed != adapter->vf_rate_link_speed) {
9803                 reset_rate = true;
9804                 adapter->vf_rate_link_speed = 0;
9805                 dev_info(&adapter->pdev->dev,
9806                          "Link speed has been changed. VF Transmit rate is disabled\n");
9807         }
9808
9809         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9810                 if (reset_rate)
9811                         adapter->vf_data[i].tx_rate = 0;
9812
9813                 igb_set_vf_rate_limit(&adapter->hw, i,
9814                                       adapter->vf_data[i].tx_rate,
9815                                       actual_link_speed);
9816         }
9817 }
9818
9819 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9820                              int min_tx_rate, int max_tx_rate)
9821 {
9822         struct igb_adapter *adapter = netdev_priv(netdev);
9823         struct e1000_hw *hw = &adapter->hw;
9824         int actual_link_speed;
9825
9826         if (hw->mac.type != e1000_82576)
9827                 return -EOPNOTSUPP;
9828
9829         if (min_tx_rate)
9830                 return -EINVAL;
9831
9832         actual_link_speed = igb_link_mbps(adapter->link_speed);
9833         if ((vf >= adapter->vfs_allocated_count) ||
9834             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9835             (max_tx_rate < 0) ||
9836             (max_tx_rate > actual_link_speed))
9837                 return -EINVAL;
9838
9839         adapter->vf_rate_link_speed = actual_link_speed;
9840         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9841         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9842
9843         return 0;
9844 }
9845
9846 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9847                                    bool setting)
9848 {
9849         struct igb_adapter *adapter = netdev_priv(netdev);
9850         struct e1000_hw *hw = &adapter->hw;
9851         u32 reg_val, reg_offset;
9852
9853         if (!adapter->vfs_allocated_count)
9854                 return -EOPNOTSUPP;
9855
9856         if (vf >= adapter->vfs_allocated_count)
9857                 return -EINVAL;
9858
9859         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9860         reg_val = rd32(reg_offset);
9861         if (setting)
9862                 reg_val |= (BIT(vf) |
9863                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9864         else
9865                 reg_val &= ~(BIT(vf) |
9866                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9867         wr32(reg_offset, reg_val);
9868
9869         adapter->vf_data[vf].spoofchk_enabled = setting;
9870         return 0;
9871 }
9872
9873 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9874 {
9875         struct igb_adapter *adapter = netdev_priv(netdev);
9876
9877         if (vf >= adapter->vfs_allocated_count)
9878                 return -EINVAL;
9879         if (adapter->vf_data[vf].trusted == setting)
9880                 return 0;
9881
9882         adapter->vf_data[vf].trusted = setting;
9883
9884         dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9885                  vf, setting ? "" : "not ");
9886         return 0;
9887 }
9888
9889 static int igb_ndo_get_vf_config(struct net_device *netdev,
9890                                  int vf, struct ifla_vf_info *ivi)
9891 {
9892         struct igb_adapter *adapter = netdev_priv(netdev);
9893         if (vf >= adapter->vfs_allocated_count)
9894                 return -EINVAL;
9895         ivi->vf = vf;
9896         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9897         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9898         ivi->min_tx_rate = 0;
9899         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9900         ivi->qos = adapter->vf_data[vf].pf_qos;
9901         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9902         ivi->trusted = adapter->vf_data[vf].trusted;
9903         return 0;
9904 }
9905
9906 static void igb_vmm_control(struct igb_adapter *adapter)
9907 {
9908         struct e1000_hw *hw = &adapter->hw;
9909         u32 reg;
9910
9911         switch (hw->mac.type) {
9912         case e1000_82575:
9913         case e1000_i210:
9914         case e1000_i211:
9915         case e1000_i354:
9916         default:
9917                 /* replication is not supported for 82575 */
9918                 return;
9919         case e1000_82576:
9920                 /* notify HW that the MAC is adding vlan tags */
9921                 reg = rd32(E1000_DTXCTL);
9922                 reg |= E1000_DTXCTL_VLAN_ADDED;
9923                 wr32(E1000_DTXCTL, reg);
9924                 fallthrough;
9925         case e1000_82580:
9926                 /* enable replication vlan tag stripping */
9927                 reg = rd32(E1000_RPLOLR);
9928                 reg |= E1000_RPLOLR_STRVLAN;
9929                 wr32(E1000_RPLOLR, reg);
9930                 fallthrough;
9931         case e1000_i350:
9932                 /* none of the above registers are supported by i350 */
9933                 break;
9934         }
9935
9936         if (adapter->vfs_allocated_count) {
9937                 igb_vmdq_set_loopback_pf(hw, true);
9938                 igb_vmdq_set_replication_pf(hw, true);
9939                 igb_vmdq_set_anti_spoofing_pf(hw, true,
9940                                               adapter->vfs_allocated_count);
9941         } else {
9942                 igb_vmdq_set_loopback_pf(hw, false);
9943                 igb_vmdq_set_replication_pf(hw, false);
9944         }
9945 }
9946
9947 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9948 {
9949         struct e1000_hw *hw = &adapter->hw;
9950         u32 dmac_thr;
9951         u16 hwm;
9952         u32 reg;
9953
9954         if (hw->mac.type > e1000_82580) {
9955                 if (adapter->flags & IGB_FLAG_DMAC) {
9956                         /* force threshold to 0. */
9957                         wr32(E1000_DMCTXTH, 0);
9958
9959                         /* DMA Coalescing high water mark needs to be greater
9960                          * than the Rx threshold. Set hwm to PBA - max frame
9961                          * size in 16B units, capping it at PBA - 6KB.
9962                          */
9963                         hwm = 64 * (pba - 6);
9964                         reg = rd32(E1000_FCRTC);
9965                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9966                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9967                                 & E1000_FCRTC_RTH_COAL_MASK);
9968                         wr32(E1000_FCRTC, reg);
9969
9970                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
9971                          * frame size, capping it at PBA - 10KB.
9972                          */
9973                         dmac_thr = pba - 10;
9974                         reg = rd32(E1000_DMACR);
9975                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9976                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9977                                 & E1000_DMACR_DMACTHR_MASK);
9978
9979                         /* transition to L0x or L1 if available..*/
9980                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9981
9982                         /* watchdog timer= +-1000 usec in 32usec intervals */
9983                         reg |= (1000 >> 5);
9984
9985                         /* Disable BMC-to-OS Watchdog Enable */
9986                         if (hw->mac.type != e1000_i354)
9987                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9988                         wr32(E1000_DMACR, reg);
9989
9990                         /* no lower threshold to disable
9991                          * coalescing(smart fifb)-UTRESH=0
9992                          */
9993                         wr32(E1000_DMCRTRH, 0);
9994
9995                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
9996
9997                         wr32(E1000_DMCTLX, reg);
9998
9999                         /* free space in tx packet buffer to wake from
10000                          * DMA coal
10001                          */
10002                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
10003                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
10004                 }
10005
10006                 if (hw->mac.type >= e1000_i210 ||
10007                     (adapter->flags & IGB_FLAG_DMAC)) {
10008                         reg = rd32(E1000_PCIEMISC);
10009                         reg |= E1000_PCIEMISC_LX_DECISION;
10010                         wr32(E1000_PCIEMISC, reg);
10011                 } /* endif adapter->dmac is not disabled */
10012         } else if (hw->mac.type == e1000_82580) {
10013                 u32 reg = rd32(E1000_PCIEMISC);
10014
10015                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
10016                 wr32(E1000_DMACR, 0);
10017         }
10018 }
10019
10020 /**
10021  *  igb_read_i2c_byte - Reads 8 bit word over I2C
10022  *  @hw: pointer to hardware structure
10023  *  @byte_offset: byte offset to read
10024  *  @dev_addr: device address
10025  *  @data: value read
10026  *
10027  *  Performs byte read operation over I2C interface at
10028  *  a specified device address.
10029  **/
10030 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
10031                       u8 dev_addr, u8 *data)
10032 {
10033         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
10034         struct i2c_client *this_client = adapter->i2c_client;
10035         s32 status;
10036         u16 swfw_mask = 0;
10037
10038         if (!this_client)
10039                 return E1000_ERR_I2C;
10040
10041         swfw_mask = E1000_SWFW_PHY0_SM;
10042
10043         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
10044                 return E1000_ERR_SWFW_SYNC;
10045
10046         status = i2c_smbus_read_byte_data(this_client, byte_offset);
10047         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
10048
10049         if (status < 0)
10050                 return E1000_ERR_I2C;
10051         else {
10052                 *data = status;
10053                 return 0;
10054         }
10055 }
10056
10057 /**
10058  *  igb_write_i2c_byte - Writes 8 bit word over I2C
10059  *  @hw: pointer to hardware structure
10060  *  @byte_offset: byte offset to write
10061  *  @dev_addr: device address
10062  *  @data: value to write
10063  *
10064  *  Performs byte write operation over I2C interface at
10065  *  a specified device address.
10066  **/
10067 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
10068                        u8 dev_addr, u8 data)
10069 {
10070         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
10071         struct i2c_client *this_client = adapter->i2c_client;
10072         s32 status;
10073         u16 swfw_mask = E1000_SWFW_PHY0_SM;
10074
10075         if (!this_client)
10076                 return E1000_ERR_I2C;
10077
10078         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
10079                 return E1000_ERR_SWFW_SYNC;
10080         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
10081         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
10082
10083         if (status)
10084                 return E1000_ERR_I2C;
10085         else
10086                 return 0;
10087
10088 }
10089
10090 int igb_reinit_queues(struct igb_adapter *adapter)
10091 {
10092         struct net_device *netdev = adapter->netdev;
10093         struct pci_dev *pdev = adapter->pdev;
10094         int err = 0;
10095
10096         if (netif_running(netdev))
10097                 igb_close(netdev);
10098
10099         igb_reset_interrupt_capability(adapter);
10100
10101         if (igb_init_interrupt_scheme(adapter, true)) {
10102                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
10103                 return -ENOMEM;
10104         }
10105
10106         if (netif_running(netdev))
10107                 err = igb_open(netdev);
10108
10109         return err;
10110 }
10111
10112 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
10113 {
10114         struct igb_nfc_filter *rule;
10115
10116         spin_lock(&adapter->nfc_lock);
10117
10118         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10119                 igb_erase_filter(adapter, rule);
10120
10121         hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
10122                 igb_erase_filter(adapter, rule);
10123
10124         spin_unlock(&adapter->nfc_lock);
10125 }
10126
10127 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
10128 {
10129         struct igb_nfc_filter *rule;
10130
10131         spin_lock(&adapter->nfc_lock);
10132
10133         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10134                 igb_add_filter(adapter, rule);
10135
10136         spin_unlock(&adapter->nfc_lock);
10137 }
10138 /* igb_main.c */