drivers/accel/ivpu/ivpu_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2020-2023 Intel Corporation
   4  */
   5
   6 #include <linux/firmware.h>
   7 #include <linux/module.h>
   8 #include <linux/pci.h>
   9 #include <linux/pm_runtime.h>
  10
  11 #include <drm/drm_accel.h>
  12 #include <drm/drm_file.h>
  13 #include <drm/drm_gem.h>
  14 #include <drm/drm_ioctl.h>
  15 #include <drm/drm_prime.h>
  16
  17 #include "vpu_boot_api.h"
  18 #include "ivpu_debugfs.h"
  19 #include "ivpu_drv.h"
  20 #include "ivpu_fw.h"
  21 #include "ivpu_fw_log.h"
  22 #include "ivpu_gem.h"
  23 #include "ivpu_hw.h"
  24 #include "ivpu_ipc.h"
  25 #include "ivpu_job.h"
  26 #include "ivpu_jsm_msg.h"
  27 #include "ivpu_mmu.h"
  28 #include "ivpu_mmu_context.h"
  29 #include "ivpu_pm.h"
  30
  31 #ifndef DRIVER_VERSION_STR
  32 #define DRIVER_VERSION_STR __stringify(DRM_IVPU_DRIVER_MAJOR) "." \
  33                            __stringify(DRM_IVPU_DRIVER_MINOR) "."
  34 #endif
  35
  36 static struct lock_class_key submitted_jobs_xa_lock_class_key;
  37
  38 int ivpu_dbg_mask;
  39 module_param_named(dbg_mask, ivpu_dbg_mask, int, 0644);
  40 MODULE_PARM_DESC(dbg_mask, "Driver debug mask. See IVPU_DBG_* macros.");
  41
  42 int ivpu_test_mode;
  43 module_param_named_unsafe(test_mode, ivpu_test_mode, int, 0644);
  44 MODULE_PARM_DESC(test_mode, "Test mode mask. See IVPU_TEST_MODE_* macros.");
  45
  46 u8 ivpu_pll_min_ratio;
  47 module_param_named(pll_min_ratio, ivpu_pll_min_ratio, byte, 0644);
  48 MODULE_PARM_DESC(pll_min_ratio, "Minimum PLL ratio used to set NPU frequency");
  49
  50 u8 ivpu_pll_max_ratio = U8_MAX;
  51 module_param_named(pll_max_ratio, ivpu_pll_max_ratio, byte, 0644);
  52 MODULE_PARM_DESC(pll_max_ratio, "Maximum PLL ratio used to set NPU frequency");
  53
  54 bool ivpu_disable_mmu_cont_pages;
  55 module_param_named(disable_mmu_cont_pages, ivpu_disable_mmu_cont_pages, bool, 0644);
  56 MODULE_PARM_DESC(disable_mmu_cont_pages, "Disable MMU contiguous pages optimization");
  57
  58 struct ivpu_file_priv *ivpu_file_priv_get(struct ivpu_file_priv *file_priv)
  59 {
  60         struct ivpu_device *vdev = file_priv->vdev;
  61
  62         kref_get(&file_priv->ref);
  63
  64         ivpu_dbg(vdev, KREF, "file_priv get: ctx %u refcount %u\n",
  65                  file_priv->ctx.id, kref_read(&file_priv->ref));
  66
  67         return file_priv;
  68 }
  69
  70 static void file_priv_unbind(struct ivpu_device *vdev, struct ivpu_file_priv *file_priv)
  71 {
  72         mutex_lock(&file_priv->lock);
  73         if (file_priv->bound) {
  74                 ivpu_dbg(vdev, FILE, "file_priv unbind: ctx %u\n", file_priv->ctx.id);
  75
  76                 ivpu_cmdq_release_all_locked(file_priv);
  77                 ivpu_jsm_context_release(vdev, file_priv->ctx.id);
  78                 ivpu_bo_unbind_all_bos_from_context(vdev, &file_priv->ctx);
  79                 ivpu_mmu_user_context_fini(vdev, &file_priv->ctx);
  80                 file_priv->bound = false;
  81                 drm_WARN_ON(&vdev->drm, !xa_erase_irq(&vdev->context_xa, file_priv->ctx.id));
  82         }
  83         mutex_unlock(&file_priv->lock);
  84 }
  85
  86 static void file_priv_release(struct kref *ref)
  87 {
  88         struct ivpu_file_priv *file_priv = container_of(ref, struct ivpu_file_priv, ref);
  89         struct ivpu_device *vdev = file_priv->vdev;
  90
  91         ivpu_dbg(vdev, FILE, "file_priv release: ctx %u bound %d\n",
  92                  file_priv->ctx.id, (bool)file_priv->bound);
  93
  94         pm_runtime_get_sync(vdev->drm.dev);
  95         mutex_lock(&vdev->context_list_lock);
  96         file_priv_unbind(vdev, file_priv);
  97         mutex_unlock(&vdev->context_list_lock);
  98         pm_runtime_put_autosuspend(vdev->drm.dev);
  99
 100         mutex_destroy(&file_priv->lock);
 101         kfree(file_priv);
 102 }
 103
 104 void ivpu_file_priv_put(struct ivpu_file_priv **link)
 105 {
 106         struct ivpu_file_priv *file_priv = *link;
 107         struct ivpu_device *vdev = file_priv->vdev;
 108
 109         drm_WARN_ON(&vdev->drm, !file_priv);
 110
 111         ivpu_dbg(vdev, KREF, "file_priv put: ctx %u refcount %u\n",
 112                  file_priv->ctx.id, kref_read(&file_priv->ref));
 113
 114         *link = NULL;
 115         kref_put(&file_priv->ref, file_priv_release);
 116 }
 117
 118 static int ivpu_get_capabilities(struct ivpu_device *vdev, struct drm_ivpu_param *args)
 119 {
 120         switch (args->index) {
 121         case DRM_IVPU_CAP_METRIC_STREAMER:
 122                 args->value = 0;
 123                 break;
 124         case DRM_IVPU_CAP_DMA_MEMORY_RANGE:
 125                 args->value = 1;
 126                 break;
 127         default:
 128                 return -EINVAL;
 129         }
 130
 131         return 0;
 132 }
 133
 134 static int ivpu_get_core_clock_rate(struct ivpu_device *vdev, u64 *clk_rate)
 135 {
 136         int ret;
 137
 138         ret = ivpu_rpm_get_if_active(vdev);
 139         if (ret < 0)
 140                 return ret;
 141
 142         *clk_rate = ret ? ivpu_hw_reg_pll_freq_get(vdev) : 0;
 143
 144         if (ret)
 145                 ivpu_rpm_put(vdev);
 146
 147         return 0;
 148 }
 149
 150 static int ivpu_get_param_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
 151 {
 152         struct ivpu_file_priv *file_priv = file->driver_priv;
 153         struct ivpu_device *vdev = file_priv->vdev;
 154         struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
 155         struct drm_ivpu_param *args = data;
 156         int ret = 0;
 157         int idx;
 158
 159         if (!drm_dev_enter(dev, &idx))
 160                 return -ENODEV;
 161
 162         switch (args->param) {
 163         case DRM_IVPU_PARAM_DEVICE_ID:
 164                 args->value = pdev->device;
 165                 break;
 166         case DRM_IVPU_PARAM_DEVICE_REVISION:
 167                 args->value = pdev->revision;
 168                 break;
 169         case DRM_IVPU_PARAM_PLATFORM_TYPE:
 170                 args->value = vdev->platform;
 171                 break;
 172         case DRM_IVPU_PARAM_CORE_CLOCK_RATE:
 173                 ret = ivpu_get_core_clock_rate(vdev, &args->value);
 174                 break;
 175         case DRM_IVPU_PARAM_NUM_CONTEXTS:
 176                 args->value = ivpu_get_context_count(vdev);
 177                 break;
 178         case DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS:
 179                 args->value = vdev->hw->ranges.user.start;
 180                 break;
 181         case DRM_IVPU_PARAM_CONTEXT_ID:
 182                 args->value = file_priv->ctx.id;
 183                 break;
 184         case DRM_IVPU_PARAM_FW_API_VERSION:
 185                 if (args->index < VPU_FW_API_VER_NUM) {
 186                         struct vpu_firmware_header *fw_hdr;
 187
 188                         fw_hdr = (struct vpu_firmware_header *)vdev->fw->file->data;
 189                         args->value = fw_hdr->api_version[args->index];
 190                 } else {
 191                         ret = -EINVAL;
 192                 }
 193                 break;
 194         case DRM_IVPU_PARAM_ENGINE_HEARTBEAT:
 195                 ret = ivpu_jsm_get_heartbeat(vdev, args->index, &args->value);
 196                 break;
 197         case DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID:
 198                 args->value = (u64)atomic64_inc_return(&vdev->unique_id_counter);
 199                 break;
 200         case DRM_IVPU_PARAM_TILE_CONFIG:
 201                 args->value = vdev->hw->tile_fuse;
 202                 break;
 203         case DRM_IVPU_PARAM_SKU:
 204                 args->value = vdev->hw->sku;
 205                 break;
 206         case DRM_IVPU_PARAM_CAPABILITIES:
 207                 ret = ivpu_get_capabilities(vdev, args);
 208                 break;
 209         default:
 210                 ret = -EINVAL;
 211                 break;
 212         }
 213
 214         drm_dev_exit(idx);
 215         return ret;
 216 }
 217
 218 static int ivpu_set_param_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
 219 {
 220         struct drm_ivpu_param *args = data;
 221         int ret = 0;
 222
 223         switch (args->param) {
 224         default:
 225                 ret = -EINVAL;
 226         }
 227
 228         return ret;
 229 }
 230
 231 static int ivpu_open(struct drm_device *dev, struct drm_file *file)
 232 {
 233         struct ivpu_device *vdev = to_ivpu_device(dev);
 234         struct ivpu_file_priv *file_priv;
 235         u32 ctx_id;
 236         int idx, ret;
 237
 238         if (!drm_dev_enter(dev, &idx))
 239                 return -ENODEV;
 240
 241         file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
 242         if (!file_priv) {
 243                 ret = -ENOMEM;
 244                 goto err_dev_exit;
 245         }
 246
 247         file_priv->vdev = vdev;
 248         file_priv->bound = true;
 249         kref_init(&file_priv->ref);
 250         mutex_init(&file_priv->lock);
 251
 252         mutex_lock(&vdev->context_list_lock);
 253
 254         ret = xa_alloc_irq(&vdev->context_xa, &ctx_id, file_priv,
 255                            vdev->context_xa_limit, GFP_KERNEL);
 256         if (ret) {
 257                 ivpu_err(vdev, "Failed to allocate context id: %d\n", ret);
 258                 goto err_unlock;
 259         }
 260
 261         ret = ivpu_mmu_user_context_init(vdev, &file_priv->ctx, ctx_id);
 262         if (ret)
 263                 goto err_xa_erase;
 264
 265         mutex_unlock(&vdev->context_list_lock);
 266         drm_dev_exit(idx);
 267
 268         file->driver_priv = file_priv;
 269
 270         ivpu_dbg(vdev, FILE, "file_priv create: ctx %u process %s pid %d\n",
 271                  ctx_id, current->comm, task_pid_nr(current));
 272
 273         return 0;
 274
 275 err_xa_erase:
 276         xa_erase_irq(&vdev->context_xa, ctx_id);
 277 err_unlock:
 278         mutex_unlock(&vdev->context_list_lock);
 279         mutex_destroy(&file_priv->lock);
 280         kfree(file_priv);
 281 err_dev_exit:
 282         drm_dev_exit(idx);
 283         return ret;
 284 }
 285
 286 static void ivpu_postclose(struct drm_device *dev, struct drm_file *file)
 287 {
 288         struct ivpu_file_priv *file_priv = file->driver_priv;
 289         struct ivpu_device *vdev = to_ivpu_device(dev);
 290
 291         ivpu_dbg(vdev, FILE, "file_priv close: ctx %u process %s pid %d\n",
 292                  file_priv->ctx.id, current->comm, task_pid_nr(current));
 293
 294         ivpu_file_priv_put(&file_priv);
 295 }
 296
 297 static const struct drm_ioctl_desc ivpu_drm_ioctls[] = {
 298         DRM_IOCTL_DEF_DRV(IVPU_GET_PARAM, ivpu_get_param_ioctl, 0),
 299         DRM_IOCTL_DEF_DRV(IVPU_SET_PARAM, ivpu_set_param_ioctl, 0),
 300         DRM_IOCTL_DEF_DRV(IVPU_BO_CREATE, ivpu_bo_create_ioctl, 0),
 301         DRM_IOCTL_DEF_DRV(IVPU_BO_INFO, ivpu_bo_info_ioctl, 0),
 302         DRM_IOCTL_DEF_DRV(IVPU_SUBMIT, ivpu_submit_ioctl, 0),
 303         DRM_IOCTL_DEF_DRV(IVPU_BO_WAIT, ivpu_bo_wait_ioctl, 0),
 304 };
 305
 306 static int ivpu_wait_for_ready(struct ivpu_device *vdev)
 307 {
 308         struct ivpu_ipc_consumer cons;
 309         struct ivpu_ipc_hdr ipc_hdr;
 310         unsigned long timeout;
 311         int ret;
 312
 313         if (ivpu_test_mode & IVPU_TEST_MODE_FW_TEST)
 314                 return 0;
 315
 316         ivpu_ipc_consumer_add(vdev, &cons, IVPU_IPC_CHAN_BOOT_MSG, NULL);
 317
 318         timeout = jiffies + msecs_to_jiffies(vdev->timeout.boot);
 319         while (1) {
 320                 ivpu_ipc_irq_handler(vdev, NULL);
 321                 ret = ivpu_ipc_receive(vdev, &cons, &ipc_hdr, NULL, 0);
 322                 if (ret != -ETIMEDOUT || time_after_eq(jiffies, timeout))
 323                         break;
 324
 325                 cond_resched();
 326         }
 327
 328         ivpu_ipc_consumer_del(vdev, &cons);
 329
 330         if (!ret && ipc_hdr.data_addr != IVPU_IPC_BOOT_MSG_DATA_ADDR) {
 331                 ivpu_err(vdev, "Invalid NPU ready message: 0x%x\n",
 332                          ipc_hdr.data_addr);
 333                 return -EIO;
 334         }
 335
 336         if (!ret)
 337                 ivpu_dbg(vdev, PM, "NPU ready message received successfully\n");
 338
 339         return ret;
 340 }
 341
 342 /**
 343  * ivpu_boot() - Start VPU firmware
 344  * @vdev: VPU device
 345  *
 346  * This function is paired with ivpu_shutdown() but it doesn't power up the
 347  * VPU because power up has to be called very early in ivpu_probe().
 348  */
 349 int ivpu_boot(struct ivpu_device *vdev)
 350 {
 351         int ret;
 352
 353         /* Update boot params located at first 4KB of FW memory */
 354         ivpu_fw_boot_params_setup(vdev, ivpu_bo_vaddr(vdev->fw->mem));
 355
 356         ret = ivpu_hw_boot_fw(vdev);
 357         if (ret) {
 358                 ivpu_err(vdev, "Failed to start the firmware: %d\n", ret);
 359                 return ret;
 360         }
 361
 362         ret = ivpu_wait_for_ready(vdev);
 363         if (ret) {
 364                 ivpu_err(vdev, "Failed to boot the firmware: %d\n", ret);
 365                 ivpu_hw_diagnose_failure(vdev);
 366                 ivpu_mmu_evtq_dump(vdev);
 367                 ivpu_fw_log_dump(vdev);
 368                 return ret;
 369         }
 370
 371         ivpu_hw_irq_clear(vdev);
 372         enable_irq(vdev->irq);
 373         ivpu_hw_irq_enable(vdev);
 374         ivpu_ipc_enable(vdev);
 375         return 0;
 376 }
 377
 378 void ivpu_prepare_for_reset(struct ivpu_device *vdev)
 379 {
 380         ivpu_hw_irq_disable(vdev);
 381         disable_irq(vdev->irq);
 382         ivpu_ipc_disable(vdev);
 383         ivpu_mmu_disable(vdev);
 384 }
 385
 386 int ivpu_shutdown(struct ivpu_device *vdev)
 387 {
 388         int ret;
 389
 390         ivpu_prepare_for_reset(vdev);
 391
 392         ret = ivpu_hw_power_down(vdev);
 393         if (ret)
 394                 ivpu_warn(vdev, "Failed to power down HW: %d\n", ret);
 395
 396         return ret;
 397 }
 398
 399 static const struct file_operations ivpu_fops = {
 400         .owner          = THIS_MODULE,
 401         DRM_ACCEL_FOPS,
 402 };
 403
 404 static const struct drm_driver driver = {
 405         .driver_features = DRIVER_GEM | DRIVER_COMPUTE_ACCEL,
 406
 407         .open = ivpu_open,
 408         .postclose = ivpu_postclose,
 409
 410         .gem_create_object = ivpu_gem_create_object,
 411         .gem_prime_import_sg_table = drm_gem_shmem_prime_import_sg_table,
 412
 413         .ioctls = ivpu_drm_ioctls,
 414         .num_ioctls = ARRAY_SIZE(ivpu_drm_ioctls),
 415         .fops = &ivpu_fops,
 416
 417         .name = DRIVER_NAME,
 418         .desc = DRIVER_DESC,
 419         .date = DRIVER_DATE,
 420         .major = DRM_IVPU_DRIVER_MAJOR,
 421         .minor = DRM_IVPU_DRIVER_MINOR,
 422 };
 423
 424 static irqreturn_t ivpu_irq_thread_handler(int irq, void *arg)
 425 {
 426         struct ivpu_device *vdev = arg;
 427
 428         return ivpu_ipc_irq_thread_handler(vdev);
 429 }
 430
 431 static int ivpu_irq_init(struct ivpu_device *vdev)
 432 {
 433         struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
 434         int ret;
 435
 436         ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI | PCI_IRQ_MSIX);
 437         if (ret < 0) {
 438                 ivpu_err(vdev, "Failed to allocate a MSI IRQ: %d\n", ret);
 439                 return ret;
 440         }
 441
 442         vdev->irq = pci_irq_vector(pdev, 0);
 443
 444         ret = devm_request_threaded_irq(vdev->drm.dev, vdev->irq, vdev->hw->ops->irq_handler,
 445                                         ivpu_irq_thread_handler, IRQF_NO_AUTOEN, DRIVER_NAME, vdev);
 446         if (ret)
 447                 ivpu_err(vdev, "Failed to request an IRQ %d\n", ret);
 448
 449         return ret;
 450 }
 451
 452 static int ivpu_pci_init(struct ivpu_device *vdev)
 453 {
 454         struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
 455         struct resource *bar0 = &pdev->resource[0];
 456         struct resource *bar4 = &pdev->resource[4];
 457         int ret;
 458
 459         ivpu_dbg(vdev, MISC, "Mapping BAR0 (RegV) %pR\n", bar0);
 460         vdev->regv = devm_ioremap_resource(vdev->drm.dev, bar0);
 461         if (IS_ERR(vdev->regv)) {
 462                 ivpu_err(vdev, "Failed to map bar 0: %pe\n", vdev->regv);
 463                 return PTR_ERR(vdev->regv);
 464         }
 465
 466         ivpu_dbg(vdev, MISC, "Mapping BAR4 (RegB) %pR\n", bar4);
 467         vdev->regb = devm_ioremap_resource(vdev->drm.dev, bar4);
 468         if (IS_ERR(vdev->regb)) {
 469                 ivpu_err(vdev, "Failed to map bar 4: %pe\n", vdev->regb);
 470                 return PTR_ERR(vdev->regb);
 471         }
 472
 473         ret = dma_set_mask_and_coherent(vdev->drm.dev, DMA_BIT_MASK(vdev->hw->dma_bits));
 474         if (ret) {
 475                 ivpu_err(vdev, "Failed to set DMA mask: %d\n", ret);
 476                 return ret;
 477         }
 478         dma_set_max_seg_size(vdev->drm.dev, UINT_MAX);
 479
 480         /* Clear any pending errors */
 481         pcie_capability_clear_word(pdev, PCI_EXP_DEVSTA, 0x3f);
 482
 483         /* NPU does not require 10m D3hot delay */
 484         pdev->d3hot_delay = 0;
 485
 486         ret = pcim_enable_device(pdev);
 487         if (ret) {
 488                 ivpu_err(vdev, "Failed to enable PCI device: %d\n", ret);
 489                 return ret;
 490         }
 491
 492         pci_set_master(pdev);
 493
 494         return 0;
 495 }
 496
 497 static int ivpu_dev_init(struct ivpu_device *vdev)
 498 {
 499         int ret;
 500
 501         vdev->hw = drmm_kzalloc(&vdev->drm, sizeof(*vdev->hw), GFP_KERNEL);
 502         if (!vdev->hw)
 503                 return -ENOMEM;
 504
 505         vdev->mmu = drmm_kzalloc(&vdev->drm, sizeof(*vdev->mmu), GFP_KERNEL);
 506         if (!vdev->mmu)
 507                 return -ENOMEM;
 508
 509         vdev->fw = drmm_kzalloc(&vdev->drm, sizeof(*vdev->fw), GFP_KERNEL);
 510         if (!vdev->fw)
 511                 return -ENOMEM;
 512
 513         vdev->ipc = drmm_kzalloc(&vdev->drm, sizeof(*vdev->ipc), GFP_KERNEL);
 514         if (!vdev->ipc)
 515                 return -ENOMEM;
 516
 517         vdev->pm = drmm_kzalloc(&vdev->drm, sizeof(*vdev->pm), GFP_KERNEL);
 518         if (!vdev->pm)
 519                 return -ENOMEM;
 520
 521         if (ivpu_hw_gen(vdev) >= IVPU_HW_40XX) {
 522                 vdev->hw->ops = &ivpu_hw_40xx_ops;
 523                 vdev->hw->dma_bits = 48;
 524         } else {
 525                 vdev->hw->ops = &ivpu_hw_37xx_ops;
 526                 vdev->hw->dma_bits = 38;
 527         }
 528
 529         vdev->platform = IVPU_PLATFORM_INVALID;
 530         vdev->context_xa_limit.min = IVPU_USER_CONTEXT_MIN_SSID;
 531         vdev->context_xa_limit.max = IVPU_USER_CONTEXT_MAX_SSID;
 532         atomic64_set(&vdev->unique_id_counter, 0);
 533         xa_init_flags(&vdev->context_xa, XA_FLAGS_ALLOC);
 534         xa_init_flags(&vdev->submitted_jobs_xa, XA_FLAGS_ALLOC1);
 535         xa_init_flags(&vdev->db_xa, XA_FLAGS_ALLOC1);
 536         lockdep_set_class(&vdev->submitted_jobs_xa.xa_lock, &submitted_jobs_xa_lock_class_key);
 537         INIT_LIST_HEAD(&vdev->bo_list);
 538
 539         ret = drmm_mutex_init(&vdev->drm, &vdev->context_list_lock);
 540         if (ret)
 541                 goto err_xa_destroy;
 542
 543         ret = drmm_mutex_init(&vdev->drm, &vdev->bo_list_lock);
 544         if (ret)
 545                 goto err_xa_destroy;
 546
 547         ret = ivpu_pci_init(vdev);
 548         if (ret)
 549                 goto err_xa_destroy;
 550
 551         ret = ivpu_irq_init(vdev);
 552         if (ret)
 553                 goto err_xa_destroy;
 554
 555         /* Init basic HW info based on buttress registers which are accessible before power up */
 556         ret = ivpu_hw_info_init(vdev);
 557         if (ret)
 558                 goto err_xa_destroy;
 559
 560         /* Power up early so the rest of init code can access VPU registers */
 561         ret = ivpu_hw_power_up(vdev);
 562         if (ret)
 563                 goto err_power_down;
 564
 565         ret = ivpu_mmu_global_context_init(vdev);
 566         if (ret)
 567                 goto err_power_down;
 568
 569         ret = ivpu_mmu_init(vdev);
 570         if (ret)
 571                 goto err_mmu_gctx_fini;
 572
 573         ret = ivpu_mmu_reserved_context_init(vdev);
 574         if (ret)
 575                 goto err_mmu_gctx_fini;
 576
 577         ret = ivpu_fw_init(vdev);
 578         if (ret)
 579                 goto err_mmu_rctx_fini;
 580
 581         ret = ivpu_ipc_init(vdev);
 582         if (ret)
 583                 goto err_fw_fini;
 584
 585         ivpu_pm_init(vdev);
 586
 587         ret = ivpu_boot(vdev);
 588         if (ret)
 589                 goto err_ipc_fini;
 590
 591         ivpu_job_done_consumer_init(vdev);
 592         ivpu_pm_enable(vdev);
 593
 594         return 0;
 595
 596 err_ipc_fini:
 597         ivpu_ipc_fini(vdev);
 598 err_fw_fini:
 599         ivpu_fw_fini(vdev);
 600 err_mmu_rctx_fini:
 601         ivpu_mmu_reserved_context_fini(vdev);
 602 err_mmu_gctx_fini:
 603         ivpu_mmu_global_context_fini(vdev);
 604 err_power_down:
 605         ivpu_hw_power_down(vdev);
 606         if (IVPU_WA(d3hot_after_power_off))
 607                 pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
 608 err_xa_destroy:
 609         xa_destroy(&vdev->db_xa);
 610         xa_destroy(&vdev->submitted_jobs_xa);
 611         xa_destroy(&vdev->context_xa);
 612         return ret;
 613 }
 614
 615 static void ivpu_bo_unbind_all_user_contexts(struct ivpu_device *vdev)
 616 {
 617         struct ivpu_file_priv *file_priv;
 618         unsigned long ctx_id;
 619
 620         mutex_lock(&vdev->context_list_lock);
 621
 622         xa_for_each(&vdev->context_xa, ctx_id, file_priv)
 623                 file_priv_unbind(vdev, file_priv);
 624
 625         mutex_unlock(&vdev->context_list_lock);
 626 }
 627
 628 static void ivpu_dev_fini(struct ivpu_device *vdev)
 629 {
 630         ivpu_pm_disable(vdev);
 631         ivpu_shutdown(vdev);
 632         if (IVPU_WA(d3hot_after_power_off))
 633                 pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
 634
 635         ivpu_jobs_abort_all(vdev);
 636         ivpu_job_done_consumer_fini(vdev);
 637         ivpu_pm_cancel_recovery(vdev);
 638         ivpu_bo_unbind_all_user_contexts(vdev);
 639
 640         ivpu_ipc_fini(vdev);
 641         ivpu_fw_fini(vdev);
 642         ivpu_mmu_reserved_context_fini(vdev);
 643         ivpu_mmu_global_context_fini(vdev);
 644
 645         drm_WARN_ON(&vdev->drm, !xa_empty(&vdev->db_xa));
 646         xa_destroy(&vdev->db_xa);
 647         drm_WARN_ON(&vdev->drm, !xa_empty(&vdev->submitted_jobs_xa));
 648         xa_destroy(&vdev->submitted_jobs_xa);
 649         drm_WARN_ON(&vdev->drm, !xa_empty(&vdev->context_xa));
 650         xa_destroy(&vdev->context_xa);
 651 }
 652
 653 static struct pci_device_id ivpu_pci_ids[] = {
 654         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_MTL) },
 655         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_ARL) },
 656         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_LNL) },
 657         { }
 658 };
 659 MODULE_DEVICE_TABLE(pci, ivpu_pci_ids);
 660
 661 static int ivpu_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 662 {
 663         struct ivpu_device *vdev;
 664         int ret;
 665
 666         vdev = devm_drm_dev_alloc(&pdev->dev, &driver, struct ivpu_device, drm);
 667         if (IS_ERR(vdev))
 668                 return PTR_ERR(vdev);
 669
 670         pci_set_drvdata(pdev, vdev);
 671
 672         ret = ivpu_dev_init(vdev);
 673         if (ret)
 674                 return ret;
 675
 676         ivpu_debugfs_init(vdev);
 677
 678         ret = drm_dev_register(&vdev->drm, 0);
 679         if (ret) {
 680                 dev_err(&pdev->dev, "Failed to register DRM device: %d\n", ret);
 681                 ivpu_dev_fini(vdev);
 682         }
 683
 684         return ret;
 685 }
 686
 687 static void ivpu_remove(struct pci_dev *pdev)
 688 {
 689         struct ivpu_device *vdev = pci_get_drvdata(pdev);
 690
 691         drm_dev_unplug(&vdev->drm);
 692         ivpu_dev_fini(vdev);
 693 }
 694
 695 static const struct dev_pm_ops ivpu_drv_pci_pm = {
 696         SET_SYSTEM_SLEEP_PM_OPS(ivpu_pm_suspend_cb, ivpu_pm_resume_cb)
 697         SET_RUNTIME_PM_OPS(ivpu_pm_runtime_suspend_cb, ivpu_pm_runtime_resume_cb, NULL)
 698 };
 699
 700 static const struct pci_error_handlers ivpu_drv_pci_err = {
 701         .reset_prepare = ivpu_pm_reset_prepare_cb,
 702         .reset_done = ivpu_pm_reset_done_cb,
 703 };
 704
 705 static struct pci_driver ivpu_pci_driver = {
 706         .name = KBUILD_MODNAME,
 707         .id_table = ivpu_pci_ids,
 708         .probe = ivpu_probe,
 709         .remove = ivpu_remove,
 710         .driver = {
 711                 .pm = &ivpu_drv_pci_pm,
 712         },
 713         .err_handler = &ivpu_drv_pci_err,
 714 };
 715
 716 module_pci_driver(ivpu_pci_driver);
 717
 718 MODULE_AUTHOR("Intel Corporation");
 719 MODULE_DESCRIPTION(DRIVER_DESC);
 720 MODULE_LICENSE("GPL and additional rights");
 721 MODULE_VERSION(DRIVER_VERSION_STR);