drivers/accel/ivpu/ivpu_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2020-2024 Intel Corporation
   4  */
   5
   6 #include <linux/firmware.h>
   7 #include <linux/module.h>
   8 #include <linux/pci.h>
   9 #include <linux/pm_runtime.h>
  10 #include <generated/utsrelease.h>
  11
  12 #include <drm/drm_accel.h>
  13 #include <drm/drm_file.h>
  14 #include <drm/drm_gem.h>
  15 #include <drm/drm_ioctl.h>
  16 #include <drm/drm_prime.h>
  17
  18 #include "ivpu_coredump.h"
  19 #include "ivpu_debugfs.h"
  20 #include "ivpu_drv.h"
  21 #include "ivpu_fw.h"
  22 #include "ivpu_fw_log.h"
  23 #include "ivpu_gem.h"
  24 #include "ivpu_hw.h"
  25 #include "ivpu_ipc.h"
  26 #include "ivpu_job.h"
  27 #include "ivpu_jsm_msg.h"
  28 #include "ivpu_mmu.h"
  29 #include "ivpu_mmu_context.h"
  30 #include "ivpu_ms.h"
  31 #include "ivpu_pm.h"
  32 #include "ivpu_sysfs.h"
  33 #include "vpu_boot_api.h"
  34
  35 #ifndef DRIVER_VERSION_STR
  36 #define DRIVER_VERSION_STR "1.0.0 " UTS_RELEASE
  37 #endif
  38
  39 static struct lock_class_key submitted_jobs_xa_lock_class_key;
  40
  41 int ivpu_dbg_mask;
  42 module_param_named(dbg_mask, ivpu_dbg_mask, int, 0644);
  43 MODULE_PARM_DESC(dbg_mask, "Driver debug mask. See IVPU_DBG_* macros.");
  44
  45 int ivpu_test_mode;
  46 #if IS_ENABLED(CONFIG_DRM_ACCEL_IVPU_DEBUG)
  47 module_param_named_unsafe(test_mode, ivpu_test_mode, int, 0644);
  48 MODULE_PARM_DESC(test_mode, "Test mode mask. See IVPU_TEST_MODE_* macros.");
  49 #endif
  50
  51 u8 ivpu_pll_min_ratio;
  52 module_param_named(pll_min_ratio, ivpu_pll_min_ratio, byte, 0644);
  53 MODULE_PARM_DESC(pll_min_ratio, "Minimum PLL ratio used to set NPU frequency");
  54
  55 u8 ivpu_pll_max_ratio = U8_MAX;
  56 module_param_named(pll_max_ratio, ivpu_pll_max_ratio, byte, 0644);
  57 MODULE_PARM_DESC(pll_max_ratio, "Maximum PLL ratio used to set NPU frequency");
  58
  59 int ivpu_sched_mode = IVPU_SCHED_MODE_AUTO;
  60 module_param_named(sched_mode, ivpu_sched_mode, int, 0444);
  61 MODULE_PARM_DESC(sched_mode, "Scheduler mode: -1 - Use default scheduler, 0 - Use OS scheduler, 1 - Use HW scheduler");
  62
  63 bool ivpu_disable_mmu_cont_pages;
  64 module_param_named(disable_mmu_cont_pages, ivpu_disable_mmu_cont_pages, bool, 0444);
  65 MODULE_PARM_DESC(disable_mmu_cont_pages, "Disable MMU contiguous pages optimization");
  66
  67 bool ivpu_force_snoop;
  68 module_param_named(force_snoop, ivpu_force_snoop, bool, 0444);
  69 MODULE_PARM_DESC(force_snoop, "Force snooping for NPU host memory access");
  70
  71 struct ivpu_file_priv *ivpu_file_priv_get(struct ivpu_file_priv *file_priv)
  72 {
  73         struct ivpu_device *vdev = file_priv->vdev;
  74
  75         kref_get(&file_priv->ref);
  76
  77         ivpu_dbg(vdev, KREF, "file_priv get: ctx %u refcount %u\n",
  78                  file_priv->ctx.id, kref_read(&file_priv->ref));
  79
  80         return file_priv;
  81 }
  82
  83 static void file_priv_unbind(struct ivpu_device *vdev, struct ivpu_file_priv *file_priv)
  84 {
  85         mutex_lock(&file_priv->lock);
  86         if (file_priv->bound) {
  87                 ivpu_dbg(vdev, FILE, "file_priv unbind: ctx %u\n", file_priv->ctx.id);
  88
  89                 ivpu_cmdq_release_all_locked(file_priv);
  90                 ivpu_bo_unbind_all_bos_from_context(vdev, &file_priv->ctx);
  91                 ivpu_mmu_context_fini(vdev, &file_priv->ctx);
  92                 file_priv->bound = false;
  93                 drm_WARN_ON(&vdev->drm, !xa_erase_irq(&vdev->context_xa, file_priv->ctx.id));
  94         }
  95         mutex_unlock(&file_priv->lock);
  96 }
  97
  98 static void file_priv_release(struct kref *ref)
  99 {
 100         struct ivpu_file_priv *file_priv = container_of(ref, struct ivpu_file_priv, ref);
 101         struct ivpu_device *vdev = file_priv->vdev;
 102
 103         ivpu_dbg(vdev, FILE, "file_priv release: ctx %u bound %d\n",
 104                  file_priv->ctx.id, (bool)file_priv->bound);
 105
 106         pm_runtime_get_sync(vdev->drm.dev);
 107         mutex_lock(&vdev->context_list_lock);
 108         file_priv_unbind(vdev, file_priv);
 109         drm_WARN_ON(&vdev->drm, !xa_empty(&file_priv->cmdq_xa));
 110         xa_destroy(&file_priv->cmdq_xa);
 111         mutex_unlock(&vdev->context_list_lock);
 112         pm_runtime_put_autosuspend(vdev->drm.dev);
 113
 114         mutex_destroy(&file_priv->ms_lock);
 115         mutex_destroy(&file_priv->lock);
 116         kfree(file_priv);
 117 }
 118
 119 void ivpu_file_priv_put(struct ivpu_file_priv **link)
 120 {
 121         struct ivpu_file_priv *file_priv = *link;
 122         struct ivpu_device *vdev = file_priv->vdev;
 123
 124         ivpu_dbg(vdev, KREF, "file_priv put: ctx %u refcount %u\n",
 125                  file_priv->ctx.id, kref_read(&file_priv->ref));
 126
 127         *link = NULL;
 128         kref_put(&file_priv->ref, file_priv_release);
 129 }
 130
 131 static int ivpu_get_capabilities(struct ivpu_device *vdev, struct drm_ivpu_param *args)
 132 {
 133         switch (args->index) {
 134         case DRM_IVPU_CAP_METRIC_STREAMER:
 135                 args->value = 1;
 136                 break;
 137         case DRM_IVPU_CAP_DMA_MEMORY_RANGE:
 138                 args->value = 1;
 139                 break;
 140         default:
 141                 return -EINVAL;
 142         }
 143
 144         return 0;
 145 }
 146
 147 static int ivpu_get_param_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
 148 {
 149         struct ivpu_file_priv *file_priv = file->driver_priv;
 150         struct ivpu_device *vdev = file_priv->vdev;
 151         struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
 152         struct drm_ivpu_param *args = data;
 153         int ret = 0;
 154         int idx;
 155
 156         if (!drm_dev_enter(dev, &idx))
 157                 return -ENODEV;
 158
 159         switch (args->param) {
 160         case DRM_IVPU_PARAM_DEVICE_ID:
 161                 args->value = pdev->device;
 162                 break;
 163         case DRM_IVPU_PARAM_DEVICE_REVISION:
 164                 args->value = pdev->revision;
 165                 break;
 166         case DRM_IVPU_PARAM_PLATFORM_TYPE:
 167                 args->value = vdev->platform;
 168                 break;
 169         case DRM_IVPU_PARAM_CORE_CLOCK_RATE:
 170                 args->value = ivpu_hw_ratio_to_freq(vdev, vdev->hw->pll.max_ratio);
 171                 break;
 172         case DRM_IVPU_PARAM_NUM_CONTEXTS:
 173                 args->value = ivpu_get_context_count(vdev);
 174                 break;
 175         case DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS:
 176                 args->value = vdev->hw->ranges.user.start;
 177                 break;
 178         case DRM_IVPU_PARAM_CONTEXT_ID:
 179                 args->value = file_priv->ctx.id;
 180                 break;
 181         case DRM_IVPU_PARAM_FW_API_VERSION:
 182                 if (args->index < VPU_FW_API_VER_NUM) {
 183                         struct vpu_firmware_header *fw_hdr;
 184
 185                         fw_hdr = (struct vpu_firmware_header *)vdev->fw->file->data;
 186                         args->value = fw_hdr->api_version[args->index];
 187                 } else {
 188                         ret = -EINVAL;
 189                 }
 190                 break;
 191         case DRM_IVPU_PARAM_ENGINE_HEARTBEAT:
 192                 ret = ivpu_jsm_get_heartbeat(vdev, args->index, &args->value);
 193                 break;
 194         case DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID:
 195                 args->value = (u64)atomic64_inc_return(&vdev->unique_id_counter);
 196                 break;
 197         case DRM_IVPU_PARAM_TILE_CONFIG:
 198                 args->value = vdev->hw->tile_fuse;
 199                 break;
 200         case DRM_IVPU_PARAM_SKU:
 201                 args->value = vdev->hw->sku;
 202                 break;
 203         case DRM_IVPU_PARAM_CAPABILITIES:
 204                 ret = ivpu_get_capabilities(vdev, args);
 205                 break;
 206         default:
 207                 ret = -EINVAL;
 208                 break;
 209         }
 210
 211         drm_dev_exit(idx);
 212         return ret;
 213 }
 214
 215 static int ivpu_set_param_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
 216 {
 217         struct drm_ivpu_param *args = data;
 218         int ret = 0;
 219
 220         switch (args->param) {
 221         default:
 222                 ret = -EINVAL;
 223         }
 224
 225         return ret;
 226 }
 227
 228 static int ivpu_open(struct drm_device *dev, struct drm_file *file)
 229 {
 230         struct ivpu_device *vdev = to_ivpu_device(dev);
 231         struct ivpu_file_priv *file_priv;
 232         u32 ctx_id;
 233         int idx, ret;
 234
 235         if (!drm_dev_enter(dev, &idx))
 236                 return -ENODEV;
 237
 238         file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
 239         if (!file_priv) {
 240                 ret = -ENOMEM;
 241                 goto err_dev_exit;
 242         }
 243
 244         INIT_LIST_HEAD(&file_priv->ms_instance_list);
 245
 246         file_priv->vdev = vdev;
 247         file_priv->bound = true;
 248         kref_init(&file_priv->ref);
 249         mutex_init(&file_priv->lock);
 250         mutex_init(&file_priv->ms_lock);
 251
 252         mutex_lock(&vdev->context_list_lock);
 253
 254         ret = xa_alloc_irq(&vdev->context_xa, &ctx_id, file_priv,
 255                            vdev->context_xa_limit, GFP_KERNEL);
 256         if (ret) {
 257                 ivpu_err(vdev, "Failed to allocate context id: %d\n", ret);
 258                 goto err_unlock;
 259         }
 260
 261         ivpu_mmu_context_init(vdev, &file_priv->ctx, ctx_id);
 262
 263         file_priv->job_limit.min = FIELD_PREP(IVPU_JOB_ID_CONTEXT_MASK, (file_priv->ctx.id - 1));
 264         file_priv->job_limit.max = file_priv->job_limit.min | IVPU_JOB_ID_JOB_MASK;
 265
 266         xa_init_flags(&file_priv->cmdq_xa, XA_FLAGS_ALLOC1);
 267         file_priv->cmdq_limit.min = IVPU_CMDQ_MIN_ID;
 268         file_priv->cmdq_limit.max = IVPU_CMDQ_MAX_ID;
 269
 270         mutex_unlock(&vdev->context_list_lock);
 271         drm_dev_exit(idx);
 272
 273         file->driver_priv = file_priv;
 274
 275         ivpu_dbg(vdev, FILE, "file_priv create: ctx %u process %s pid %d\n",
 276                  ctx_id, current->comm, task_pid_nr(current));
 277
 278         return 0;
 279
 280 err_unlock:
 281         mutex_unlock(&vdev->context_list_lock);
 282         mutex_destroy(&file_priv->ms_lock);
 283         mutex_destroy(&file_priv->lock);
 284         kfree(file_priv);
 285 err_dev_exit:
 286         drm_dev_exit(idx);
 287         return ret;
 288 }
 289
 290 static void ivpu_postclose(struct drm_device *dev, struct drm_file *file)
 291 {
 292         struct ivpu_file_priv *file_priv = file->driver_priv;
 293         struct ivpu_device *vdev = to_ivpu_device(dev);
 294
 295         ivpu_dbg(vdev, FILE, "file_priv close: ctx %u process %s pid %d\n",
 296                  file_priv->ctx.id, current->comm, task_pid_nr(current));
 297
 298         ivpu_ms_cleanup(file_priv);
 299         ivpu_file_priv_put(&file_priv);
 300 }
 301
 302 static const struct drm_ioctl_desc ivpu_drm_ioctls[] = {
 303         DRM_IOCTL_DEF_DRV(IVPU_GET_PARAM, ivpu_get_param_ioctl, 0),
 304         DRM_IOCTL_DEF_DRV(IVPU_SET_PARAM, ivpu_set_param_ioctl, 0),
 305         DRM_IOCTL_DEF_DRV(IVPU_BO_CREATE, ivpu_bo_create_ioctl, 0),
 306         DRM_IOCTL_DEF_DRV(IVPU_BO_INFO, ivpu_bo_info_ioctl, 0),
 307         DRM_IOCTL_DEF_DRV(IVPU_SUBMIT, ivpu_submit_ioctl, 0),
 308         DRM_IOCTL_DEF_DRV(IVPU_BO_WAIT, ivpu_bo_wait_ioctl, 0),
 309         DRM_IOCTL_DEF_DRV(IVPU_METRIC_STREAMER_START, ivpu_ms_start_ioctl, 0),
 310         DRM_IOCTL_DEF_DRV(IVPU_METRIC_STREAMER_GET_DATA, ivpu_ms_get_data_ioctl, 0),
 311         DRM_IOCTL_DEF_DRV(IVPU_METRIC_STREAMER_STOP, ivpu_ms_stop_ioctl, 0),
 312         DRM_IOCTL_DEF_DRV(IVPU_METRIC_STREAMER_GET_INFO, ivpu_ms_get_info_ioctl, 0),
 313 };
 314
 315 static int ivpu_wait_for_ready(struct ivpu_device *vdev)
 316 {
 317         struct ivpu_ipc_consumer cons;
 318         struct ivpu_ipc_hdr ipc_hdr;
 319         unsigned long timeout;
 320         int ret;
 321
 322         if (ivpu_test_mode & IVPU_TEST_MODE_FW_TEST)
 323                 return 0;
 324
 325         ivpu_ipc_consumer_add(vdev, &cons, IVPU_IPC_CHAN_BOOT_MSG, NULL);
 326
 327         timeout = jiffies + msecs_to_jiffies(vdev->timeout.boot);
 328         while (1) {
 329                 ivpu_ipc_irq_handler(vdev);
 330                 ret = ivpu_ipc_receive(vdev, &cons, &ipc_hdr, NULL, 0);
 331                 if (ret != -ETIMEDOUT || time_after_eq(jiffies, timeout))
 332                         break;
 333
 334                 cond_resched();
 335         }
 336
 337         ivpu_ipc_consumer_del(vdev, &cons);
 338
 339         if (!ret && ipc_hdr.data_addr != IVPU_IPC_BOOT_MSG_DATA_ADDR) {
 340                 ivpu_err(vdev, "Invalid NPU ready message: 0x%x\n",
 341                          ipc_hdr.data_addr);
 342                 return -EIO;
 343         }
 344
 345         if (!ret)
 346                 ivpu_dbg(vdev, PM, "NPU ready message received successfully\n");
 347
 348         return ret;
 349 }
 350
 351 static int ivpu_hw_sched_init(struct ivpu_device *vdev)
 352 {
 353         int ret = 0;
 354
 355         if (vdev->fw->sched_mode == VPU_SCHEDULING_MODE_HW) {
 356                 ret = ivpu_jsm_hws_setup_priority_bands(vdev);
 357                 if (ret) {
 358                         ivpu_err(vdev, "Failed to enable hw scheduler: %d", ret);
 359                         return ret;
 360                 }
 361         }
 362
 363         return ret;
 364 }
 365
 366 /**
 367  * ivpu_boot() - Start VPU firmware
 368  * @vdev: VPU device
 369  *
 370  * This function is paired with ivpu_shutdown() but it doesn't power up the
 371  * VPU because power up has to be called very early in ivpu_probe().
 372  */
 373 int ivpu_boot(struct ivpu_device *vdev)
 374 {
 375         int ret;
 376
 377         /* Update boot params located at first 4KB of FW memory */
 378         ivpu_fw_boot_params_setup(vdev, ivpu_bo_vaddr(vdev->fw->mem));
 379
 380         ret = ivpu_hw_boot_fw(vdev);
 381         if (ret) {
 382                 ivpu_err(vdev, "Failed to start the firmware: %d\n", ret);
 383                 return ret;
 384         }
 385
 386         ret = ivpu_wait_for_ready(vdev);
 387         if (ret) {
 388                 ivpu_err(vdev, "Failed to boot the firmware: %d\n", ret);
 389                 goto err_diagnose_failure;
 390         }
 391
 392         ivpu_hw_irq_clear(vdev);
 393         enable_irq(vdev->irq);
 394         ivpu_hw_irq_enable(vdev);
 395         ivpu_ipc_enable(vdev);
 396
 397         if (ivpu_fw_is_cold_boot(vdev)) {
 398                 ret = ivpu_pm_dct_init(vdev);
 399                 if (ret)
 400                         goto err_diagnose_failure;
 401
 402                 ret = ivpu_hw_sched_init(vdev);
 403                 if (ret)
 404                         goto err_diagnose_failure;
 405         }
 406
 407         return 0;
 408
 409 err_diagnose_failure:
 410         ivpu_hw_diagnose_failure(vdev);
 411         ivpu_mmu_evtq_dump(vdev);
 412         ivpu_dev_coredump(vdev);
 413         return ret;
 414 }
 415
 416 void ivpu_prepare_for_reset(struct ivpu_device *vdev)
 417 {
 418         ivpu_hw_irq_disable(vdev);
 419         disable_irq(vdev->irq);
 420         ivpu_ipc_disable(vdev);
 421         ivpu_mmu_disable(vdev);
 422 }
 423
 424 int ivpu_shutdown(struct ivpu_device *vdev)
 425 {
 426         int ret;
 427
 428         /* Save PCI state before powering down as it sometimes gets corrupted if NPU hangs */
 429         pci_save_state(to_pci_dev(vdev->drm.dev));
 430
 431         ret = ivpu_hw_power_down(vdev);
 432         if (ret)
 433                 ivpu_warn(vdev, "Failed to power down HW: %d\n", ret);
 434
 435         pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
 436
 437         return ret;
 438 }
 439
 440 static const struct file_operations ivpu_fops = {
 441         .owner          = THIS_MODULE,
 442         DRM_ACCEL_FOPS,
 443 };
 444
 445 static const struct drm_driver driver = {
 446         .driver_features = DRIVER_GEM | DRIVER_COMPUTE_ACCEL,
 447
 448         .open = ivpu_open,
 449         .postclose = ivpu_postclose,
 450
 451         .gem_create_object = ivpu_gem_create_object,
 452         .gem_prime_import_sg_table = drm_gem_shmem_prime_import_sg_table,
 453
 454         .ioctls = ivpu_drm_ioctls,
 455         .num_ioctls = ARRAY_SIZE(ivpu_drm_ioctls),
 456         .fops = &ivpu_fops,
 457
 458         .name = DRIVER_NAME,
 459         .desc = DRIVER_DESC,
 460
 461 #ifdef DRIVER_DATE
 462         .date = DRIVER_DATE,
 463         .major = DRIVER_MAJOR,
 464         .minor = DRIVER_MINOR,
 465         .patchlevel = DRIVER_PATCHLEVEL,
 466 #else
 467         .date = UTS_RELEASE,
 468         .major = 1,
 469 #endif
 470 };
 471
 472 static void ivpu_context_abort_invalid(struct ivpu_device *vdev)
 473 {
 474         struct ivpu_file_priv *file_priv;
 475         unsigned long ctx_id;
 476
 477         mutex_lock(&vdev->context_list_lock);
 478
 479         xa_for_each(&vdev->context_xa, ctx_id, file_priv) {
 480                 if (!file_priv->has_mmu_faults || file_priv->aborted)
 481                         continue;
 482
 483                 mutex_lock(&file_priv->lock);
 484                 ivpu_context_abort_locked(file_priv);
 485                 file_priv->aborted = true;
 486                 mutex_unlock(&file_priv->lock);
 487         }
 488
 489         mutex_unlock(&vdev->context_list_lock);
 490 }
 491
 492 static irqreturn_t ivpu_irq_thread_handler(int irq, void *arg)
 493 {
 494         struct ivpu_device *vdev = arg;
 495         u8 irq_src;
 496
 497         if (kfifo_is_empty(&vdev->hw->irq.fifo))
 498                 return IRQ_NONE;
 499
 500         while (kfifo_get(&vdev->hw->irq.fifo, &irq_src)) {
 501                 switch (irq_src) {
 502                 case IVPU_HW_IRQ_SRC_IPC:
 503                         ivpu_ipc_irq_thread_handler(vdev);
 504                         break;
 505                 case IVPU_HW_IRQ_SRC_MMU_EVTQ:
 506                         ivpu_context_abort_invalid(vdev);
 507                         break;
 508                 case IVPU_HW_IRQ_SRC_DCT:
 509                         ivpu_pm_dct_irq_thread_handler(vdev);
 510                         break;
 511                 default:
 512                         ivpu_err_ratelimited(vdev, "Unknown IRQ source: %u\n", irq_src);
 513                         break;
 514                 }
 515         }
 516
 517         return IRQ_HANDLED;
 518 }
 519
 520 static int ivpu_irq_init(struct ivpu_device *vdev)
 521 {
 522         struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
 523         int ret;
 524
 525         ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI | PCI_IRQ_MSIX);
 526         if (ret < 0) {
 527                 ivpu_err(vdev, "Failed to allocate a MSI IRQ: %d\n", ret);
 528                 return ret;
 529         }
 530
 531         ivpu_irq_handlers_init(vdev);
 532
 533         vdev->irq = pci_irq_vector(pdev, 0);
 534
 535         ret = devm_request_threaded_irq(vdev->drm.dev, vdev->irq, ivpu_hw_irq_handler,
 536                                         ivpu_irq_thread_handler, IRQF_NO_AUTOEN, DRIVER_NAME, vdev);
 537         if (ret)
 538                 ivpu_err(vdev, "Failed to request an IRQ %d\n", ret);
 539
 540         return ret;
 541 }
 542
 543 static int ivpu_pci_init(struct ivpu_device *vdev)
 544 {
 545         struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
 546         struct resource *bar0 = &pdev->resource[0];
 547         struct resource *bar4 = &pdev->resource[4];
 548         int ret;
 549
 550         ivpu_dbg(vdev, MISC, "Mapping BAR0 (RegV) %pR\n", bar0);
 551         vdev->regv = devm_ioremap_resource(vdev->drm.dev, bar0);
 552         if (IS_ERR(vdev->regv)) {
 553                 ivpu_err(vdev, "Failed to map bar 0: %pe\n", vdev->regv);
 554                 return PTR_ERR(vdev->regv);
 555         }
 556
 557         ivpu_dbg(vdev, MISC, "Mapping BAR4 (RegB) %pR\n", bar4);
 558         vdev->regb = devm_ioremap_resource(vdev->drm.dev, bar4);
 559         if (IS_ERR(vdev->regb)) {
 560                 ivpu_err(vdev, "Failed to map bar 4: %pe\n", vdev->regb);
 561                 return PTR_ERR(vdev->regb);
 562         }
 563
 564         ret = dma_set_mask_and_coherent(vdev->drm.dev, DMA_BIT_MASK(vdev->hw->dma_bits));
 565         if (ret) {
 566                 ivpu_err(vdev, "Failed to set DMA mask: %d\n", ret);
 567                 return ret;
 568         }
 569         dma_set_max_seg_size(vdev->drm.dev, UINT_MAX);
 570
 571         /* Clear any pending errors */
 572         pcie_capability_clear_word(pdev, PCI_EXP_DEVSTA, 0x3f);
 573
 574         /* NPU does not require 10m D3hot delay */
 575         pdev->d3hot_delay = 0;
 576
 577         ret = pcim_enable_device(pdev);
 578         if (ret) {
 579                 ivpu_err(vdev, "Failed to enable PCI device: %d\n", ret);
 580                 return ret;
 581         }
 582
 583         pci_set_master(pdev);
 584
 585         return 0;
 586 }
 587
 588 static int ivpu_dev_init(struct ivpu_device *vdev)
 589 {
 590         int ret;
 591
 592         vdev->hw = drmm_kzalloc(&vdev->drm, sizeof(*vdev->hw), GFP_KERNEL);
 593         if (!vdev->hw)
 594                 return -ENOMEM;
 595
 596         vdev->mmu = drmm_kzalloc(&vdev->drm, sizeof(*vdev->mmu), GFP_KERNEL);
 597         if (!vdev->mmu)
 598                 return -ENOMEM;
 599
 600         vdev->fw = drmm_kzalloc(&vdev->drm, sizeof(*vdev->fw), GFP_KERNEL);
 601         if (!vdev->fw)
 602                 return -ENOMEM;
 603
 604         vdev->ipc = drmm_kzalloc(&vdev->drm, sizeof(*vdev->ipc), GFP_KERNEL);
 605         if (!vdev->ipc)
 606                 return -ENOMEM;
 607
 608         vdev->pm = drmm_kzalloc(&vdev->drm, sizeof(*vdev->pm), GFP_KERNEL);
 609         if (!vdev->pm)
 610                 return -ENOMEM;
 611
 612         if (ivpu_hw_ip_gen(vdev) >= IVPU_HW_IP_40XX)
 613                 vdev->hw->dma_bits = 48;
 614         else
 615                 vdev->hw->dma_bits = 38;
 616
 617         vdev->platform = IVPU_PLATFORM_INVALID;
 618         vdev->context_xa_limit.min = IVPU_USER_CONTEXT_MIN_SSID;
 619         vdev->context_xa_limit.max = IVPU_USER_CONTEXT_MAX_SSID;
 620         atomic64_set(&vdev->unique_id_counter, 0);
 621         xa_init_flags(&vdev->context_xa, XA_FLAGS_ALLOC | XA_FLAGS_LOCK_IRQ);
 622         xa_init_flags(&vdev->submitted_jobs_xa, XA_FLAGS_ALLOC1);
 623         xa_init_flags(&vdev->db_xa, XA_FLAGS_ALLOC1);
 624         lockdep_set_class(&vdev->submitted_jobs_xa.xa_lock, &submitted_jobs_xa_lock_class_key);
 625         INIT_LIST_HEAD(&vdev->bo_list);
 626
 627         vdev->db_limit.min = IVPU_MIN_DB;
 628         vdev->db_limit.max = IVPU_MAX_DB;
 629
 630         ret = drmm_mutex_init(&vdev->drm, &vdev->context_list_lock);
 631         if (ret)
 632                 goto err_xa_destroy;
 633
 634         ret = drmm_mutex_init(&vdev->drm, &vdev->bo_list_lock);
 635         if (ret)
 636                 goto err_xa_destroy;
 637
 638         ret = ivpu_pci_init(vdev);
 639         if (ret)
 640                 goto err_xa_destroy;
 641
 642         ret = ivpu_irq_init(vdev);
 643         if (ret)
 644                 goto err_xa_destroy;
 645
 646         /* Init basic HW info based on buttress registers which are accessible before power up */
 647         ret = ivpu_hw_init(vdev);
 648         if (ret)
 649                 goto err_xa_destroy;
 650
 651         /* Power up early so the rest of init code can access VPU registers */
 652         ret = ivpu_hw_power_up(vdev);
 653         if (ret)
 654                 goto err_shutdown;
 655
 656         ivpu_mmu_global_context_init(vdev);
 657
 658         ret = ivpu_mmu_init(vdev);
 659         if (ret)
 660                 goto err_mmu_gctx_fini;
 661
 662         ret = ivpu_mmu_reserved_context_init(vdev);
 663         if (ret)
 664                 goto err_mmu_gctx_fini;
 665
 666         ret = ivpu_fw_init(vdev);
 667         if (ret)
 668                 goto err_mmu_rctx_fini;
 669
 670         ret = ivpu_ipc_init(vdev);
 671         if (ret)
 672                 goto err_fw_fini;
 673
 674         ivpu_pm_init(vdev);
 675
 676         ret = ivpu_boot(vdev);
 677         if (ret)
 678                 goto err_ipc_fini;
 679
 680         ivpu_job_done_consumer_init(vdev);
 681         ivpu_pm_enable(vdev);
 682
 683         return 0;
 684
 685 err_ipc_fini:
 686         ivpu_ipc_fini(vdev);
 687 err_fw_fini:
 688         ivpu_fw_fini(vdev);
 689 err_mmu_rctx_fini:
 690         ivpu_mmu_reserved_context_fini(vdev);
 691 err_mmu_gctx_fini:
 692         ivpu_mmu_global_context_fini(vdev);
 693 err_shutdown:
 694         ivpu_shutdown(vdev);
 695 err_xa_destroy:
 696         xa_destroy(&vdev->db_xa);
 697         xa_destroy(&vdev->submitted_jobs_xa);
 698         xa_destroy(&vdev->context_xa);
 699         return ret;
 700 }
 701
 702 static void ivpu_bo_unbind_all_user_contexts(struct ivpu_device *vdev)
 703 {
 704         struct ivpu_file_priv *file_priv;
 705         unsigned long ctx_id;
 706
 707         mutex_lock(&vdev->context_list_lock);
 708
 709         xa_for_each(&vdev->context_xa, ctx_id, file_priv)
 710                 file_priv_unbind(vdev, file_priv);
 711
 712         mutex_unlock(&vdev->context_list_lock);
 713 }
 714
 715 static void ivpu_dev_fini(struct ivpu_device *vdev)
 716 {
 717         ivpu_jobs_abort_all(vdev);
 718         ivpu_pm_cancel_recovery(vdev);
 719         ivpu_pm_disable(vdev);
 720         ivpu_prepare_for_reset(vdev);
 721         ivpu_shutdown(vdev);
 722
 723         ivpu_ms_cleanup_all(vdev);
 724         ivpu_job_done_consumer_fini(vdev);
 725         ivpu_bo_unbind_all_user_contexts(vdev);
 726
 727         ivpu_ipc_fini(vdev);
 728         ivpu_fw_fini(vdev);
 729         ivpu_mmu_reserved_context_fini(vdev);
 730         ivpu_mmu_global_context_fini(vdev);
 731
 732         drm_WARN_ON(&vdev->drm, !xa_empty(&vdev->db_xa));
 733         xa_destroy(&vdev->db_xa);
 734         drm_WARN_ON(&vdev->drm, !xa_empty(&vdev->submitted_jobs_xa));
 735         xa_destroy(&vdev->submitted_jobs_xa);
 736         drm_WARN_ON(&vdev->drm, !xa_empty(&vdev->context_xa));
 737         xa_destroy(&vdev->context_xa);
 738 }
 739
 740 static struct pci_device_id ivpu_pci_ids[] = {
 741         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_MTL) },
 742         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_ARL) },
 743         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_LNL) },
 744         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PTL_P) },
 745         { }
 746 };
 747 MODULE_DEVICE_TABLE(pci, ivpu_pci_ids);
 748
 749 static int ivpu_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 750 {
 751         struct ivpu_device *vdev;
 752         int ret;
 753
 754         vdev = devm_drm_dev_alloc(&pdev->dev, &driver, struct ivpu_device, drm);
 755         if (IS_ERR(vdev))
 756                 return PTR_ERR(vdev);
 757
 758         pci_set_drvdata(pdev, vdev);
 759
 760         ret = ivpu_dev_init(vdev);
 761         if (ret)
 762                 return ret;
 763
 764         ivpu_debugfs_init(vdev);
 765         ivpu_sysfs_init(vdev);
 766
 767         ret = drm_dev_register(&vdev->drm, 0);
 768         if (ret) {
 769                 dev_err(&pdev->dev, "Failed to register DRM device: %d\n", ret);
 770                 ivpu_dev_fini(vdev);
 771         }
 772
 773         return ret;
 774 }
 775
 776 static void ivpu_remove(struct pci_dev *pdev)
 777 {
 778         struct ivpu_device *vdev = pci_get_drvdata(pdev);
 779
 780         drm_dev_unplug(&vdev->drm);
 781         ivpu_dev_fini(vdev);
 782 }
 783
 784 static const struct dev_pm_ops ivpu_drv_pci_pm = {
 785         SET_SYSTEM_SLEEP_PM_OPS(ivpu_pm_suspend_cb, ivpu_pm_resume_cb)
 786         SET_RUNTIME_PM_OPS(ivpu_pm_runtime_suspend_cb, ivpu_pm_runtime_resume_cb, NULL)
 787 };
 788
 789 static const struct pci_error_handlers ivpu_drv_pci_err = {
 790         .reset_prepare = ivpu_pm_reset_prepare_cb,
 791         .reset_done = ivpu_pm_reset_done_cb,
 792 };
 793
 794 static struct pci_driver ivpu_pci_driver = {
 795         .name = KBUILD_MODNAME,
 796         .id_table = ivpu_pci_ids,
 797         .probe = ivpu_probe,
 798         .remove = ivpu_remove,
 799         .driver = {
 800                 .pm = &ivpu_drv_pci_pm,
 801         },
 802         .err_handler = &ivpu_drv_pci_err,
 803 };
 804
 805 module_pci_driver(ivpu_pci_driver);
 806
 807 MODULE_AUTHOR("Intel Corporation");
 808 MODULE_DESCRIPTION(DRIVER_DESC);
 809 MODULE_LICENSE("GPL and additional rights");
 810 MODULE_VERSION(DRIVER_VERSION_STR);