arm: mach-k3: Move ARM64 specific code into new arm64 directory

Like we did with R5, move ARM64 code into a specific directory to make
it clear what code is only meant to run on each core type.

Signed-off-by: Andrew Davis <[email protected]>

diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index 945698e6e863c5887555bacbfb5775597f65a3c4..19b2d79e57d28d9d6840ea5b5a6580dd8428373e 100644 (file)
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -3,9 +3,8 @@
 # Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/
 #      Lokesh Vutla <[email protected]>
 
+obj-$(CONFIG_ARM64) += arm64/
 obj-$(CONFIG_CPU_V7R) += r5/
-obj-$(CONFIG_ARM64) += arm64-mmu.o
-obj-$(CONFIG_ARM64) += cache.o
 obj-$(CONFIG_OF_LIBFDT) += common_fdt.o
 ifeq ($(CONFIG_OF_LIBFDT)$(CONFIG_OF_SYSTEM_SETUP),yy)
 obj-$(CONFIG_SOC_K3_AM654) += am654_fdt.o

diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
deleted file mode 100644 (file)
index 0e07b1b..0000000
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ /dev/null
@@ -1,54 +0,0 @@
-// SPDX-License-Identifier:     GPL-2.0+
-/*
- * K3: ARM64 MMU setup
- *
- * Copyright (C) 2018-2020 Texas Instruments Incorporated - https://www.ti.com/
- *     Lokesh Vutla <[email protected]>
- *     Suman Anna <[email protected]>
- * (This file is derived from arch/arm/mach-zynqmp/cpu.c)
- *
- */
-
-#include <asm/system.h>
-#include <asm/armv8/mmu.h>
-
-struct mm_region k3_mem_map[] = {
-       {
-               .virt = 0x0UL,
-               .phys = 0x0UL,
-               .size = 0x80000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               .virt = 0x80000000UL,
-               .phys = 0x80000000UL,
-               .size = 0x1e780000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-                        PTE_BLOCK_INNER_SHARE
-       }, {
-               .virt = 0xa0000000UL,
-               .phys = 0xa0000000UL,
-               .size = 0x60000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-                        PTE_BLOCK_INNER_SHARE
-       }, {
-               .virt = 0x880000000UL,
-               .phys = 0x880000000UL,
-               .size = 0x80000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-                        PTE_BLOCK_INNER_SHARE
-       }, {
-               .virt = 0x500000000UL,
-               .phys = 0x500000000UL,
-               .size = 0x380000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               /* List terminator */
-               0,
-       }
-};
-
-struct mm_region *mem_map = k3_mem_map;

diff --git a/arch/arm/mach-k3/arm64/Makefile b/arch/arm/mach-k3/arm64/Makefile
new file mode 100644 (file)
index 0000000..f3d322e
--- /dev/null
+++ b/arch/arm/mach-k3/arm64/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+
+obj-y += arm64-mmu.o
+obj-y += cache.o

diff --git a/arch/arm/mach-k3/arm64/arm64-mmu.c b/arch/arm/mach-k3/arm64/arm64-mmu.c
new file mode 100644 (file)
index 0000000..0e07b1b
--- /dev/null
+++ b/arch/arm/mach-k3/arm64/arm64-mmu.c
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * K3: ARM64 MMU setup
+ *
+ * Copyright (C) 2018-2020 Texas Instruments Incorporated - https://www.ti.com/
+ *     Lokesh Vutla <[email protected]>
+ *     Suman Anna <[email protected]>
+ * (This file is derived from arch/arm/mach-zynqmp/cpu.c)
+ *
+ */
+
+#include <asm/system.h>
+#include <asm/armv8/mmu.h>
+
+struct mm_region k3_mem_map[] = {
+       {
+               .virt = 0x0UL,
+               .phys = 0x0UL,
+               .size = 0x80000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               .virt = 0x80000000UL,
+               .phys = 0x80000000UL,
+               .size = 0x1e780000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_INNER_SHARE
+       }, {
+               .virt = 0xa0000000UL,
+               .phys = 0xa0000000UL,
+               .size = 0x60000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_INNER_SHARE
+       }, {
+               .virt = 0x880000000UL,
+               .phys = 0x880000000UL,
+               .size = 0x80000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_INNER_SHARE
+       }, {
+               .virt = 0x500000000UL,
+               .phys = 0x500000000UL,
+               .size = 0x380000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* List terminator */
+               0,
+       }
+};
+
+struct mm_region *mem_map = k3_mem_map;

diff --git a/arch/arm/mach-k3/arm64/cache.S b/arch/arm/mach-k3/arm64/cache.S
new file mode 100644 (file)
index 0000000..17cfb12
--- /dev/null
+++ b/arch/arm/mach-k3/arm64/cache.S
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
+ *     Andrew F. Davis <[email protected]>
+ */
+
+#include <config.h>
+#include <linux/linkage.h>
+
+#if defined(CONFIG_SPL_BUILD)
+ENTRY(__asm_invalidate_l3_dcache)
+       /* Invalidate SPL address range */
+       mov x0, #CONFIG_SPL_TEXT_BASE
+       add x1, x0, #CONFIG_SPL_MAX_SIZE
+       b __asm_flush_dcache_range
+ENDPROC(__asm_invalidate_l3_dcache)
+
+ENTRY(__asm_flush_l3_dcache)
+       /* Flush SPL address range */
+       mov x0, #CONFIG_SPL_TEXT_BASE
+       add x1, x0, #CONFIG_SPL_MAX_SIZE
+       b __asm_flush_dcache_range
+ENDPROC(__asm_flush_l3_dcache)
+#endif

diff --git a/arch/arm/mach-k3/cache.S b/arch/arm/mach-k3/cache.S
deleted file mode 100644 (file)
index 17cfb12..0000000
--- a/arch/arm/mach-k3/cache.S
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
- *     Andrew F. Davis <[email protected]>
- */
-
-#include <config.h>
-#include <linux/linkage.h>
-
-#if defined(CONFIG_SPL_BUILD)
-ENTRY(__asm_invalidate_l3_dcache)
-       /* Invalidate SPL address range */
-       mov x0, #CONFIG_SPL_TEXT_BASE
-       add x1, x0, #CONFIG_SPL_MAX_SIZE
-       b __asm_flush_dcache_range
-ENDPROC(__asm_invalidate_l3_dcache)
-
-ENTRY(__asm_flush_l3_dcache)
-       /* Flush SPL address range */
-       mov x0, #CONFIG_SPL_TEXT_BASE
-       add x1, x0, #CONFIG_SPL_MAX_SIZE
-       b __asm_flush_dcache_range
-ENDPROC(__asm_flush_l3_dcache)
-#endif