]> Git Repo - u-boot.git/commitdiff
spi: mxc_spi: use proper clock for SPI bus
authorTim Harvey <[email protected]>
Wed, 18 Dec 2024 19:42:24 +0000 (11:42 -0800)
committerFabio Estevam <[email protected]>
Mon, 23 Dec 2024 11:08:34 +0000 (08:08 -0300)
The mxc_get_clock function is around for compatibility with older
drivers that are not clock aware. In this case asking for the clk for
MXC_CSPI_CLK does not take into account there are multiple SPI busses on
modern IMX SoC's and it will return the clock for the first bus which
may not be used or configured.

In the case you are not using the first bus you will not get the proper
clock. Fix this by obtaining the clock rate from the bus clock.

This resolves an invalid SPI clock frequency configuration for SPI2 on a
board where SPI1 is not used.

Signed-off-by: Tim Harvey <[email protected]>
drivers/spi/mxc_spi.c

index 9ab39a188b22e64f7bb92a7e54ccbee30c56700e..2c9b0ada87ba8285ce6e1dd9b2de580a8ec4a5e3 100644 (file)
@@ -114,6 +114,9 @@ struct mxc_spi_slave {
        u32             ctrl_reg;
 #if defined(MXC_ECSPI)
        u32             cfg_reg;
+#endif
+#if CONFIG_IS_ENABLED(CLK)
+       struct clk      clk;
 #endif
        int             gpio;
        int             ss_pol;
@@ -214,7 +217,11 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs)
 #ifdef MXC_ECSPI
 static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs)
 {
+#if CONFIG_IS_ENABLED(CLK)
+       u32 clk_src = clk_get_rate(&mxcs->clk);
+#else
        u32 clk_src = mxc_get_clock(MXC_CSPI_CLK);
+#endif
        s32 reg_ctrl, reg_config;
        u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, sclkctl = 0;
        u32 pre_div = 0, post_div = 0;
@@ -599,14 +606,13 @@ static int mxc_spi_probe(struct udevice *bus)
                return -ENODEV;
 
 #if CONFIG_IS_ENABLED(CLK)
-       struct clk clk;
-       ret = clk_get_by_index(bus, 0, &clk);
+       ret = clk_get_by_index(bus, 0, &mxcs->clk);
        if (ret)
                return ret;
 
-       clk_enable(&clk);
+       clk_enable(&mxcs->clk);
 
-       mxcs->max_hz = clk_get_rate(&clk);
+       mxcs->max_hz = clk_get_rate(&mxcs->clk);
 #else
        int node = dev_of_offset(bus);
        const void *blob = gd->fdt_blob;
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