ARM: cache: Fix incorrect bitwise operation

The loop implemented in the code is supposed to check whether the
PL310 operation register has any bit from the mask set. Currently,
the code checks whether the PL310 operation register has any bit
set AND whether the mask is non-zero, which is incorrect. Fix the
conditional.

Signed-off-by: Marek Vasut <[email protected]>
Cc: Dalon Westergreen <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Tom Rini <[email protected]>
Fixes: 93bc21930a1b ("armv7: add PL310 support to u-boot")

diff --git a/arch/arm/lib/cache-pl310.c b/arch/arm/lib/cache-pl310.c
index 1296ba6efda0b7480af39a2ef69384b42e50afaf..bbaaaa4157a5e79b07766ecf4970ebb4395e9c96 100644 (file)
--- a/arch/arm/lib/cache-pl310.c
+++ b/arch/arm/lib/cache-pl310.c
@@ -33,7 +33,7 @@ static void pl310_background_op_all_ways(u32 *op_reg)
        /* Invalidate all ways */
        writel(way_mask, op_reg);
        /* Wait for all ways to be invalidated */
-       while (readl(op_reg) && way_mask)
+       while (readl(op_reg) & way_mask)
                ;
        pl310_cache_sync();
 }