clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
};
+ clk-test2 {
+ compatible = "sandbox,clk-test";
+ assigned-clock-rates = <321>;
+ };
+
+ clk-test3 {
+ compatible = "sandbox,clk-test";
+ assigned-clocks = <&clk_sandbox 1>;
+ };
+
+ clk-test4 {
+ compatible = "sandbox,clk-test";
+ assigned-clock-rates = <654>, <321>;
+ assigned-clocks = <&clk_sandbox 1>;
+ };
+
ccf: clk-ccf {
compatible = "sandbox,clk-ccf";
};
dev_dbg(dev,
"could not get assigned clock %d (err = %d)\n",
index, ret);
- continue;
+ /* Skip if it is empty */
+ if (ret == -ENOENT) {
+ ret = 0;
+ continue;
+ }
+
+ return ret;
}
/* This is clk provider device trying to program itself
ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true);
ut_asserteq(clk_method1.id, clk_method2.id);
+ ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test2", &dev));
+ ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE));
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test3", &dev));
+ ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE));
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test4", &dev));
+ ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE));
+
return 0;
}