drivers/mmc/mmc_spi.c

   1 /*
   2  * generic mmc spi driver
   3  *
   4  * Copyright (C) 2010 Thomas Chou <[email protected]>
   5  * Copyright 2019 Bhargav Shah <[email protected]>
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9 #include <common.h>
  10 #include <errno.h>
  11 #include <malloc.h>
  12 #include <part.h>
  13 #include <mmc.h>
  14 #include <stdlib.h>
  15 #include <u-boot/crc.h>
  16 #include <linux/crc7.h>
  17 #include <asm/byteorder.h>
  18 #include <dm.h>
  19 #include <spi.h>
  20
  21 /* MMC/SD in SPI mode reports R1 status always */
  22 #define R1_SPI_IDLE                     BIT(0)
  23 #define R1_SPI_ERASE_RESET              BIT(1)
  24 #define R1_SPI_ILLEGAL_COMMAND          BIT(2)
  25 #define R1_SPI_COM_CRC                  BIT(3)
  26 #define R1_SPI_ERASE_SEQ                BIT(4)
  27 #define R1_SPI_ADDRESS                  BIT(5)
  28 #define R1_SPI_PARAMETER                BIT(6)
  29 /* R1 bit 7 is always zero, reuse this bit for error */
  30 #define R1_SPI_ERROR                    BIT(7)
  31
  32 /* Response tokens used to ack each block written: */
  33 #define SPI_MMC_RESPONSE_CODE(x)        ((x) & 0x1f)
  34 #define SPI_RESPONSE_ACCEPTED           ((2 << 1)|1)
  35 #define SPI_RESPONSE_CRC_ERR            ((5 << 1)|1)
  36 #define SPI_RESPONSE_WRITE_ERR          ((6 << 1)|1)
  37
  38 /* Read and write blocks start with these tokens and end with crc;
  39  * on error, read tokens act like a subset of R2_SPI_* values.
  40  */
  41 /* single block write multiblock read */
  42 #define SPI_TOKEN_SINGLE                0xfe
  43 /* multiblock write */
  44 #define SPI_TOKEN_MULTI_WRITE           0xfc
  45 /* terminate multiblock write */
  46 #define SPI_TOKEN_STOP_TRAN             0xfd
  47
  48 /* MMC SPI commands start with a start bit "0" and a transmit bit "1" */
  49 #define MMC_SPI_CMD(x) (0x40 | (x))
  50
  51 /* bus capability */
  52 #define MMC_SPI_VOLTAGE                 (MMC_VDD_32_33 | MMC_VDD_33_34)
  53 #define MMC_SPI_MIN_CLOCK               400000  /* 400KHz to meet MMC spec */
  54 #define MMC_SPI_MAX_CLOCK               25000000 /* SD/MMC legacy speed */
  55
  56 /* timeout value */
  57 #define CMD_TIMEOUT                     8
  58 #define READ_TIMEOUT                    3000000 /* 1 sec */
  59 #define WRITE_TIMEOUT                   3000000 /* 1 sec */
  60
  61 struct mmc_spi_priv {
  62         struct spi_slave *spi;
  63         struct mmc_config cfg;
  64         struct mmc mmc;
  65 };
  66
  67 static int mmc_spi_sendcmd(struct udevice *dev,
  68                            ushort cmdidx, u32 cmdarg, u32 resp_type,
  69                            u8 *resp, u32 resp_size,
  70                            bool resp_match, u8 resp_match_value)
  71 {
  72         int i, rpos = 0, ret = 0;
  73         u8 cmdo[7], r;
  74
  75         debug("%s: cmd%d cmdarg=0x%x resp_type=0x%x "
  76               "resp_size=%d resp_match=%d resp_match_value=0x%x\n",
  77               __func__, cmdidx, cmdarg, resp_type,
  78               resp_size, resp_match, resp_match_value);
  79
  80         cmdo[0] = 0xff;
  81         cmdo[1] = MMC_SPI_CMD(cmdidx);
  82         cmdo[2] = cmdarg >> 24;
  83         cmdo[3] = cmdarg >> 16;
  84         cmdo[4] = cmdarg >> 8;
  85         cmdo[5] = cmdarg;
  86         cmdo[6] = (crc7(0, &cmdo[1], 5) << 1) | 0x01;
  87         ret = dm_spi_xfer(dev, sizeof(cmdo) * 8, cmdo, NULL, SPI_XFER_BEGIN);
  88         if (ret)
  89                 return ret;
  90
  91         ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
  92         if (ret)
  93                 return ret;
  94
  95         if (!resp || !resp_size)
  96                 return 0;
  97
  98         debug("%s: cmd%d", __func__, cmdidx);
  99
 100         if (resp_match) {
 101                 r = ~resp_match_value;
 102                 i = CMD_TIMEOUT;
 103                 while (i--) {
 104                         ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
 105                         if (ret)
 106                                 return ret;
 107                         debug(" resp%d=0x%x", rpos, r);
 108                         rpos++;
 109                         if (r == resp_match_value)
 110                                 break;
 111                 }
 112                 if (!i && (r != resp_match_value))
 113                         return -ETIMEDOUT;
 114         }
 115
 116         for (i = 0; i < resp_size; i++) {
 117                 if (i == 0 && resp_match) {
 118                         resp[i] = resp_match_value;
 119                         continue;
 120                 }
 121                 ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
 122                 if (ret)
 123                         return ret;
 124                 debug(" resp%d=0x%x", rpos, r);
 125                 rpos++;
 126                 resp[i] = r;
 127         }
 128
 129         debug("\n");
 130
 131         return 0;
 132 }
 133
 134 static int mmc_spi_readdata(struct udevice *dev,
 135                             void *xbuf, u32 bcnt, u32 bsize)
 136 {
 137         u16 crc;
 138         u8 *buf = xbuf, r1;
 139         int i, ret = 0;
 140
 141         while (bcnt--) {
 142                 for (i = 0; i < READ_TIMEOUT; i++) {
 143                         ret = dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
 144                         if (ret)
 145                                 return ret;
 146                         if (r1 == SPI_TOKEN_SINGLE)
 147                                 break;
 148                 }
 149                 debug("%s: data tok%d 0x%x\n", __func__, i, r1);
 150                 if (r1 == SPI_TOKEN_SINGLE) {
 151                         ret = dm_spi_xfer(dev, bsize * 8, NULL, buf, 0);
 152                         if (ret)
 153                                 return ret;
 154                         ret = dm_spi_xfer(dev, 2 * 8, NULL, &crc, 0);
 155                         if (ret)
 156                                 return ret;
 157 #ifdef CONFIG_MMC_SPI_CRC_ON
 158                         if (be16_to_cpu(crc16_ccitt(0, buf, bsize)) != crc) {
 159                                 debug("%s: data crc error\n", __func__);
 160                                 r1 = R1_SPI_COM_CRC;
 161                                 break;
 162                         }
 163 #endif
 164                         r1 = 0;
 165                 } else {
 166                         r1 = R1_SPI_ERROR;
 167                         break;
 168                 }
 169                 buf += bsize;
 170         }
 171
 172         if (r1 & R1_SPI_COM_CRC)
 173                 ret = -ECOMM;
 174         else if (r1) /* other errors */
 175                 ret = -ETIMEDOUT;
 176
 177         return ret;
 178 }
 179
 180 static int mmc_spi_writedata(struct udevice *dev, const void *xbuf,
 181                              u32 bcnt, u32 bsize, int multi)
 182 {
 183         const u8 *buf = xbuf;
 184         u8 r1, tok[2];
 185         u16 crc;
 186         int i, ret = 0;
 187
 188         tok[0] = 0xff;
 189         tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
 190
 191         while (bcnt--) {
 192 #ifdef CONFIG_MMC_SPI_CRC_ON
 193                 crc = cpu_to_be16(crc16_ccitt(0, (u8 *)buf, bsize));
 194 #endif
 195                 dm_spi_xfer(dev, 2 * 8, tok, NULL, 0);
 196                 dm_spi_xfer(dev, bsize * 8, buf, NULL, 0);
 197                 dm_spi_xfer(dev, 2 * 8, &crc, NULL, 0);
 198                 for (i = 0; i < CMD_TIMEOUT; i++) {
 199                         dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
 200                         if ((r1 & 0x10) == 0) /* response token */
 201                                 break;
 202                 }
 203                 debug("%s: data tok%d 0x%x\n", __func__, i, r1);
 204                 if (SPI_MMC_RESPONSE_CODE(r1) == SPI_RESPONSE_ACCEPTED) {
 205                         debug("%s: data accepted\n", __func__);
 206                         for (i = 0; i < WRITE_TIMEOUT; i++) { /* wait busy */
 207                                 dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
 208                                 if (i && r1 == 0xff) {
 209                                         r1 = 0;
 210                                         break;
 211                                 }
 212                         }
 213                         if (i == WRITE_TIMEOUT) {
 214                                 debug("%s: data write timeout 0x%x\n",
 215                                       __func__, r1);
 216                                 r1 = R1_SPI_ERROR;
 217                                 break;
 218                         }
 219                 } else {
 220                         debug("%s: data error 0x%x\n", __func__, r1);
 221                         r1 = R1_SPI_COM_CRC;
 222                         break;
 223                 }
 224                 buf += bsize;
 225         }
 226         if (multi && bcnt == -1) { /* stop multi write */
 227                 tok[1] = SPI_TOKEN_STOP_TRAN;
 228                 dm_spi_xfer(dev, 2 * 8, tok, NULL, 0);
 229                 for (i = 0; i < WRITE_TIMEOUT; i++) { /* wait busy */
 230                         dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
 231                         if (i && r1 == 0xff) {
 232                                 r1 = 0;
 233                                 break;
 234                         }
 235                 }
 236                 if (i == WRITE_TIMEOUT) {
 237                         debug("%s: data write timeout 0x%x\n", __func__, r1);
 238                         r1 = R1_SPI_ERROR;
 239                 }
 240         }
 241
 242         if (r1 & R1_SPI_COM_CRC)
 243                 ret = -ECOMM;
 244         else if (r1) /* other errors */
 245                 ret = -ETIMEDOUT;
 246
 247         return ret;
 248 }
 249
 250 static int dm_mmc_spi_set_ios(struct udevice *dev)
 251 {
 252         return 0;
 253 }
 254
 255 static int dm_mmc_spi_request(struct udevice *dev, struct mmc_cmd *cmd,
 256                               struct mmc_data *data)
 257 {
 258         int i, multi, ret = 0;
 259         u8 *resp = NULL;
 260         u32 resp_size = 0;
 261         bool resp_match = false;
 262         u8 resp8 = 0, resp40[5] = { 0 }, resp_match_value = 0;
 263
 264         dm_spi_claim_bus(dev);
 265
 266         for (i = 0; i < 4; i++)
 267                 cmd->response[i] = 0;
 268
 269         switch (cmd->cmdidx) {
 270         case SD_CMD_APP_SEND_OP_COND:
 271         case MMC_CMD_SEND_OP_COND:
 272                 resp = &resp8;
 273                 resp_size = sizeof(resp8);
 274                 cmd->cmdarg = 0x40000000;
 275                 break;
 276         case SD_CMD_SEND_IF_COND:
 277                 resp = (u8 *)&resp40[0];
 278                 resp_size = sizeof(resp40);
 279                 resp_match = true;
 280                 resp_match_value = R1_SPI_IDLE;
 281                 break;
 282         case MMC_CMD_SPI_READ_OCR:
 283                 resp = (u8 *)&resp40[0];
 284                 resp_size = sizeof(resp40);
 285                 break;
 286         case MMC_CMD_SEND_STATUS:
 287         case MMC_CMD_SET_BLOCKLEN:
 288         case MMC_CMD_SPI_CRC_ON_OFF:
 289         case MMC_CMD_STOP_TRANSMISSION:
 290                 resp = &resp8;
 291                 resp_size = sizeof(resp8);
 292                 resp_match = true;
 293                 resp_match_value = 0x0;
 294                 break;
 295         case MMC_CMD_SEND_CSD:
 296         case MMC_CMD_SEND_CID:
 297         case MMC_CMD_READ_SINGLE_BLOCK:
 298         case MMC_CMD_READ_MULTIPLE_BLOCK:
 299         case MMC_CMD_WRITE_SINGLE_BLOCK:
 300         case MMC_CMD_WRITE_MULTIPLE_BLOCK:
 301                 break;
 302         default:
 303                 resp = &resp8;
 304                 resp_size = sizeof(resp8);
 305                 resp_match = true;
 306                 resp_match_value = R1_SPI_IDLE;
 307                 break;
 308         };
 309
 310         ret = mmc_spi_sendcmd(dev, cmd->cmdidx, cmd->cmdarg, cmd->resp_type,
 311                               resp, resp_size, resp_match, resp_match_value);
 312         if (ret)
 313                 goto done;
 314
 315         switch (cmd->cmdidx) {
 316         case SD_CMD_APP_SEND_OP_COND:
 317         case MMC_CMD_SEND_OP_COND:
 318                 cmd->response[0] = (resp8 & R1_SPI_IDLE) ? 0 : OCR_BUSY;
 319                 break;
 320         case SD_CMD_SEND_IF_COND:
 321         case MMC_CMD_SPI_READ_OCR:
 322                 cmd->response[0] = resp40[4];
 323                 cmd->response[0] |= (uint)resp40[3] << 8;
 324                 cmd->response[0] |= (uint)resp40[2] << 16;
 325                 cmd->response[0] |= (uint)resp40[1] << 24;
 326                 break;
 327         case MMC_CMD_SEND_STATUS:
 328                 cmd->response[0] = (resp8 & 0xff) ?
 329                         MMC_STATUS_ERROR : MMC_STATUS_RDY_FOR_DATA;
 330                 break;
 331         case MMC_CMD_SEND_CID:
 332         case MMC_CMD_SEND_CSD:
 333                 ret = mmc_spi_readdata(dev, cmd->response, 1, 16);
 334                 if (ret)
 335                         return ret;
 336                 for (i = 0; i < 4; i++)
 337                         cmd->response[i] =
 338                                 cpu_to_be32(cmd->response[i]);
 339                 break;
 340         default:
 341                 cmd->response[0] = resp8;
 342                 break;
 343         }
 344
 345         debug("%s: cmd%d resp0=0x%x resp1=0x%x resp2=0x%x resp3=0x%x\n",
 346               __func__, cmd->cmdidx, cmd->response[0], cmd->response[1],
 347               cmd->response[2], cmd->response[3]);
 348
 349         if (data) {
 350                 debug("%s: data flags=0x%x blocks=%d block_size=%d\n",
 351                       __func__, data->flags, data->blocks, data->blocksize);
 352                 multi = (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK);
 353                 if (data->flags == MMC_DATA_READ)
 354                         ret = mmc_spi_readdata(dev, data->dest,
 355                                                data->blocks, data->blocksize);
 356                 else if  (data->flags == MMC_DATA_WRITE)
 357                         ret = mmc_spi_writedata(dev, data->src,
 358                                                 data->blocks, data->blocksize,
 359                                                 multi);
 360         }
 361
 362 done:
 363         dm_spi_xfer(dev, 0, NULL, NULL, SPI_XFER_END);
 364
 365         dm_spi_release_bus(dev);
 366
 367         return ret;
 368 }
 369
 370 static int mmc_spi_probe(struct udevice *dev)
 371 {
 372         struct mmc_spi_priv *priv = dev_get_priv(dev);
 373         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 374         char *name;
 375
 376         priv->spi = dev_get_parent_priv(dev);
 377         if (!priv->spi->max_hz)
 378                 priv->spi->max_hz = MMC_SPI_MAX_CLOCK;
 379         priv->spi->speed = 0;
 380         priv->spi->mode = SPI_MODE_0;
 381         priv->spi->wordlen = 8;
 382
 383         name = malloc(strlen(dev->parent->name) + strlen(dev->name) + 4);
 384         if (!name)
 385                 return -ENOMEM;
 386         sprintf(name, "%s:%s", dev->parent->name, dev->name);
 387
 388         priv->cfg.name = name;
 389         priv->cfg.host_caps = MMC_MODE_SPI;
 390         priv->cfg.voltages = MMC_SPI_VOLTAGE;
 391         priv->cfg.f_min = MMC_SPI_MIN_CLOCK;
 392         priv->cfg.f_max = priv->spi->max_hz;
 393         priv->cfg.part_type = PART_TYPE_DOS;
 394         priv->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 395
 396         priv->mmc.cfg = &priv->cfg;
 397         priv->mmc.priv = priv;
 398         priv->mmc.dev = dev;
 399
 400         upriv->mmc = &priv->mmc;
 401
 402         return 0;
 403 }
 404
 405 static int mmc_spi_bind(struct udevice *dev)
 406 {
 407         struct mmc_spi_priv *priv = dev_get_priv(dev);
 408
 409         return mmc_bind(dev, &priv->mmc, &priv->cfg);
 410 }
 411
 412 static const struct dm_mmc_ops mmc_spi_ops = {
 413         .send_cmd       = dm_mmc_spi_request,
 414         .set_ios        = dm_mmc_spi_set_ios,
 415 };
 416
 417 static const struct udevice_id dm_mmc_spi_match[] = {
 418         { .compatible = "mmc-spi-slot" },
 419         { /* sentinel */ }
 420 };
 421
 422 U_BOOT_DRIVER(mmc_spi) = {
 423         .name = "mmc_spi",
 424         .id = UCLASS_MMC,
 425         .of_match = dm_mmc_spi_match,
 426         .ops = &mmc_spi_ops,
 427         .probe = mmc_spi_probe,
 428         .bind = mmc_spi_bind,
 429         .priv_auto_alloc_size = sizeof(struct mmc_spi_priv),
 430 };