3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 #include <asm/arch/ixp425.h>
38 DECLARE_GLOBAL_DATA_PTR;
44 * setup up stacks if necessary
47 IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
48 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
55 int cleanup_before_linux (void)
58 * this function is called just before we call linux
59 * it prepares the processor for linux
61 * just disable everything that can disturb booting linux
66 disable_interrupts ();
68 /* turn off I-cache */
69 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
71 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
74 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
79 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
81 printf ("resetting ...\n");
83 udelay (50000); /* wait 50 ms */
84 disable_interrupts ();
92 void icache_enable (void)
96 /* read control register */
97 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
102 /* write back to control register */
103 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
106 void icache_disable (void)
110 /* read control register */
111 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
116 /* write back to control register */
117 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
120 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
123 int icache_status (void)
127 /* read control register */
128 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
134 /* we will never enable dcache, because we have to setup MMU first */
135 void dcache_enable (void)
140 void dcache_disable (void)
145 int dcache_status (void)
147 return 0; /* always off */