1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
10 #include <dm/of_extra.h>
14 #include <fdt_support.h>
17 #include <linux/libfdt.h>
19 #include <asm/sections.h>
20 #include <linux/ctype.h>
21 #include <linux/lzo.h>
23 DECLARE_GLOBAL_DATA_PTR;
26 * Here are the type we know about. One day we might allow drivers to
27 * register. For now we just put them here. The COMPAT macro allows us to
28 * turn this into a sparse list later, and keeps the ID with the name.
30 * NOTE: This list is basically a TODO list for things that need to be
31 * converted to driver model. So don't add new things here unless there is a
32 * good reason why driver-model conversion is infeasible. Examples include
33 * things which are used before driver model is available.
35 #define COMPAT(id, name) name
36 static const char * const compat_names[COMPAT_COUNT] = {
37 COMPAT(UNKNOWN, "<none>"),
38 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
39 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
40 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
41 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
42 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
43 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
44 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
45 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
46 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
47 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
48 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
49 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
50 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
51 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
52 COMPAT(INTEL_MICROCODE, "intel,microcode"),
53 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
54 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
55 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
56 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
57 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
58 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
59 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
60 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
61 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
62 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
63 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
64 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
65 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
66 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
67 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
68 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
69 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
70 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
71 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
74 const char *fdtdec_get_compatible(enum fdt_compat_id id)
76 /* We allow reading of the 'unknown' ID for testing purposes */
77 assert(id >= 0 && id < COMPAT_COUNT);
78 return compat_names[id];
81 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
82 const char *prop_name, int index, int na,
83 int ns, fdt_size_t *sizep,
86 const fdt32_t *prop, *prop_end;
87 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
91 debug("%s: %s: ", __func__, prop_name);
93 prop = fdt_getprop(blob, node, prop_name, &len);
95 debug("(not found)\n");
96 return FDT_ADDR_T_NONE;
98 prop_end = prop + (len / sizeof(*prop));
100 prop_addr = prop + (index * (na + ns));
101 prop_size = prop_addr + na;
102 prop_after_size = prop_size + ns;
103 if (prop_after_size > prop_end) {
104 debug("(not enough data: expected >= %d cells, got %d cells)\n",
105 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
106 return FDT_ADDR_T_NONE;
109 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
111 addr = fdt_translate_address(blob, node, prop_addr);
114 addr = fdtdec_get_number(prop_addr, na);
117 *sizep = fdtdec_get_number(prop_size, ns);
118 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
119 (unsigned long long)*sizep);
121 debug("addr=%08llx\n", (unsigned long long)addr);
127 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
128 int node, const char *prop_name,
129 int index, fdt_size_t *sizep,
134 debug("%s: ", __func__);
136 na = fdt_address_cells(blob, parent);
138 debug("(bad #address-cells)\n");
139 return FDT_ADDR_T_NONE;
142 ns = fdt_size_cells(blob, parent);
144 debug("(bad #size-cells)\n");
145 return FDT_ADDR_T_NONE;
148 debug("na=%d, ns=%d, ", na, ns);
150 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
151 ns, sizep, translate);
154 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
155 const char *prop_name, int index,
161 debug("%s: ", __func__);
163 parent = fdt_parent_offset(blob, node);
165 debug("(no parent found)\n");
166 return FDT_ADDR_T_NONE;
169 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
170 index, sizep, translate);
173 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
174 const char *prop_name, fdt_size_t *sizep)
176 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
178 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
179 sizeof(fdt_addr_t) / sizeof(fdt32_t),
183 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
185 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
188 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
189 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
191 const char *list, *end;
194 list = fdt_getprop(blob, node, "compatible", &len);
201 if (len >= strlen("pciVVVV,DDDD")) {
202 char *s = strstr(list, "pci");
205 * check if the string is something like pciVVVV,DDDD.RR
206 * or just pciVVVV,DDDD
208 if (s && s[7] == ',' &&
209 (s[12] == '.' || s[12] == 0)) {
211 *vendor = simple_strtol(s, NULL, 16);
214 *device = simple_strtol(s, NULL, 16);
225 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
230 /* extract the bar number from fdt_pci_addr */
231 barnum = addr->phys_hi & 0xff;
232 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
235 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
236 *bar = dm_pci_read_bar32(dev, barnum);
242 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
243 uint64_t default_val)
245 const unaligned_fdt64_t *cell64;
248 cell64 = fdt_getprop(blob, node, prop_name, &length);
249 if (!cell64 || length < sizeof(*cell64))
252 return fdt64_to_cpu(*cell64);
255 int fdtdec_get_is_enabled(const void *blob, int node)
260 * It should say "okay", so only allow that. Some fdts use "ok" but
261 * this is a bug. Please fix your device tree source file. See here
266 cell = fdt_getprop(blob, node, "status", NULL);
268 return strcmp(cell, "okay") == 0;
272 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
274 enum fdt_compat_id id;
276 /* Search our drivers */
277 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
278 if (fdt_node_check_compatible(blob, node,
279 compat_names[id]) == 0)
281 return COMPAT_UNKNOWN;
284 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
286 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
289 int fdtdec_next_compatible_subnode(const void *blob, int node,
290 enum fdt_compat_id id, int *depthp)
293 node = fdt_next_node(blob, node, depthp);
294 } while (*depthp > 1);
296 /* If this is a direct subnode, and compatible, return it */
297 if (*depthp == 1 && 0 == fdt_node_check_compatible(
298 blob, node, compat_names[id]))
301 return -FDT_ERR_NOTFOUND;
304 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
307 #define MAX_STR_LEN 20
308 char str[MAX_STR_LEN + 20];
311 /* snprintf() is not available */
312 assert(strlen(name) < MAX_STR_LEN);
313 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
314 node = fdt_path_offset(blob, str);
317 err = fdt_node_check_compatible(blob, node, compat_names[id]);
321 return -FDT_ERR_NOTFOUND;
326 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
327 enum fdt_compat_id id, int *node_list,
330 memset(node_list, '\0', sizeof(*node_list) * maxcount);
332 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
335 /* TODO: Can we tighten this code up a little? */
336 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
337 enum fdt_compat_id id, int *node_list,
340 int name_len = strlen(name);
348 /* find the alias node if present */
349 alias_node = fdt_path_offset(blob, "/aliases");
352 * start with nothing, and we can assume that the root node can't
355 memset(nodes, '\0', sizeof(nodes));
357 /* First find all the compatible nodes */
358 for (node = count = 0; node >= 0 && count < maxcount;) {
359 node = fdtdec_next_compatible(blob, node, id);
361 nodes[count++] = node;
364 debug("%s: warning: maxcount exceeded with alias '%s'\n",
367 /* Now find all the aliases */
368 for (offset = fdt_first_property_offset(blob, alias_node);
370 offset = fdt_next_property_offset(blob, offset)) {
371 const struct fdt_property *prop;
377 prop = fdt_get_property_by_offset(blob, offset, NULL);
378 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
379 if (prop->len && 0 == strncmp(path, name, name_len))
380 node = fdt_path_offset(blob, prop->data);
384 /* Get the alias number */
385 number = simple_strtoul(path + name_len, NULL, 10);
386 if (number < 0 || number >= maxcount) {
387 debug("%s: warning: alias '%s' is out of range\n",
392 /* Make sure the node we found is actually in our list! */
394 for (j = 0; j < count; j++)
395 if (nodes[j] == node) {
401 debug("%s: warning: alias '%s' points to a node "
402 "'%s' that is missing or is not compatible "
403 " with '%s'\n", __func__, path,
404 fdt_get_name(blob, node, NULL),
410 * Add this node to our list in the right place, and mark
413 if (fdtdec_get_is_enabled(blob, node)) {
414 if (node_list[number]) {
415 debug("%s: warning: alias '%s' requires that "
416 "a node be placed in the list in a "
417 "position which is already filled by "
418 "node '%s'\n", __func__, path,
419 fdt_get_name(blob, node, NULL));
422 node_list[number] = node;
423 if (number >= num_found)
424 num_found = number + 1;
429 /* Add any nodes not mentioned by an alias */
430 for (i = j = 0; i < maxcount; i++) {
432 for (; j < maxcount; j++)
434 fdtdec_get_is_enabled(blob, nodes[j]))
437 /* Have we run out of nodes to add? */
441 assert(!node_list[i]);
442 node_list[i] = nodes[j++];
451 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
454 int base_len = strlen(base);
455 const char *find_name;
460 find_name = fdt_get_name(blob, offset, &find_namelen);
461 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
463 aliases = fdt_path_offset(blob, "/aliases");
464 for (prop_offset = fdt_first_property_offset(blob, aliases);
466 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
472 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
473 debug(" - %s, %s\n", name, prop);
474 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
475 strncmp(name, base, base_len))
478 slash = strrchr(prop, '/');
479 if (strcmp(slash + 1, find_name))
481 val = trailing_strtol(name);
484 debug("Found seq %d\n", *seqp);
489 debug("Not found\n");
493 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
495 int base_len = strlen(base);
500 debug("Looking for highest alias id for '%s'\n", base);
502 aliases = fdt_path_offset(blob, "/aliases");
503 for (prop_offset = fdt_first_property_offset(blob, aliases);
505 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
510 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
511 debug(" - %s, %s\n", name, prop);
512 if (*prop != '/' || prop[len - 1] ||
513 strncmp(name, base, base_len))
516 val = trailing_strtol(name);
518 debug("Found seq %d\n", val);
526 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
532 chosen_node = fdt_path_offset(blob, "/chosen");
533 return fdt_getprop(blob, chosen_node, name, NULL);
536 int fdtdec_get_chosen_node(const void *blob, const char *name)
540 prop = fdtdec_get_chosen_prop(blob, name);
542 return -FDT_ERR_NOTFOUND;
543 return fdt_path_offset(blob, prop);
546 int fdtdec_check_fdt(void)
549 * We must have an FDT, but we cannot panic() yet since the console
550 * is not ready. So for now, just assert(). Boards which need an early
551 * FDT (prior to console ready) will need to make their own
552 * arrangements and do their own checks.
554 assert(!fdtdec_prepare_fdt());
559 * This function is a little odd in that it accesses global data. At some
560 * point if the architecture board.c files merge this will make more sense.
561 * Even now, it is common code.
563 int fdtdec_prepare_fdt(void)
565 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
566 fdt_check_header(gd->fdt_blob)) {
567 #ifdef CONFIG_SPL_BUILD
568 puts("Missing DTB\n");
570 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
573 printf("fdt_blob=%p\n", gd->fdt_blob);
574 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
584 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
589 debug("%s: %s\n", __func__, prop_name);
590 phandle = fdt_getprop(blob, node, prop_name, NULL);
592 return -FDT_ERR_NOTFOUND;
594 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
599 * Look up a property in a node and check that it has a minimum length.
601 * @param blob FDT blob
602 * @param node node to examine
603 * @param prop_name name of property to find
604 * @param min_len minimum property length in bytes
605 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
606 found, or -FDT_ERR_BADLAYOUT if not enough data
607 * @return pointer to cell, which is only valid if err == 0
609 static const void *get_prop_check_min_len(const void *blob, int node,
610 const char *prop_name, int min_len,
616 debug("%s: %s\n", __func__, prop_name);
617 cell = fdt_getprop(blob, node, prop_name, &len);
619 *err = -FDT_ERR_NOTFOUND;
620 else if (len < min_len)
621 *err = -FDT_ERR_BADLAYOUT;
627 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
628 u32 *array, int count)
633 debug("%s: %s\n", __func__, prop_name);
634 cell = get_prop_check_min_len(blob, node, prop_name,
635 sizeof(u32) * count, &err);
639 for (i = 0; i < count; i++)
640 array[i] = fdt32_to_cpu(cell[i]);
645 int fdtdec_get_int_array_count(const void *blob, int node,
646 const char *prop_name, u32 *array, int count)
652 debug("%s: %s\n", __func__, prop_name);
653 cell = fdt_getprop(blob, node, prop_name, &len);
655 return -FDT_ERR_NOTFOUND;
656 elems = len / sizeof(u32);
659 for (i = 0; i < count; i++)
660 array[i] = fdt32_to_cpu(cell[i]);
665 const u32 *fdtdec_locate_array(const void *blob, int node,
666 const char *prop_name, int count)
671 cell = get_prop_check_min_len(blob, node, prop_name,
672 sizeof(u32) * count, &err);
673 return err ? NULL : cell;
676 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
681 debug("%s: %s\n", __func__, prop_name);
682 cell = fdt_getprop(blob, node, prop_name, &len);
686 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
687 const char *list_name,
688 const char *cells_name,
689 int cell_count, int index,
690 struct fdtdec_phandle_args *out_args)
692 const __be32 *list, *list_end;
693 int rc = 0, size, cur_index = 0;
698 /* Retrieve the phandle list property */
699 list = fdt_getprop(blob, src_node, list_name, &size);
702 list_end = list + size / sizeof(*list);
704 /* Loop over the phandles until all the requested entry is found */
705 while (list < list_end) {
710 * If phandle is 0, then it is an empty entry with no
711 * arguments. Skip forward to the next entry.
713 phandle = be32_to_cpup(list++);
716 * Find the provider node and parse the #*-cells
717 * property to determine the argument length.
719 * This is not needed if the cell count is hard-coded
720 * (i.e. cells_name not set, but cell_count is set),
721 * except when we're going to return the found node
724 if (cells_name || cur_index == index) {
725 node = fdt_node_offset_by_phandle(blob,
728 debug("%s: could not find phandle\n",
729 fdt_get_name(blob, src_node,
736 count = fdtdec_get_int(blob, node, cells_name,
739 debug("%s: could not get %s for %s\n",
740 fdt_get_name(blob, src_node,
743 fdt_get_name(blob, node,
752 * Make sure that the arguments actually fit in the
753 * remaining property data length
755 if (list + count > list_end) {
756 debug("%s: arguments longer than property\n",
757 fdt_get_name(blob, src_node, NULL));
763 * All of the error cases above bail out of the loop, so at
764 * this point, the parsing is successful. If the requested
765 * index matches, then fill the out_args structure and return,
766 * or return -ENOENT for an empty entry.
769 if (cur_index == index) {
776 if (count > MAX_PHANDLE_ARGS) {
777 debug("%s: too many arguments %d\n",
778 fdt_get_name(blob, src_node,
780 count = MAX_PHANDLE_ARGS;
782 out_args->node = node;
783 out_args->args_count = count;
784 for (i = 0; i < count; i++) {
786 be32_to_cpup(list++);
790 /* Found it! return success */
800 * Result will be one of:
801 * -ENOENT : index is for empty phandle
802 * -EINVAL : parsing error on data
803 * [1..n] : Number of phandle (count mode; when index = -1)
805 rc = index < 0 ? cur_index : -ENOENT;
810 int fdtdec_get_child_count(const void *blob, int node)
815 fdt_for_each_subnode(subnode, blob, node)
821 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
822 u8 *array, int count)
827 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
829 memcpy(array, cell, count);
833 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
834 const char *prop_name, int count)
839 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
845 int fdtdec_get_config_int(const void *blob, const char *prop_name,
850 debug("%s: %s\n", __func__, prop_name);
851 config_node = fdt_path_offset(blob, "/config");
854 return fdtdec_get_int(blob, config_node, prop_name, default_val);
857 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
862 debug("%s: %s\n", __func__, prop_name);
863 config_node = fdt_path_offset(blob, "/config");
866 prop = fdt_get_property(blob, config_node, prop_name, NULL);
871 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
877 debug("%s: %s\n", __func__, prop_name);
878 nodeoffset = fdt_path_offset(blob, "/config");
882 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
886 return (char *)nodep;
889 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
894 number = (number << 32) | fdt32_to_cpu(*ptr++);
899 int fdt_get_resource(const void *fdt, int node, const char *property,
900 unsigned int index, struct fdt_resource *res)
902 const fdt32_t *ptr, *end;
903 int na, ns, len, parent;
906 parent = fdt_parent_offset(fdt, node);
910 na = fdt_address_cells(fdt, parent);
911 ns = fdt_size_cells(fdt, parent);
913 ptr = fdt_getprop(fdt, node, property, &len);
917 end = ptr + len / sizeof(*ptr);
919 while (ptr + na + ns <= end) {
921 res->start = fdtdec_get_number(ptr, na);
922 res->end = res->start;
923 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
931 return -FDT_ERR_NOTFOUND;
934 int fdt_get_named_resource(const void *fdt, int node, const char *property,
935 const char *prop_names, const char *name,
936 struct fdt_resource *res)
940 index = fdt_stringlist_search(fdt, node, prop_names, name);
944 return fdt_get_resource(fdt, node, property, index, res);
947 static int decode_timing_property(const void *blob, int node, const char *name,
948 struct timing_entry *result)
953 prop = fdt_getprop(blob, node, name, &length);
955 debug("%s: could not find property %s\n",
956 fdt_get_name(blob, node, NULL), name);
960 if (length == sizeof(u32)) {
961 result->typ = fdtdec_get_int(blob, node, name, 0);
962 result->min = result->typ;
963 result->max = result->typ;
965 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
971 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
972 struct display_timing *dt)
974 int i, node, timings_node;
978 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
979 if (timings_node < 0)
982 for (i = 0, node = fdt_first_subnode(blob, timings_node);
983 node > 0 && i != index;
984 node = fdt_next_subnode(blob, node))
990 memset(dt, 0, sizeof(*dt));
992 ret |= decode_timing_property(blob, node, "hback-porch",
994 ret |= decode_timing_property(blob, node, "hfront-porch",
996 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
997 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
998 ret |= decode_timing_property(blob, node, "vback-porch",
1000 ret |= decode_timing_property(blob, node, "vfront-porch",
1002 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1003 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1004 ret |= decode_timing_property(blob, node, "clock-frequency",
1008 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1010 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1011 DISPLAY_FLAGS_VSYNC_LOW;
1013 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1015 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1016 DISPLAY_FLAGS_HSYNC_LOW;
1018 val = fdtdec_get_int(blob, node, "de-active", -1);
1020 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1021 DISPLAY_FLAGS_DE_LOW;
1023 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1025 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1026 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1029 if (fdtdec_get_bool(blob, node, "interlaced"))
1030 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1031 if (fdtdec_get_bool(blob, node, "doublescan"))
1032 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1033 if (fdtdec_get_bool(blob, node, "doubleclk"))
1034 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1039 int fdtdec_setup_mem_size_base_fdt(const void *blob)
1042 struct fdt_resource res;
1044 mem = fdt_path_offset(blob, "/memory");
1046 debug("%s: Missing /memory node\n", __func__);
1050 ret = fdt_get_resource(blob, mem, "reg", 0, &res);
1052 debug("%s: Unable to decode first memory bank\n", __func__);
1056 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1057 gd->ram_base = (unsigned long)res.start;
1058 debug("%s: Initial DRAM size %llx\n", __func__,
1059 (unsigned long long)gd->ram_size);
1064 int fdtdec_setup_mem_size_base(void)
1066 return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
1069 #if defined(CONFIG_NR_DRAM_BANKS)
1071 static int get_next_memory_node(const void *blob, int mem)
1074 mem = fdt_node_offset_by_prop_value(blob, mem,
1075 "device_type", "memory", 7);
1076 } while (!fdtdec_get_is_enabled(blob, mem));
1081 int fdtdec_setup_memory_banksize_fdt(const void *blob)
1083 int bank, ret, mem, reg = 0;
1084 struct fdt_resource res;
1086 mem = get_next_memory_node(blob, -1);
1088 debug("%s: Missing /memory node\n", __func__);
1092 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1093 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1094 if (ret == -FDT_ERR_NOTFOUND) {
1096 mem = get_next_memory_node(blob, mem);
1097 if (mem == -FDT_ERR_NOTFOUND)
1100 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1101 if (ret == -FDT_ERR_NOTFOUND)
1108 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1109 gd->bd->bi_dram[bank].size =
1110 (phys_size_t)(res.end - res.start + 1);
1112 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1114 (unsigned long long)gd->bd->bi_dram[bank].start,
1115 (unsigned long long)gd->bd->bi_dram[bank].size);
1121 int fdtdec_setup_memory_banksize(void)
1123 return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
1128 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1129 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1130 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1131 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1133 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1134 bool gzip = 0, lzo = 0;
1135 ulong sz_in = sz_src;
1139 if (CONFIG_IS_ENABLED(GZIP))
1140 if (gzip_parse_header(src, sz_in) >= 0)
1142 if (CONFIG_IS_ENABLED(LZO))
1143 if (!gzip && lzop_is_valid_header(src))
1150 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1151 dst = malloc(sz_out);
1153 puts("uncompress_blob: Unable to allocate memory\n");
1157 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1158 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1164 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1165 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1166 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1167 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1172 /* not a valid compressed blob */
1173 puts("uncompress_blob: Unable to uncompress\n");
1174 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1182 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1184 *dstp = (void *)src;
1190 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1192 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1193 * provide and/or fixup the fdt.
1195 __weak void *board_fdt_blob_setup(void)
1197 void *fdt_blob = NULL;
1198 #ifdef CONFIG_SPL_BUILD
1199 /* FDT is at end of BSS unless it is in a different memory region */
1200 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1201 fdt_blob = (ulong *)&_image_binary_end;
1203 fdt_blob = (ulong *)&__bss_end;
1205 /* FDT is at end of image */
1206 fdt_blob = (ulong *)&_end;
1212 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1217 if (!is_valid_ethaddr(mac))
1220 path = fdt_get_alias(fdt, "ethernet");
1224 debug("ethernet alias found: %s\n", path);
1226 offset = fdt_path_offset(fdt, path);
1228 debug("ethernet alias points to absent node %s\n", path);
1232 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1236 debug("MAC address: %pM\n", mac);
1241 static int fdtdec_init_reserved_memory(void *blob)
1243 int na, ns, node, err;
1246 /* inherit #address-cells and #size-cells from the root node */
1247 na = fdt_address_cells(blob, 0);
1248 ns = fdt_size_cells(blob, 0);
1250 node = fdt_add_subnode(blob, 0, "reserved-memory");
1254 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1258 value = cpu_to_fdt32(ns);
1260 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1264 value = cpu_to_fdt32(na);
1266 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1273 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1274 const struct fdt_memory *carveout,
1277 fdt32_t cells[4] = {}, *ptr = cells;
1278 uint32_t upper, lower, phandle;
1279 int parent, node, na, ns, err;
1283 /* create an empty /reserved-memory node if one doesn't exist */
1284 parent = fdt_path_offset(blob, "/reserved-memory");
1286 parent = fdtdec_init_reserved_memory(blob);
1291 /* only 1 or 2 #address-cells and #size-cells are supported */
1292 na = fdt_address_cells(blob, parent);
1293 if (na < 1 || na > 2)
1294 return -FDT_ERR_BADNCELLS;
1296 ns = fdt_size_cells(blob, parent);
1297 if (ns < 1 || ns > 2)
1298 return -FDT_ERR_BADNCELLS;
1300 /* find a matching node and return the phandle to that */
1301 fdt_for_each_subnode(node, blob, parent) {
1302 const char *name = fdt_get_name(blob, node, NULL);
1303 phys_addr_t addr, size;
1305 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
1306 if (addr == FDT_ADDR_T_NONE) {
1307 debug("failed to read address/size for %s\n", name);
1311 if (addr == carveout->start && (addr + size) == carveout->end) {
1313 *phandlep = fdt_get_phandle(blob, node);
1319 * Unpack the start address and generate the name of the new node
1320 * base on the basename and the unit-address.
1322 upper = upper_32_bits(carveout->start);
1323 lower = lower_32_bits(carveout->start);
1325 if (na > 1 && upper > 0)
1326 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1330 debug("address %08x:%08x exceeds addressable space\n",
1332 return -FDT_ERR_BADVALUE;
1335 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1338 node = fdt_add_subnode(blob, parent, name);
1343 err = fdt_generate_phandle(blob, &phandle);
1347 err = fdtdec_set_phandle(blob, node, phandle);
1352 /* store one or two address cells */
1354 *ptr++ = cpu_to_fdt32(upper);
1356 *ptr++ = cpu_to_fdt32(lower);
1358 /* store one or two size cells */
1359 size = carveout->end - carveout->start + 1;
1360 upper = upper_32_bits(size);
1361 lower = lower_32_bits(size);
1364 *ptr++ = cpu_to_fdt32(upper);
1366 *ptr++ = cpu_to_fdt32(lower);
1368 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1372 /* return the phandle for the new node for the caller to use */
1374 *phandlep = phandle;
1379 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1380 unsigned int index, struct fdt_memory *carveout)
1382 const fdt32_t *prop;
1387 offset = fdt_path_offset(blob, node);
1391 prop = fdt_getprop(blob, offset, name, &len);
1393 debug("failed to get %s for %s\n", name, node);
1394 return -FDT_ERR_NOTFOUND;
1397 if ((len % sizeof(phandle)) != 0) {
1398 debug("invalid phandle property\n");
1399 return -FDT_ERR_BADPHANDLE;
1402 if (len < (sizeof(phandle) * (index + 1))) {
1403 debug("invalid phandle index\n");
1404 return -FDT_ERR_BADPHANDLE;
1407 phandle = fdt32_to_cpu(prop[index]);
1409 offset = fdt_node_offset_by_phandle(blob, phandle);
1411 debug("failed to find node for phandle %u\n", phandle);
1415 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1418 if (carveout->start == FDT_ADDR_T_NONE) {
1419 debug("failed to read address/size from \"reg\" property\n");
1420 return -FDT_ERR_NOTFOUND;
1423 carveout->end = carveout->start + size - 1;
1428 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1429 unsigned int index, const char *name,
1430 const struct fdt_memory *carveout)
1436 /* XXX implement support for multiple phandles */
1438 debug("invalid index %u\n", index);
1439 return -FDT_ERR_BADOFFSET;
1442 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
1444 debug("failed to add reserved memory: %d\n", err);
1448 offset = fdt_path_offset(blob, node);
1450 debug("failed to find offset for node %s: %d\n", node, offset);
1454 value = cpu_to_fdt32(phandle);
1456 err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value));
1458 debug("failed to set %s property for node %s: %d\n", prop_name,
1466 int fdtdec_setup(void)
1468 #if CONFIG_IS_ENABLED(OF_CONTROL)
1469 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1472 # ifdef CONFIG_OF_EMBED
1473 /* Get a pointer to the FDT */
1474 # ifdef CONFIG_SPL_BUILD
1475 gd->fdt_blob = __dtb_dt_spl_begin;
1477 gd->fdt_blob = __dtb_dt_begin;
1479 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1480 /* Allow the board to override the fdt address. */
1481 gd->fdt_blob = board_fdt_blob_setup();
1482 # elif defined(CONFIG_OF_HOSTFILE)
1483 if (sandbox_read_fdt_from_file()) {
1484 puts("Failed to read control FDT\n");
1487 # elif defined(CONFIG_OF_PRIOR_STAGE)
1488 gd->fdt_blob = (void *)prior_stage_fdt_address;
1490 # ifndef CONFIG_SPL_BUILD
1491 /* Allow the early environment to override the fdt address */
1492 gd->fdt_blob = map_sysmem
1493 (env_get_ulong("fdtcontroladdr", 16,
1494 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1497 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1499 * Try and uncompress the blob.
1500 * Unfortunately there is no way to know how big the input blob really
1501 * is. So let us set the maximum input size arbitrarily high. 16MB
1502 * ought to be more than enough for packed DTBs.
1504 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1505 gd->fdt_blob = fdt_blob;
1508 * Check if blob is a FIT images containings DTBs.
1509 * If so, pick the most relevant
1511 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1513 gd->multi_dtb_fit = gd->fdt_blob;
1514 gd->fdt_blob = fdt_blob;
1520 return fdtdec_prepare_fdt();
1523 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1524 int fdtdec_resetup(int *rescan)
1529 * If the current DTB is part of a compressed FIT image,
1530 * try to locate the best match from the uncompressed
1531 * FIT image stillpresent there. Save the time and space
1532 * required to uncompress it again.
1534 if (gd->multi_dtb_fit) {
1535 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1537 if (fdt_blob == gd->fdt_blob) {
1539 * The best match did not change. no need to tear down
1540 * the DM and rescan the fdt.
1547 gd->fdt_blob = fdt_blob;
1548 return fdtdec_prepare_fdt();
1552 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1553 * not a FIT image containings DTB, but a single DTB. There is no need
1554 * to teard down DM and rescan the DT in this case.
1561 #ifdef CONFIG_NR_DRAM_BANKS
1562 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1563 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1565 int addr_cells, size_cells;
1566 const u32 *cell, *end;
1567 u64 total_size, size, addr;
1573 debug("%s: board_id=%d\n", __func__, board_id);
1576 node = fdt_path_offset(blob, area);
1578 debug("No %s node found\n", area);
1582 cell = fdt_getprop(blob, node, "reg", &len);
1584 debug("No reg property found\n");
1588 addr_cells = fdt_address_cells(blob, node);
1589 size_cells = fdt_size_cells(blob, node);
1591 /* Check the board id and mask */
1592 for (child = fdt_first_subnode(blob, node);
1594 child = fdt_next_subnode(blob, child)) {
1595 int match_mask, match_value;
1597 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1598 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1600 if (match_value >= 0 &&
1601 ((board_id & match_mask) == match_value)) {
1602 /* Found matching mask */
1603 debug("Found matching mask %d\n", match_mask);
1605 cell = fdt_getprop(blob, node, "reg", &len);
1607 debug("No memory-banks property found\n");
1613 /* Note: if no matching subnode was found we use the parent node */
1616 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1617 CONFIG_NR_DRAM_BANKS);
1620 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1623 end = cell + len / 4 - addr_cells - size_cells;
1624 debug("cell at %p, end %p\n", cell, end);
1625 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1629 if (addr_cells == 2)
1630 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1631 addr += fdt32_to_cpu(*cell++);
1633 bd->bi_dram[bank].start = addr;
1635 *basep = (phys_addr_t)addr;
1638 if (size_cells == 2)
1639 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1640 size += fdt32_to_cpu(*cell++);
1645 debug("Auto-sizing %llx, size %llx: ", addr, size);
1646 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1647 if (new_size == size) {
1650 debug("sized to %llx\n", new_size);
1656 bd->bi_dram[bank].size = size;
1660 debug("Memory size %llu\n", total_size);
1662 *sizep = (phys_size_t)total_size;
1666 #endif /* CONFIG_NR_DRAM_BANKS */
1668 #endif /* !USE_HOSTCC */