include/configs/M5208EVBE.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the Freescale MCF5208EVBe.
   4  *
   5  * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
   6  * TsiChung Liew ([email protected])
   7  */
   8
   9 #ifndef _M5208EVBE_H
  10 #define _M5208EVBE_H
  11
  12 /*
  13  * High Level Configuration Options
  14  * (easy to change)
  15  */
  16 #define CONFIG_SYS_UART_PORT            (0)
  17
  18 #define CONFIG_WATCHDOG_TIMEOUT         5000
  19
  20 #ifdef CONFIG_MCFFEC
  21 #       define CONFIG_SYS_DISCOVER_PHY
  22 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  23 #       ifndef CONFIG_SYS_DISCOVER_PHY
  24 #               define FECDUPLEX        FULL
  25 #               define FECSPEED         _100BASET
  26 #       endif                   /* CONFIG_SYS_DISCOVER_PHY */
  27 #endif
  28
  29 /* Timer */
  30 #define CONFIG_MCFTMR
  31
  32 /* I2C */
  33
  34 #ifdef CONFIG_MCFFEC
  35 #       define CONFIG_IPADDR    192.162.1.2
  36 #       define CONFIG_NETMASK   255.255.255.0
  37 #       define CONFIG_SERVERIP  192.162.1.1
  38 #       define CONFIG_GATEWAYIP 192.162.1.1
  39 #endif                          /* CONFIG_MCFFEC */
  40
  41 #define CONFIG_HOSTNAME         "M5208EVBe"
  42 #define CONFIG_EXTRA_ENV_SETTINGS               \
  43         "netdev=eth0\0"                         \
  44         "loadaddr=40010000\0"                   \
  45         "u-boot=u-boot.bin\0"                   \
  46         "load=tftp ${loadaddr) ${u-boot}\0"     \
  47         "upd=run load; run prog\0"              \
  48         "prog=prot off 0 3ffff;"                \
  49         "era 0 3ffff;"                          \
  50         "cp.b ${loadaddr} 0 ${filesize};"       \
  51         "save\0"                                \
  52         ""
  53
  54 #define CONFIG_PRAM             512     /* 512 KB */
  55
  56 #define CONFIG_SYS_CLK          166666666       /* CPU Core Clock */
  57 #define CONFIG_SYS_PLL_ODR      0x36
  58 #define CONFIG_SYS_PLL_FDR      0x7D
  59
  60 #define CONFIG_SYS_MBAR         0xFC000000
  61
  62 /*
  63  * Low Level Configuration Settings
  64  * (address mappings, register initial values, etc.)
  65  * You should know what you are doing if you make changes here.
  66  */
  67 /* Definitions for initial stack pointer and data area (in DPRAM) */
  68 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
  69 #define CONFIG_SYS_INIT_RAM_SIZE                0x4000  /* Size of used area in internal SRAM */
  70 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
  71 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
  72 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  73
  74 /*
  75  * Start addresses for the final memory configuration
  76  * (Set up by the startup code)
  77  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  78  */
  79 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  80 #define CONFIG_SYS_SDRAM_SIZE           32      /* SDRAM size in MB */
  81 #define CONFIG_SYS_SDRAM_CFG1           0x43711630
  82 #define CONFIG_SYS_SDRAM_CFG2           0x56670000
  83 #define CONFIG_SYS_SDRAM_CTRL           0xE1002000
  84 #define CONFIG_SYS_SDRAM_EMOD           0x80010000
  85 #define CONFIG_SYS_SDRAM_MODE           0x00CD0000
  86
  87 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
  88 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor */
  89
  90 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
  91
  92 /*
  93  * For booting Linux, the board info and command line data
  94  * have to be in the first 8 MB of memory, since this is
  95  * the maximum mapped by the Linux kernel during initialization ??
  96  */
  97 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
  98 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
  99
 100 /* FLASH organization */
 101 #ifdef CONFIG_SYS_FLASH_CFI
 102 #       define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
 103 #       define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
 104 #       define CONFIG_SYS_MAX_FLASH_SECT        254     /* max number of sectors on one chip */
 105 #endif
 106
 107 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
 108
 109 /*
 110  * Configuration for environment
 111  * Environment is embedded in u-boot in the second sector of the flash
 112  */
 113
 114 #define LDS_BOARD_TEXT \
 115         . = DEFINED(env_offset) ? env_offset : .; \
 116         env/embedded.o(.text*);
 117
 118 /* Cache Configuration */
 119
 120 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 121                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 122 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 123                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 124 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 125 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 126                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 127                                          CF_ACR_EN | CF_ACR_SM_ALL)
 128 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 129                                          CF_CACR_DISD | CF_CACR_INVI | \
 130                                          CF_CACR_CEIB | CF_CACR_DCM | \
 131                                          CF_CACR_EUSP)
 132
 133 /* Chipselect bank definitions */
 134 /*
 135  * CS0 - NOR Flash
 136  * CS1 - Available
 137  * CS2 - Available
 138  * CS3 - Available
 139  * CS4 - Available
 140  * CS5 - Available
 141  */
 142 #define CONFIG_SYS_CS0_BASE             0
 143 #define CONFIG_SYS_CS0_MASK             0x007F0001
 144 #define CONFIG_SYS_CS0_CTRL             0x00001FA0
 145
 146 #endif                          /* _M5208EVBE_H */