drivers/usb/gadget/fotg210.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Faraday USB 2.0 OTG Controller
   4  *
   5  * (C) Copyright 2010 Faraday Technology
   6  * Dante Su <[email protected]>
   7  */
   8
   9 #include <common.h>
  10 #include <command.h>
  11 #include <config.h>
  12 #include <cpu_func.h>
  13 #include <log.h>
  14 #include <net.h>
  15 #include <malloc.h>
  16 #include <asm/io.h>
  17 #include <linux/delay.h>
  18 #include <linux/errno.h>
  19 #include <linux/types.h>
  20 #include <linux/usb/ch9.h>
  21 #include <linux/usb/gadget.h>
  22
  23 #include <usb/fotg210.h>
  24
  25 #define CFG_NUM_ENDPOINTS               4
  26 #define CFG_EP0_MAX_PACKET_SIZE 64
  27 #define CFG_EPX_MAX_PACKET_SIZE 512
  28
  29 #define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 2) /* 250 ms */
  30
  31 struct fotg210_chip;
  32
  33 struct fotg210_ep {
  34         struct usb_ep ep;
  35
  36         uint maxpacket;
  37         uint id;
  38         uint stopped;
  39
  40         struct list_head                      queue;
  41         struct fotg210_chip                  *chip;
  42         const struct usb_endpoint_descriptor *desc;
  43 };
  44
  45 struct fotg210_request {
  46         struct usb_request req;
  47         struct list_head   queue;
  48         struct fotg210_ep *ep;
  49 };
  50
  51 struct fotg210_chip {
  52         struct usb_gadget         gadget;
  53         struct usb_gadget_driver *driver;
  54         struct fotg210_regs      *regs;
  55         uint8_t                   irq;
  56         uint16_t                  addr;
  57         int                       pullup;
  58         enum usb_device_state     state;
  59         struct fotg210_ep         ep[1 + CFG_NUM_ENDPOINTS];
  60 };
  61
  62 static struct usb_endpoint_descriptor ep0_desc = {
  63         .bLength = sizeof(struct usb_endpoint_descriptor),
  64         .bDescriptorType = USB_DT_ENDPOINT,
  65         .bEndpointAddress = USB_DIR_IN,
  66         .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  67 };
  68
  69 static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in)
  70 {
  71         return (id < 0) ? 0 : ((id & 0x03) + 1);
  72 }
  73
  74 static inline int ep_to_fifo(struct fotg210_chip *chip, int id)
  75 {
  76         return (id <= 0) ? -1 : ((id - 1) & 0x03);
  77 }
  78
  79 static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr)
  80 {
  81         int ep = ep_addr & USB_ENDPOINT_NUMBER_MASK;
  82         struct fotg210_regs *regs = chip->regs;
  83
  84         if (ep_addr & USB_DIR_IN) {
  85                 /* reset endpoint */
  86                 setbits_le32(&regs->iep[ep - 1], IEP_RESET);
  87                 mdelay(1);
  88                 clrbits_le32(&regs->iep[ep - 1], IEP_RESET);
  89                 /* clear endpoint stall */
  90                 clrbits_le32(&regs->iep[ep - 1], IEP_STALL);
  91         } else {
  92                 /* reset endpoint */
  93                 setbits_le32(&regs->oep[ep - 1], OEP_RESET);
  94                 mdelay(1);
  95                 clrbits_le32(&regs->oep[ep - 1], OEP_RESET);
  96                 /* clear endpoint stall */
  97                 clrbits_le32(&regs->oep[ep - 1], OEP_STALL);
  98         }
  99
 100         return 0;
 101 }
 102
 103 static int fotg210_reset(struct fotg210_chip *chip)
 104 {
 105         struct fotg210_regs *regs = chip->regs;
 106         uint32_t i;
 107
 108         chip->state = USB_STATE_POWERED;
 109
 110         /* chip enable */
 111         writel(DEVCTRL_EN, &regs->dev_ctrl);
 112
 113         /* device address reset */
 114         chip->addr = 0;
 115         writel(0, &regs->dev_addr);
 116
 117         /* set idle counter to 7ms */
 118         writel(7, &regs->idle);
 119
 120         /* disable all interrupts */
 121         writel(IMR_MASK, &regs->imr);
 122         writel(GIMR_MASK, &regs->gimr);
 123         writel(GIMR0_MASK, &regs->gimr0);
 124         writel(GIMR1_MASK, &regs->gimr1);
 125         writel(GIMR2_MASK, &regs->gimr2);
 126
 127         /* clear interrupts */
 128         writel(ISR_MASK, &regs->isr);
 129         writel(0, &regs->gisr);
 130         writel(0, &regs->gisr0);
 131         writel(0, &regs->gisr1);
 132         writel(0, &regs->gisr2);
 133
 134         /* chip reset */
 135         setbits_le32(&regs->dev_ctrl, DEVCTRL_RESET);
 136         mdelay(10);
 137         if (readl(&regs->dev_ctrl) & DEVCTRL_RESET) {
 138                 printf("fotg210: chip reset failed\n");
 139                 return -1;
 140         }
 141
 142         /* CX FIFO reset */
 143         setbits_le32(&regs->cxfifo, CXFIFO_CXFIFOCLR);
 144         mdelay(10);
 145         if (readl(&regs->cxfifo) & CXFIFO_CXFIFOCLR) {
 146                 printf("fotg210: ep0 fifo reset failed\n");
 147                 return -1;
 148         }
 149
 150         /* create static ep-fifo map (EP1 <-> FIFO0, EP2 <-> FIFO1 ...) */
 151         writel(EPMAP14_DEFAULT, &regs->epmap14);
 152         writel(EPMAP58_DEFAULT, &regs->epmap58);
 153         writel(FIFOMAP_DEFAULT, &regs->fifomap);
 154         writel(0, &regs->fifocfg);
 155         for (i = 0; i < 8; ++i) {
 156                 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->iep[i]);
 157                 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->oep[i]);
 158         }
 159
 160         /* FIFO reset */
 161         for (i = 0; i < 4; ++i) {
 162                 writel(FIFOCSR_RESET, &regs->fifocsr[i]);
 163                 mdelay(10);
 164                 if (readl(&regs->fifocsr[i]) & FIFOCSR_RESET) {
 165                         printf("fotg210: fifo%d reset failed\n", i);
 166                         return -1;
 167                 }
 168         }
 169
 170         /* enable only device interrupt and triggered at level-high */
 171         writel(IMR_IRQLH | IMR_HOST | IMR_OTG, &regs->imr);
 172         writel(ISR_MASK, &regs->isr);
 173         /* disable EP0 IN/OUT interrupt */
 174         writel(GIMR0_CXOUT | GIMR0_CXIN, &regs->gimr0);
 175         /* disable EPX IN+SPK+OUT interrupts */
 176         writel(GIMR1_MASK, &regs->gimr1);
 177         /* disable wakeup+idle+dma+zlp interrupts */
 178         writel(GIMR2_WAKEUP | GIMR2_IDLE | GIMR2_DMAERR | GIMR2_DMAFIN
 179                 | GIMR2_ZLPRX | GIMR2_ZLPTX, &regs->gimr2);
 180         /* enable all group interrupt */
 181         writel(0, &regs->gimr);
 182
 183         /* suspend delay = 3 ms */
 184         writel(3, &regs->idle);
 185
 186         /* turn-on device interrupts */
 187         setbits_le32(&regs->dev_ctrl, DEVCTRL_GIRQ_EN);
 188
 189         return 0;
 190 }
 191
 192 static inline int fotg210_cxwait(struct fotg210_chip *chip, uint32_t mask)
 193 {
 194         struct fotg210_regs *regs = chip->regs;
 195         int ret = -1;
 196         ulong ts;
 197
 198         for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
 199                 if ((readl(&regs->cxfifo) & mask) != mask)
 200                         continue;
 201                 ret = 0;
 202                 break;
 203         }
 204
 205         if (ret)
 206                 printf("fotg210: cx/ep0 timeout\n");
 207
 208         return ret;
 209 }
 210
 211 static int fotg210_dma(struct fotg210_ep *ep, struct fotg210_request *req)
 212 {
 213         struct fotg210_chip *chip = ep->chip;
 214         struct fotg210_regs *regs = chip->regs;
 215         uint32_t tmp, ts;
 216         uint8_t *buf  = req->req.buf + req->req.actual;
 217         uint32_t len  = req->req.length - req->req.actual;
 218         int fifo = ep_to_fifo(chip, ep->id);
 219         int ret = -EBUSY;
 220
 221         /* 1. init dma buffer */
 222         if (len > ep->maxpacket)
 223                 len = ep->maxpacket;
 224
 225         /* 2. wait for dma ready (hardware) */
 226         for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
 227                 if (!(readl(&regs->dma_ctrl) & DMACTRL_START)) {
 228                         ret = 0;
 229                         break;
 230                 }
 231         }
 232         if (ret) {
 233                 printf("fotg210: dma busy\n");
 234                 req->req.status = ret;
 235                 return ret;
 236         }
 237
 238         /* 3. DMA target setup */
 239         if (ep->desc->bEndpointAddress & USB_DIR_IN)
 240                 flush_dcache_range((ulong)buf, (ulong)buf + len);
 241         else
 242                 invalidate_dcache_range((ulong)buf, (ulong)buf + len);
 243
 244         writel(virt_to_phys(buf), &regs->dma_addr);
 245
 246         if (ep->desc->bEndpointAddress & USB_DIR_IN) {
 247                 if (ep->id == 0) {
 248                         /* Wait until cx/ep0 fifo empty */
 249                         fotg210_cxwait(chip, CXFIFO_CXFIFOE);
 250                         udelay(1);
 251                         writel(DMAFIFO_CX, &regs->dma_fifo);
 252                 } else {
 253                         /* Wait until epx fifo empty */
 254                         fotg210_cxwait(chip, CXFIFO_FIFOE(fifo));
 255                         writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo);
 256                 }
 257                 writel(DMACTRL_LEN(len) | DMACTRL_MEM2FIFO, &regs->dma_ctrl);
 258         } else {
 259                 uint32_t blen;
 260
 261                 if (ep->id == 0) {
 262                         writel(DMAFIFO_CX, &regs->dma_fifo);
 263                         do {
 264                                 blen = CXFIFO_BYTES(readl(&regs->cxfifo));
 265                         } while (blen < len);
 266                 } else {
 267                         writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo);
 268                         blen = FIFOCSR_BYTES(readl(&regs->fifocsr[fifo]));
 269                 }
 270                 len  = (len < blen) ? len : blen;
 271                 writel(DMACTRL_LEN(len) | DMACTRL_FIFO2MEM, &regs->dma_ctrl);
 272         }
 273
 274         /* 4. DMA start */
 275         setbits_le32(&regs->dma_ctrl, DMACTRL_START);
 276
 277         /* 5. DMA wait */
 278         ret = -EBUSY;
 279         for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
 280                 tmp = readl(&regs->gisr2);
 281                 /* DMA complete */
 282                 if (tmp & GISR2_DMAFIN) {
 283                         ret = 0;
 284                         break;
 285                 }
 286                 /* DMA error */
 287                 if (tmp & GISR2_DMAERR) {
 288                         printf("fotg210: dma error\n");
 289                         break;
 290                 }
 291                 /* resume, suspend, reset */
 292                 if (tmp & (GISR2_RESUME | GISR2_SUSPEND | GISR2_RESET)) {
 293                         printf("fotg210: dma reset by host\n");
 294                         break;
 295                 }
 296         }
 297
 298         /* 7. DMA target reset */
 299         if (ret)
 300                 writel(DMACTRL_ABORT | DMACTRL_CLRFF, &regs->dma_ctrl);
 301
 302         writel(0, &regs->gisr2);
 303         writel(0, &regs->dma_fifo);
 304
 305         req->req.status = ret;
 306         if (!ret)
 307                 req->req.actual += len;
 308         else
 309                 printf("fotg210: ep%d dma error(code=%d)\n", ep->id, ret);
 310
 311         return len;
 312 }
 313
 314 /*
 315  * result of setup packet
 316  */
 317 #define CX_IDLE         0
 318 #define CX_FINISH       1
 319 #define CX_STALL        2
 320
 321 static void fotg210_setup(struct fotg210_chip *chip)
 322 {
 323         int id, ret = CX_IDLE;
 324         uint32_t tmp[2];
 325         struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)tmp;
 326         struct fotg210_regs *regs = chip->regs;
 327
 328         /*
 329          * If this is the first Cx 8 byte command,
 330          * we can now query USB mode (high/full speed; USB 2.0/USB 1.0)
 331          */
 332         if (chip->state == USB_STATE_POWERED) {
 333                 chip->state = USB_STATE_DEFAULT;
 334                 if (readl(&regs->otgcsr) & OTGCSR_DEV_B) {
 335                         /* Mini-B */
 336                         if (readl(&regs->dev_ctrl) & DEVCTRL_HS) {
 337                                 puts("fotg210: HS\n");
 338                                 chip->gadget.speed = USB_SPEED_HIGH;
 339                                 /* SOF mask timer = 1100 ticks */
 340                                 writel(SOFMTR_TMR(1100), &regs->sof_mtr);
 341                         } else {
 342                                 puts("fotg210: FS\n");
 343                                 chip->gadget.speed = USB_SPEED_FULL;
 344                                 /* SOF mask timer = 10000 ticks */
 345                                 writel(SOFMTR_TMR(10000), &regs->sof_mtr);
 346                         }
 347                 } else {
 348                         printf("fotg210: mini-A?\n");
 349                 }
 350         }
 351
 352         /* switch data port to ep0 */
 353         writel(DMAFIFO_CX, &regs->dma_fifo);
 354         /* fetch 8 bytes setup packet */
 355         tmp[0] = readl(&regs->ep0_data);
 356         tmp[1] = readl(&regs->ep0_data);
 357         /* release data port */
 358         writel(0, &regs->dma_fifo);
 359
 360         if (req->bRequestType & USB_DIR_IN)
 361                 ep0_desc.bEndpointAddress = USB_DIR_IN;
 362         else
 363                 ep0_desc.bEndpointAddress = USB_DIR_OUT;
 364
 365         ret = CX_IDLE;
 366
 367         if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
 368                 switch (req->bRequest) {
 369                 case USB_REQ_SET_CONFIGURATION:
 370                         debug("fotg210: set_cfg(%d)\n", req->wValue & 0x00FF);
 371                         if (!(req->wValue & 0x00FF)) {
 372                                 chip->state = USB_STATE_ADDRESS;
 373                                 writel(chip->addr, &regs->dev_addr);
 374                         } else {
 375                                 chip->state = USB_STATE_CONFIGURED;
 376                                 writel(chip->addr | DEVADDR_CONF,
 377                                         &regs->dev_addr);
 378                         }
 379                         ret = CX_IDLE;
 380                         break;
 381
 382                 case USB_REQ_SET_ADDRESS:
 383                         debug("fotg210: set_addr(0x%04X)\n", req->wValue);
 384                         chip->state = USB_STATE_ADDRESS;
 385                         chip->addr  = req->wValue & DEVADDR_ADDR_MASK;
 386                         ret = CX_FINISH;
 387                         writel(chip->addr, &regs->dev_addr);
 388                         break;
 389
 390                 case USB_REQ_CLEAR_FEATURE:
 391                         debug("fotg210: clr_feature(%d, %d)\n",
 392                                 req->bRequestType & 0x03, req->wValue);
 393                         switch (req->wValue) {
 394                         case 0:    /* [Endpoint] halt */
 395                                 ep_reset(chip, req->wIndex);
 396                                 ret = CX_FINISH;
 397                                 break;
 398                         case 1:    /* [Device] remote wake-up */
 399                         case 2:    /* [Device] test mode */
 400                         default:
 401                                 ret = CX_STALL;
 402                                 break;
 403                         }
 404                         break;
 405
 406                 case USB_REQ_SET_FEATURE:
 407                         debug("fotg210: set_feature(%d, %d)\n",
 408                                 req->wValue, req->wIndex & 0xf);
 409                         switch (req->wValue) {
 410                         case 0:    /* Endpoint Halt */
 411                                 id = req->wIndex & 0xf;
 412                                 setbits_le32(&regs->iep[id - 1], IEP_STALL);
 413                                 setbits_le32(&regs->oep[id - 1], OEP_STALL);
 414                                 ret = CX_FINISH;
 415                                 break;
 416                         case 1:    /* Remote Wakeup */
 417                         case 2:    /* Test Mode */
 418                         default:
 419                                 ret = CX_STALL;
 420                                 break;
 421                         }
 422                         break;
 423
 424                 case USB_REQ_GET_STATUS:
 425                         debug("fotg210: get_status\n");
 426                         ret = CX_STALL;
 427                         break;
 428
 429                 case USB_REQ_SET_DESCRIPTOR:
 430                         debug("fotg210: set_descriptor\n");
 431                         ret = CX_STALL;
 432                         break;
 433
 434                 case USB_REQ_SYNCH_FRAME:
 435                         debug("fotg210: sync frame\n");
 436                         ret = CX_STALL;
 437                         break;
 438                 }
 439         } /* if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) */
 440
 441         if (ret == CX_IDLE && chip->driver->setup) {
 442                 if (chip->driver->setup(&chip->gadget, req) < 0)
 443                         ret = CX_STALL;
 444                 else
 445                         ret = CX_FINISH;
 446         }
 447
 448         switch (ret) {
 449         case CX_FINISH:
 450                 setbits_le32(&regs->cxfifo, CXFIFO_CXFIN);
 451                 break;
 452
 453         case CX_STALL:
 454                 setbits_le32(&regs->cxfifo, CXFIFO_CXSTALL | CXFIFO_CXFIN);
 455                 printf("fotg210: cx_stall!\n");
 456                 break;
 457
 458         case CX_IDLE:
 459                 debug("fotg210: cx_idle?\n");
 460         default:
 461                 break;
 462         }
 463 }
 464
 465 /*
 466  * fifo - FIFO id
 467  * zlp  - zero length packet
 468  */
 469 static void fotg210_recv(struct fotg210_chip *chip, int ep_id)
 470 {
 471         struct fotg210_regs *regs = chip->regs;
 472         struct fotg210_ep *ep = chip->ep + ep_id;
 473         struct fotg210_request *req;
 474         int len;
 475
 476         if (ep->stopped || (ep->desc->bEndpointAddress & USB_DIR_IN)) {
 477                 printf("fotg210: ep%d recv, invalid!\n", ep->id);
 478                 return;
 479         }
 480
 481         if (list_empty(&ep->queue)) {
 482                 printf("fotg210: ep%d recv, drop!\n", ep->id);
 483                 return;
 484         }
 485
 486         req = list_first_entry(&ep->queue, struct fotg210_request, queue);
 487         len = fotg210_dma(ep, req);
 488         if (len < ep->ep.maxpacket || req->req.length <= req->req.actual) {
 489                 list_del_init(&req->queue);
 490                 if (req->req.complete)
 491                         req->req.complete(&ep->ep, &req->req);
 492         }
 493
 494         if (ep->id > 0 && list_empty(&ep->queue)) {
 495                 setbits_le32(&regs->gimr1,
 496                         GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id)));
 497         }
 498 }
 499
 500 /*
 501  * USB Gadget Layer
 502  */
 503 static int fotg210_ep_enable(
 504         struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
 505 {
 506         struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
 507         struct fotg210_chip *chip = ep->chip;
 508         struct fotg210_regs *regs = chip->regs;
 509         int id = ep_to_fifo(chip, ep->id);
 510         int in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0;
 511
 512         if (!_ep || !desc
 513                 || desc->bDescriptorType != USB_DT_ENDPOINT
 514                 || le16_to_cpu(desc->wMaxPacketSize) == 0) {
 515                 printf("fotg210: bad ep or descriptor\n");
 516                 return -EINVAL;
 517         }
 518
 519         ep->desc = desc;
 520         ep->stopped = 0;
 521
 522         if (in)
 523                 setbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_IN));
 524
 525         switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
 526         case USB_ENDPOINT_XFER_CONTROL:
 527                 return -EINVAL;
 528
 529         case USB_ENDPOINT_XFER_ISOC:
 530                 setbits_le32(&regs->fifocfg,
 531                         FIFOCFG(id, FIFOCFG_EN | FIFOCFG_ISOC));
 532                 break;
 533
 534         case USB_ENDPOINT_XFER_BULK:
 535                 setbits_le32(&regs->fifocfg,
 536                         FIFOCFG(id, FIFOCFG_EN | FIFOCFG_BULK));
 537                 break;
 538
 539         case USB_ENDPOINT_XFER_INT:
 540                 setbits_le32(&regs->fifocfg,
 541                         FIFOCFG(id, FIFOCFG_EN | FIFOCFG_INTR));
 542                 break;
 543         }
 544
 545         return 0;
 546 }
 547
 548 static int fotg210_ep_disable(struct usb_ep *_ep)
 549 {
 550         struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
 551         struct fotg210_chip *chip = ep->chip;
 552         struct fotg210_regs *regs = chip->regs;
 553         int id = ep_to_fifo(chip, ep->id);
 554
 555         ep->desc = NULL;
 556         ep->stopped = 1;
 557
 558         clrbits_le32(&regs->fifocfg, FIFOCFG(id, FIFOCFG_CFG_MASK));
 559         clrbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_DIR_MASK));
 560
 561         return 0;
 562 }
 563
 564 static struct usb_request *fotg210_ep_alloc_request(
 565         struct usb_ep *_ep, gfp_t gfp_flags)
 566 {
 567         struct fotg210_request *req = malloc(sizeof(*req));
 568
 569         if (req) {
 570                 memset(req, 0, sizeof(*req));
 571                 INIT_LIST_HEAD(&req->queue);
 572         }
 573         return &req->req;
 574 }
 575
 576 static void fotg210_ep_free_request(
 577         struct usb_ep *_ep, struct usb_request *_req)
 578 {
 579         struct fotg210_request *req;
 580
 581         req = container_of(_req, struct fotg210_request, req);
 582         free(req);
 583 }
 584
 585 static int fotg210_ep_queue(
 586         struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 587 {
 588         struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
 589         struct fotg210_chip *chip = ep->chip;
 590         struct fotg210_regs *regs = chip->regs;
 591         struct fotg210_request *req;
 592
 593         req = container_of(_req, struct fotg210_request, req);
 594         if (!_req || !_req->complete || !_req->buf
 595                 || !list_empty(&req->queue)) {
 596                 printf("fotg210: invalid request to ep%d\n", ep->id);
 597                 return -EINVAL;
 598         }
 599
 600         if (!chip || chip->state == USB_STATE_SUSPENDED) {
 601                 printf("fotg210: request while chip suspended\n");
 602                 return -EINVAL;
 603         }
 604
 605         req->req.actual = 0;
 606         req->req.status = -EINPROGRESS;
 607
 608         if (req->req.length == 0) {
 609                 req->req.status = 0;
 610                 if (req->req.complete)
 611                         req->req.complete(&ep->ep, &req->req);
 612                 return 0;
 613         }
 614
 615         if (ep->id == 0) {
 616                 do {
 617                         int len = fotg210_dma(ep, req);
 618                         if (len < ep->ep.maxpacket)
 619                                 break;
 620                         if (ep->desc->bEndpointAddress & USB_DIR_IN)
 621                                 udelay(100);
 622                 } while (req->req.length > req->req.actual);
 623         } else {
 624                 if (ep->desc->bEndpointAddress & USB_DIR_IN) {
 625                         do {
 626                                 int len = fotg210_dma(ep, req);
 627                                 if (len < ep->ep.maxpacket)
 628                                         break;
 629                         } while (req->req.length > req->req.actual);
 630                 } else {
 631                         list_add_tail(&req->queue, &ep->queue);
 632                         clrbits_le32(&regs->gimr1,
 633                                 GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id)));
 634                 }
 635         }
 636
 637         if (ep->id == 0 || (ep->desc->bEndpointAddress & USB_DIR_IN)) {
 638                 if (req->req.complete)
 639                         req->req.complete(&ep->ep, &req->req);
 640         }
 641
 642         return 0;
 643 }
 644
 645 static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 646 {
 647         struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
 648         struct fotg210_request *req;
 649
 650         /* make sure it's actually queued on this endpoint */
 651         list_for_each_entry(req, &ep->queue, queue) {
 652                 if (&req->req == _req)
 653                         break;
 654         }
 655         if (&req->req != _req)
 656                 return -EINVAL;
 657
 658         /* remove the request */
 659         list_del_init(&req->queue);
 660
 661         /* update status & invoke complete callback */
 662         if (req->req.status == -EINPROGRESS) {
 663                 req->req.status = -ECONNRESET;
 664                 if (req->req.complete)
 665                         req->req.complete(_ep, &req->req);
 666         }
 667
 668         return 0;
 669 }
 670
 671 static int fotg210_ep_halt(struct usb_ep *_ep, int halt)
 672 {
 673         struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
 674         struct fotg210_chip *chip = ep->chip;
 675         struct fotg210_regs *regs = chip->regs;
 676         int ret = -1;
 677
 678         debug("fotg210: ep%d halt=%d\n", ep->id, halt);
 679
 680         /* Endpoint STALL */
 681         if (ep->id > 0 && ep->id <= CFG_NUM_ENDPOINTS) {
 682                 if (halt) {
 683                         /* wait until all ep fifo empty */
 684                         fotg210_cxwait(chip, 0xf00);
 685                         /* stall */
 686                         if (ep->desc->bEndpointAddress & USB_DIR_IN) {
 687                                 setbits_le32(&regs->iep[ep->id - 1],
 688                                         IEP_STALL);
 689                         } else {
 690                                 setbits_le32(&regs->oep[ep->id - 1],
 691                                         OEP_STALL);
 692                         }
 693                 } else {
 694                         if (ep->desc->bEndpointAddress & USB_DIR_IN) {
 695                                 clrbits_le32(&regs->iep[ep->id - 1],
 696                                         IEP_STALL);
 697                         } else {
 698                                 clrbits_le32(&regs->oep[ep->id - 1],
 699                                         OEP_STALL);
 700                         }
 701                 }
 702                 ret = 0;
 703         }
 704
 705         return ret;
 706 }
 707
 708 /*
 709  * activate/deactivate link with host.
 710  */
 711 static void pullup(struct fotg210_chip *chip, int is_on)
 712 {
 713         struct fotg210_regs *regs = chip->regs;
 714
 715         if (is_on) {
 716                 if (!chip->pullup) {
 717                         chip->state = USB_STATE_POWERED;
 718                         chip->pullup = 1;
 719                         /* enable the chip */
 720                         setbits_le32(&regs->dev_ctrl, DEVCTRL_EN);
 721                         /* clear unplug bit (BIT0) */
 722                         clrbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG);
 723                 }
 724         } else {
 725                 chip->state = USB_STATE_NOTATTACHED;
 726                 chip->pullup = 0;
 727                 chip->addr = 0;
 728                 writel(chip->addr, &regs->dev_addr);
 729                 /* set unplug bit (BIT0) */
 730                 setbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG);
 731                 /* disable the chip */
 732                 clrbits_le32(&regs->dev_ctrl, DEVCTRL_EN);
 733         }
 734 }
 735
 736 static int fotg210_pullup(struct usb_gadget *_gadget, int is_on)
 737 {
 738         struct fotg210_chip *chip;
 739
 740         chip = container_of(_gadget, struct fotg210_chip, gadget);
 741
 742         debug("fotg210: pullup=%d\n", is_on);
 743
 744         pullup(chip, is_on);
 745
 746         return 0;
 747 }
 748
 749 static int fotg210_get_frame(struct usb_gadget *_gadget)
 750 {
 751         struct fotg210_chip *chip;
 752         struct fotg210_regs *regs;
 753
 754         chip = container_of(_gadget, struct fotg210_chip, gadget);
 755         regs = chip->regs;
 756
 757         return SOFFNR_FNR(readl(&regs->sof_fnr));
 758 }
 759
 760 static struct usb_gadget_ops fotg210_gadget_ops = {
 761         .get_frame = fotg210_get_frame,
 762         .pullup = fotg210_pullup,
 763 };
 764
 765 static struct usb_ep_ops fotg210_ep_ops = {
 766         .enable         = fotg210_ep_enable,
 767         .disable        = fotg210_ep_disable,
 768         .queue          = fotg210_ep_queue,
 769         .dequeue        = fotg210_ep_dequeue,
 770         .set_halt       = fotg210_ep_halt,
 771         .alloc_request  = fotg210_ep_alloc_request,
 772         .free_request   = fotg210_ep_free_request,
 773 };
 774
 775 static struct fotg210_chip controller = {
 776         .regs = (void __iomem *)CONFIG_FOTG210_BASE,
 777         .gadget = {
 778                 .name = "fotg210_udc",
 779                 .ops = &fotg210_gadget_ops,
 780                 .ep0 = &controller.ep[0].ep,
 781                 .speed = USB_SPEED_UNKNOWN,
 782                 .is_dualspeed = 1,
 783                 .is_otg = 0,
 784                 .is_a_peripheral = 0,
 785                 .b_hnp_enable = 0,
 786                 .a_hnp_support = 0,
 787                 .a_alt_hnp_support = 0,
 788         },
 789         .ep[0] = {
 790                 .id = 0,
 791                 .ep = {
 792                         .name  = "ep0",
 793                         .ops   = &fotg210_ep_ops,
 794                 },
 795                 .desc      = &ep0_desc,
 796                 .chip      = &controller,
 797                 .maxpacket = CFG_EP0_MAX_PACKET_SIZE,
 798         },
 799         .ep[1] = {
 800                 .id = 1,
 801                 .ep = {
 802                         .name  = "ep1",
 803                         .ops   = &fotg210_ep_ops,
 804                 },
 805                 .chip      = &controller,
 806                 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
 807         },
 808         .ep[2] = {
 809                 .id = 2,
 810                 .ep = {
 811                         .name  = "ep2",
 812                         .ops   = &fotg210_ep_ops,
 813                 },
 814                 .chip      = &controller,
 815                 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
 816         },
 817         .ep[3] = {
 818                 .id = 3,
 819                 .ep = {
 820                         .name  = "ep3",
 821                         .ops   = &fotg210_ep_ops,
 822                 },
 823                 .chip      = &controller,
 824                 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
 825         },
 826         .ep[4] = {
 827                 .id = 4,
 828                 .ep = {
 829                         .name  = "ep4",
 830                         .ops   = &fotg210_ep_ops,
 831                 },
 832                 .chip      = &controller,
 833                 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
 834         },
 835 };
 836
 837 int usb_gadget_handle_interrupts(int index)
 838 {
 839         struct fotg210_chip *chip = &controller;
 840         struct fotg210_regs *regs = chip->regs;
 841         uint32_t id, st, isr, gisr;
 842
 843         isr  = readl(&regs->isr) & (~readl(&regs->imr));
 844         gisr = readl(&regs->gisr) & (~readl(&regs->gimr));
 845         if (!(isr & ISR_DEV) || !gisr)
 846                 return 0;
 847
 848         writel(ISR_DEV, &regs->isr);
 849
 850         /* CX interrupts */
 851         if (gisr & GISR_GRP0) {
 852                 st = readl(&regs->gisr0);
 853                 /*
 854                  * Write 1 and then 0 works for both W1C & RW.
 855                  *
 856                  * HW v1.11.0+: It's a W1C register (write 1 clear)
 857                  * HW v1.10.0-: It's a R/W register (write 0 clear)
 858                  */
 859                 writel(st & GISR0_CXABORT, &regs->gisr0);
 860                 writel(0, &regs->gisr0);
 861
 862                 if (st & GISR0_CXERR)
 863                         printf("fotg210: cmd error\n");
 864
 865                 if (st & GISR0_CXABORT)
 866                         printf("fotg210: cmd abort\n");
 867
 868                 if (st & GISR0_CXSETUP)    /* setup */
 869                         fotg210_setup(chip);
 870                 else if (st & GISR0_CXEND) /* command finish */
 871                         setbits_le32(&regs->cxfifo, CXFIFO_CXFIN);
 872         }
 873
 874         /* FIFO interrupts */
 875         if (gisr & GISR_GRP1) {
 876                 st = readl(&regs->gisr1);
 877                 for (id = 0; id < 4; ++id) {
 878                         if (st & GISR1_RX_FIFO(id))
 879                                 fotg210_recv(chip, fifo_to_ep(chip, id, 0));
 880                 }
 881         }
 882
 883         /* Device Status Interrupts */
 884         if (gisr & GISR_GRP2) {
 885                 st = readl(&regs->gisr2);
 886                 /*
 887                  * Write 1 and then 0 works for both W1C & RW.
 888                  *
 889                  * HW v1.11.0+: It's a W1C register (write 1 clear)
 890                  * HW v1.10.0-: It's a R/W register (write 0 clear)
 891                  */
 892                 writel(st, &regs->gisr2);
 893                 writel(0, &regs->gisr2);
 894
 895                 if (st & GISR2_RESET)
 896                         printf("fotg210: reset by host\n");
 897                 else if (st & GISR2_SUSPEND)
 898                         printf("fotg210: suspend/removed\n");
 899                 else if (st & GISR2_RESUME)
 900                         printf("fotg210: resume\n");
 901
 902                 /* Errors */
 903                 if (st & GISR2_ISOCERR)
 904                         printf("fotg210: iso error\n");
 905                 if (st & GISR2_ISOCABT)
 906                         printf("fotg210: iso abort\n");
 907                 if (st & GISR2_DMAERR)
 908                         printf("fotg210: dma error\n");
 909         }
 910
 911         return 0;
 912 }
 913
 914 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
 915 {
 916         int i, ret = 0;
 917         struct fotg210_chip *chip = &controller;
 918
 919         if (!driver    || !driver->bind || !driver->setup) {
 920                 puts("fotg210: bad parameter.\n");
 921                 return -EINVAL;
 922         }
 923
 924         INIT_LIST_HEAD(&chip->gadget.ep_list);
 925         for (i = 0; i < CFG_NUM_ENDPOINTS + 1; ++i) {
 926                 struct fotg210_ep *ep = chip->ep + i;
 927
 928                 ep->ep.maxpacket = ep->maxpacket;
 929                 INIT_LIST_HEAD(&ep->queue);
 930
 931                 if (ep->id == 0) {
 932                         ep->stopped = 0;
 933                 } else {
 934                         ep->stopped = 1;
 935                         list_add_tail(&ep->ep.ep_list, &chip->gadget.ep_list);
 936                 }
 937         }
 938
 939         if (fotg210_reset(chip)) {
 940                 puts("fotg210: reset failed.\n");
 941                 return -EINVAL;
 942         }
 943
 944         ret = driver->bind(&chip->gadget);
 945         if (ret) {
 946                 debug("fotg210: driver->bind() returned %d\n", ret);
 947                 return ret;
 948         }
 949         chip->driver = driver;
 950
 951         return ret;
 952 }
 953
 954 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
 955 {
 956         struct fotg210_chip *chip = &controller;
 957
 958         driver->unbind(&chip->gadget);
 959         chip->driver = NULL;
 960
 961         pullup(chip, 0);
 962
 963         return 0;
 964 }