1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2012 Freescale Semiconductor, Inc.
7 /* MAXFRM - maximum frame length */
8 #define MAXFRM_MASK 0x0000ffff
12 #include <asm/types.h>
14 #include <fsl_memac.h>
18 static void memac_init_mac(struct fsl_enet_mac *mac)
20 struct memac *regs = mac->base;
22 /* mask all interrupt */
23 out_be32(®s->imask, IMASK_MASK_ALL);
25 /* clear all events */
26 out_be32(®s->ievent, IEVENT_CLEAR_ALL);
28 /* set the max receive length */
29 out_be32(®s->maxfrm, mac->max_rx_len & MAXFRM_MASK);
31 /* multicast frame reception for the hash entry disable */
32 out_be32(®s->hashtable_ctrl, 0);
35 static void memac_enable_mac(struct fsl_enet_mac *mac)
37 struct memac *regs = mac->base;
39 setbits_be32(®s->command_config,
40 MEMAC_CMD_CFG_RXTX_EN | MEMAC_CMD_CFG_NO_LEN_CHK);
43 static void memac_disable_mac(struct fsl_enet_mac *mac)
45 struct memac *regs = mac->base;
47 clrbits_be32(®s->command_config, MEMAC_CMD_CFG_RXTX_EN);
50 static void memac_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)
52 struct memac *regs = mac->base;
53 u32 mac_addr0, mac_addr1;
56 * if a station address of 0x12345678ABCD, perform a write to
57 * MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
59 mac_addr0 = (mac_addr[3] << 24) | (mac_addr[2] << 16) | \
60 (mac_addr[1] << 8) | (mac_addr[0]);
61 out_be32(®s->mac_addr_0, mac_addr0);
63 mac_addr1 = ((mac_addr[5] << 8) | mac_addr[4]) & 0x0000ffff;
64 out_be32(®s->mac_addr_1, mac_addr1);
67 static void memac_set_interface_mode(struct fsl_enet_mac *mac,
68 phy_interface_t type, int speed)
70 /* Roy need more work here */
72 struct memac *regs = mac->base;
73 u32 if_mode, if_status;
75 /* clear all bits relative with interface mode */
76 if_mode = in_be32(®s->if_mode);
77 if_status = in_be32(®s->if_status);
79 /* set interface mode */
81 case PHY_INTERFACE_MODE_GMII:
82 if_mode &= ~IF_MODE_MASK;
83 if_mode |= IF_MODE_GMII;
85 case PHY_INTERFACE_MODE_RGMII:
86 case PHY_INTERFACE_MODE_RGMII_ID:
87 case PHY_INTERFACE_MODE_RGMII_RXID:
88 case PHY_INTERFACE_MODE_RGMII_TXID:
89 if_mode |= (IF_MODE_GMII | IF_MODE_RG);
91 case PHY_INTERFACE_MODE_RMII:
92 if_mode |= (IF_MODE_GMII | IF_MODE_RM);
94 case PHY_INTERFACE_MODE_SGMII:
95 case PHY_INTERFACE_MODE_SGMII_2500:
96 case PHY_INTERFACE_MODE_QSGMII:
97 if_mode &= ~IF_MODE_MASK;
98 if_mode |= (IF_MODE_GMII);
100 case PHY_INTERFACE_MODE_XGMII:
101 if_mode &= ~IF_MODE_MASK;
102 if_mode |= IF_MODE_XGMII;
107 /* Enable automatic speed selection for Non-XGMII */
108 if (type != PHY_INTERFACE_MODE_XGMII)
109 if_mode |= IF_MODE_EN_AUTO;
111 if (type == PHY_INTERFACE_MODE_RGMII ||
112 type == PHY_INTERFACE_MODE_RGMII_ID ||
113 type == PHY_INTERFACE_MODE_RGMII_RXID ||
114 type == PHY_INTERFACE_MODE_RGMII_TXID) {
115 if_mode &= ~IF_MODE_EN_AUTO;
116 if_mode &= ~IF_MODE_SETSP_MASK;
119 if_mode |= IF_MODE_SETSP_1000M;
122 if_mode |= IF_MODE_SETSP_100M;
125 if_mode |= IF_MODE_SETSP_10M;
131 debug(" %s, if_mode = %x\n", __func__, if_mode);
132 debug(" %s, if_status = %x\n", __func__, if_status);
133 out_be32(®s->if_mode, if_mode);
137 void init_memac(struct fsl_enet_mac *mac, void *base,
138 void *phyregs, int max_rx_len)
140 debug("%s: @ %p, mdio @ %p\n", __func__, base, phyregs);
142 mac->phyregs = phyregs;
143 mac->max_rx_len = max_rx_len;
144 mac->init_mac = memac_init_mac;
145 mac->enable_mac = memac_enable_mac;
146 mac->disable_mac = memac_disable_mac;
147 mac->set_mac_addr = memac_set_mac_addr;
148 mac->set_if_mode = memac_set_interface_mode;