1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
15 #include <dm/of_extra.h>
19 #include <fdt_support.h>
22 #include <linux/libfdt.h>
24 #include <asm/global_data.h>
25 #include <asm/sections.h>
26 #include <linux/ctype.h>
27 #include <linux/lzo.h>
28 #include <linux/ioport.h>
30 DECLARE_GLOBAL_DATA_PTR;
33 * Here are the type we know about. One day we might allow drivers to
34 * register. For now we just put them here. The COMPAT macro allows us to
35 * turn this into a sparse list later, and keeps the ID with the name.
37 * NOTE: This list is basically a TODO list for things that need to be
38 * converted to driver model. So don't add new things here unless there is a
39 * good reason why driver-model conversion is infeasible. Examples include
40 * things which are used before driver model is available.
42 #define COMPAT(id, name) name
43 static const char * const compat_names[COMPAT_COUNT] = {
44 COMPAT(UNKNOWN, "<none>"),
45 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
46 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
47 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
48 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
49 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
50 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
51 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
52 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
53 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
54 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
55 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
56 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
57 COMPAT(INTEL_MICROCODE, "intel,microcode"),
58 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
59 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
60 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
61 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
62 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
63 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
64 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
65 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
66 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
67 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
68 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
74 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
75 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
76 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
79 const char *fdtdec_get_compatible(enum fdt_compat_id id)
81 /* We allow reading of the 'unknown' ID for testing purposes */
82 assert(id >= 0 && id < COMPAT_COUNT);
83 return compat_names[id];
86 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
87 const char *prop_name, int index, int na,
88 int ns, fdt_size_t *sizep,
91 const fdt32_t *prop, *prop_end;
92 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
96 debug("%s: %s: ", __func__, prop_name);
98 prop = fdt_getprop(blob, node, prop_name, &len);
100 debug("(not found)\n");
101 return FDT_ADDR_T_NONE;
103 prop_end = prop + (len / sizeof(*prop));
105 prop_addr = prop + (index * (na + ns));
106 prop_size = prop_addr + na;
107 prop_after_size = prop_size + ns;
108 if (prop_after_size > prop_end) {
109 debug("(not enough data: expected >= %d cells, got %d cells)\n",
110 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
111 return FDT_ADDR_T_NONE;
114 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
116 addr = fdt_translate_address(blob, node, prop_addr);
119 addr = fdtdec_get_number(prop_addr, na);
122 *sizep = fdtdec_get_number(prop_size, ns);
123 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
124 (unsigned long long)*sizep);
126 debug("addr=%08llx\n", (unsigned long long)addr);
132 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
133 int node, const char *prop_name,
134 int index, fdt_size_t *sizep,
139 debug("%s: ", __func__);
141 na = fdt_address_cells(blob, parent);
143 debug("(bad #address-cells)\n");
144 return FDT_ADDR_T_NONE;
147 ns = fdt_size_cells(blob, parent);
149 debug("(bad #size-cells)\n");
150 return FDT_ADDR_T_NONE;
153 debug("na=%d, ns=%d, ", na, ns);
155 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
156 ns, sizep, translate);
159 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
160 const char *prop_name, int index,
166 debug("%s: ", __func__);
168 parent = fdt_parent_offset(blob, node);
170 debug("(no parent found)\n");
171 return FDT_ADDR_T_NONE;
174 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
175 index, sizep, translate);
178 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
179 const char *prop_name, fdt_size_t *sizep)
181 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
183 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
184 sizeof(fdt_addr_t) / sizeof(fdt32_t),
188 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
190 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
193 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
194 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
196 const char *list, *end;
199 list = fdt_getprop(blob, node, "compatible", &len);
206 if (len >= strlen("pciVVVV,DDDD")) {
207 char *s = strstr(list, "pci");
210 * check if the string is something like pciVVVV,DDDD.RR
211 * or just pciVVVV,DDDD
213 if (s && s[7] == ',' &&
214 (s[12] == '.' || s[12] == 0)) {
216 *vendor = simple_strtol(s, NULL, 16);
219 *device = simple_strtol(s, NULL, 16);
230 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
235 /* extract the bar number from fdt_pci_addr */
236 barnum = addr->phys_hi & 0xff;
237 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
240 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
241 *bar = dm_pci_read_bar32(dev, barnum);
246 int fdtdec_get_pci_bus_range(const void *blob, int node,
247 struct fdt_resource *res)
252 values = fdt_getprop(blob, node, "bus-range", &len);
253 if (!values || len < sizeof(*values) * 2)
256 res->start = fdt32_to_cpu(*values++);
257 res->end = fdt32_to_cpu(*values);
263 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
264 uint64_t default_val)
266 const unaligned_fdt64_t *cell64;
269 cell64 = fdt_getprop(blob, node, prop_name, &length);
270 if (!cell64 || length < sizeof(*cell64))
273 return fdt64_to_cpu(*cell64);
276 int fdtdec_get_is_enabled(const void *blob, int node)
281 * It should say "okay", so only allow that. Some fdts use "ok" but
282 * this is a bug. Please fix your device tree source file. See here
287 cell = fdt_getprop(blob, node, "status", NULL);
289 return strcmp(cell, "okay") == 0;
293 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
295 enum fdt_compat_id id;
297 /* Search our drivers */
298 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
299 if (fdt_node_check_compatible(blob, node,
300 compat_names[id]) == 0)
302 return COMPAT_UNKNOWN;
305 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
307 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
310 int fdtdec_next_compatible_subnode(const void *blob, int node,
311 enum fdt_compat_id id, int *depthp)
314 node = fdt_next_node(blob, node, depthp);
315 } while (*depthp > 1);
317 /* If this is a direct subnode, and compatible, return it */
318 if (*depthp == 1 && 0 == fdt_node_check_compatible(
319 blob, node, compat_names[id]))
322 return -FDT_ERR_NOTFOUND;
325 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
328 #define MAX_STR_LEN 20
329 char str[MAX_STR_LEN + 20];
332 /* snprintf() is not available */
333 assert(strlen(name) < MAX_STR_LEN);
334 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
335 node = fdt_path_offset(blob, str);
338 err = fdt_node_check_compatible(blob, node, compat_names[id]);
342 return -FDT_ERR_NOTFOUND;
347 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
348 enum fdt_compat_id id, int *node_list,
351 memset(node_list, '\0', sizeof(*node_list) * maxcount);
353 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
356 /* TODO: Can we tighten this code up a little? */
357 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
358 enum fdt_compat_id id, int *node_list,
361 int name_len = strlen(name);
369 /* find the alias node if present */
370 alias_node = fdt_path_offset(blob, "/aliases");
373 * start with nothing, and we can assume that the root node can't
376 memset(nodes, '\0', sizeof(nodes));
378 /* First find all the compatible nodes */
379 for (node = count = 0; node >= 0 && count < maxcount;) {
380 node = fdtdec_next_compatible(blob, node, id);
382 nodes[count++] = node;
385 debug("%s: warning: maxcount exceeded with alias '%s'\n",
388 /* Now find all the aliases */
389 for (offset = fdt_first_property_offset(blob, alias_node);
391 offset = fdt_next_property_offset(blob, offset)) {
392 const struct fdt_property *prop;
398 prop = fdt_get_property_by_offset(blob, offset, NULL);
399 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
400 if (prop->len && 0 == strncmp(path, name, name_len))
401 node = fdt_path_offset(blob, prop->data);
405 /* Get the alias number */
406 number = dectoul(path + name_len, NULL);
407 if (number < 0 || number >= maxcount) {
408 debug("%s: warning: alias '%s' is out of range\n",
413 /* Make sure the node we found is actually in our list! */
415 for (j = 0; j < count; j++)
416 if (nodes[j] == node) {
422 debug("%s: warning: alias '%s' points to a node "
423 "'%s' that is missing or is not compatible "
424 " with '%s'\n", __func__, path,
425 fdt_get_name(blob, node, NULL),
431 * Add this node to our list in the right place, and mark
434 if (fdtdec_get_is_enabled(blob, node)) {
435 if (node_list[number]) {
436 debug("%s: warning: alias '%s' requires that "
437 "a node be placed in the list in a "
438 "position which is already filled by "
439 "node '%s'\n", __func__, path,
440 fdt_get_name(blob, node, NULL));
443 node_list[number] = node;
444 if (number >= num_found)
445 num_found = number + 1;
450 /* Add any nodes not mentioned by an alias */
451 for (i = j = 0; i < maxcount; i++) {
453 for (; j < maxcount; j++)
455 fdtdec_get_is_enabled(blob, nodes[j]))
458 /* Have we run out of nodes to add? */
462 assert(!node_list[i]);
463 node_list[i] = nodes[j++];
472 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
475 int base_len = strlen(base);
476 const char *find_name;
481 find_name = fdt_get_name(blob, offset, &find_namelen);
482 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
484 aliases = fdt_path_offset(blob, "/aliases");
485 for (prop_offset = fdt_first_property_offset(blob, aliases);
487 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
493 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
494 debug(" - %s, %s\n", name, prop);
495 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
496 strncmp(name, base, base_len))
499 slash = strrchr(prop, '/');
500 if (strcmp(slash + 1, find_name))
504 * Adding an extra check to distinguish DT nodes with
507 if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
508 if (fdt_get_phandle(blob, offset) !=
509 fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
513 val = trailing_strtol(name);
516 debug("Found seq %d\n", *seqp);
521 debug("Not found\n");
525 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
527 int base_len = strlen(base);
532 debug("Looking for highest alias id for '%s'\n", base);
534 aliases = fdt_path_offset(blob, "/aliases");
535 for (prop_offset = fdt_first_property_offset(blob, aliases);
537 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
542 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
543 debug(" - %s, %s\n", name, prop);
544 if (*prop != '/' || prop[len - 1] ||
545 strncmp(name, base, base_len))
548 val = trailing_strtol(name);
550 debug("Found seq %d\n", val);
558 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
564 chosen_node = fdt_path_offset(blob, "/chosen");
565 return fdt_getprop(blob, chosen_node, name, NULL);
568 int fdtdec_get_chosen_node(const void *blob, const char *name)
572 prop = fdtdec_get_chosen_prop(blob, name);
574 return -FDT_ERR_NOTFOUND;
575 return fdt_path_offset(blob, prop);
578 int fdtdec_check_fdt(void)
581 * We must have an FDT, but we cannot panic() yet since the console
582 * is not ready. So for now, just assert(). Boards which need an early
583 * FDT (prior to console ready) will need to make their own
584 * arrangements and do their own checks.
586 assert(!fdtdec_prepare_fdt());
591 * This function is a little odd in that it accesses global data. At some
592 * point if the architecture board.c files merge this will make more sense.
593 * Even now, it is common code.
595 int fdtdec_prepare_fdt(void)
597 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
598 fdt_check_header(gd->fdt_blob)) {
599 #ifdef CONFIG_SPL_BUILD
600 puts("Missing DTB\n");
602 printf("No valid device tree binary found at %p\n",
606 printf("fdt_blob=%p\n", gd->fdt_blob);
607 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
617 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
622 debug("%s: %s\n", __func__, prop_name);
623 phandle = fdt_getprop(blob, node, prop_name, NULL);
625 return -FDT_ERR_NOTFOUND;
627 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
632 * Look up a property in a node and check that it has a minimum length.
634 * @param blob FDT blob
635 * @param node node to examine
636 * @param prop_name name of property to find
637 * @param min_len minimum property length in bytes
638 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
639 found, or -FDT_ERR_BADLAYOUT if not enough data
640 * @return pointer to cell, which is only valid if err == 0
642 static const void *get_prop_check_min_len(const void *blob, int node,
643 const char *prop_name, int min_len,
649 debug("%s: %s\n", __func__, prop_name);
650 cell = fdt_getprop(blob, node, prop_name, &len);
652 *err = -FDT_ERR_NOTFOUND;
653 else if (len < min_len)
654 *err = -FDT_ERR_BADLAYOUT;
660 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
661 u32 *array, int count)
666 debug("%s: %s\n", __func__, prop_name);
667 cell = get_prop_check_min_len(blob, node, prop_name,
668 sizeof(u32) * count, &err);
672 for (i = 0; i < count; i++)
673 array[i] = fdt32_to_cpu(cell[i]);
678 int fdtdec_get_int_array_count(const void *blob, int node,
679 const char *prop_name, u32 *array, int count)
685 debug("%s: %s\n", __func__, prop_name);
686 cell = fdt_getprop(blob, node, prop_name, &len);
688 return -FDT_ERR_NOTFOUND;
689 elems = len / sizeof(u32);
692 for (i = 0; i < count; i++)
693 array[i] = fdt32_to_cpu(cell[i]);
698 const u32 *fdtdec_locate_array(const void *blob, int node,
699 const char *prop_name, int count)
704 cell = get_prop_check_min_len(blob, node, prop_name,
705 sizeof(u32) * count, &err);
706 return err ? NULL : cell;
709 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
714 debug("%s: %s\n", __func__, prop_name);
715 cell = fdt_getprop(blob, node, prop_name, &len);
719 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
720 const char *list_name,
721 const char *cells_name,
722 int cell_count, int index,
723 struct fdtdec_phandle_args *out_args)
725 const __be32 *list, *list_end;
726 int rc = 0, size, cur_index = 0;
731 /* Retrieve the phandle list property */
732 list = fdt_getprop(blob, src_node, list_name, &size);
735 list_end = list + size / sizeof(*list);
737 /* Loop over the phandles until all the requested entry is found */
738 while (list < list_end) {
743 * If phandle is 0, then it is an empty entry with no
744 * arguments. Skip forward to the next entry.
746 phandle = be32_to_cpup(list++);
749 * Find the provider node and parse the #*-cells
750 * property to determine the argument length.
752 * This is not needed if the cell count is hard-coded
753 * (i.e. cells_name not set, but cell_count is set),
754 * except when we're going to return the found node
757 if (cells_name || cur_index == index) {
758 node = fdt_node_offset_by_phandle(blob,
761 debug("%s: could not find phandle\n",
762 fdt_get_name(blob, src_node,
769 count = fdtdec_get_int(blob, node, cells_name,
772 debug("%s: could not get %s for %s\n",
773 fdt_get_name(blob, src_node,
776 fdt_get_name(blob, node,
785 * Make sure that the arguments actually fit in the
786 * remaining property data length
788 if (list + count > list_end) {
789 debug("%s: arguments longer than property\n",
790 fdt_get_name(blob, src_node, NULL));
796 * All of the error cases above bail out of the loop, so at
797 * this point, the parsing is successful. If the requested
798 * index matches, then fill the out_args structure and return,
799 * or return -ENOENT for an empty entry.
802 if (cur_index == index) {
809 if (count > MAX_PHANDLE_ARGS) {
810 debug("%s: too many arguments %d\n",
811 fdt_get_name(blob, src_node,
813 count = MAX_PHANDLE_ARGS;
815 out_args->node = node;
816 out_args->args_count = count;
817 for (i = 0; i < count; i++) {
819 be32_to_cpup(list++);
823 /* Found it! return success */
833 * Result will be one of:
834 * -ENOENT : index is for empty phandle
835 * -EINVAL : parsing error on data
836 * [1..n] : Number of phandle (count mode; when index = -1)
838 rc = index < 0 ? cur_index : -ENOENT;
843 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
844 u8 *array, int count)
849 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
851 memcpy(array, cell, count);
855 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
856 const char *prop_name, int count)
861 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
867 int fdtdec_get_config_int(const void *blob, const char *prop_name,
872 debug("%s: %s\n", __func__, prop_name);
873 config_node = fdt_path_offset(blob, "/config");
876 return fdtdec_get_int(blob, config_node, prop_name, default_val);
879 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
884 debug("%s: %s\n", __func__, prop_name);
885 config_node = fdt_path_offset(blob, "/config");
888 prop = fdt_get_property(blob, config_node, prop_name, NULL);
893 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
899 debug("%s: %s\n", __func__, prop_name);
900 nodeoffset = fdt_path_offset(blob, "/config");
904 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
908 return (char *)nodep;
911 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
916 number = (number << 32) | fdt32_to_cpu(*ptr++);
921 int fdt_get_resource(const void *fdt, int node, const char *property,
922 unsigned int index, struct fdt_resource *res)
924 const fdt32_t *ptr, *end;
925 int na, ns, len, parent;
928 parent = fdt_parent_offset(fdt, node);
932 na = fdt_address_cells(fdt, parent);
933 ns = fdt_size_cells(fdt, parent);
935 ptr = fdt_getprop(fdt, node, property, &len);
939 end = ptr + len / sizeof(*ptr);
941 while (ptr + na + ns <= end) {
943 if (CONFIG_IS_ENABLED(OF_TRANSLATE))
944 res->start = fdt_translate_address(fdt, node, ptr);
946 res->start = fdtdec_get_number(ptr, na);
948 res->end = res->start;
949 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
957 return -FDT_ERR_NOTFOUND;
960 int fdt_get_named_resource(const void *fdt, int node, const char *property,
961 const char *prop_names, const char *name,
962 struct fdt_resource *res)
966 index = fdt_stringlist_search(fdt, node, prop_names, name);
970 return fdt_get_resource(fdt, node, property, index, res);
973 static int decode_timing_property(const void *blob, int node, const char *name,
974 struct timing_entry *result)
979 prop = fdt_getprop(blob, node, name, &length);
981 debug("%s: could not find property %s\n",
982 fdt_get_name(blob, node, NULL), name);
986 if (length == sizeof(u32)) {
987 result->typ = fdtdec_get_int(blob, node, name, 0);
988 result->min = result->typ;
989 result->max = result->typ;
991 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
997 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
998 struct display_timing *dt)
1000 int i, node, timings_node;
1004 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1005 if (timings_node < 0)
1006 return timings_node;
1008 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1009 node > 0 && i != index;
1010 node = fdt_next_subnode(blob, node))
1016 memset(dt, 0, sizeof(*dt));
1018 ret |= decode_timing_property(blob, node, "hback-porch",
1020 ret |= decode_timing_property(blob, node, "hfront-porch",
1022 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1023 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1024 ret |= decode_timing_property(blob, node, "vback-porch",
1026 ret |= decode_timing_property(blob, node, "vfront-porch",
1028 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1029 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1030 ret |= decode_timing_property(blob, node, "clock-frequency",
1034 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1036 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1037 DISPLAY_FLAGS_VSYNC_LOW;
1039 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1041 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1042 DISPLAY_FLAGS_HSYNC_LOW;
1044 val = fdtdec_get_int(blob, node, "de-active", -1);
1046 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1047 DISPLAY_FLAGS_DE_LOW;
1049 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1051 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1052 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1055 if (fdtdec_get_bool(blob, node, "interlaced"))
1056 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1057 if (fdtdec_get_bool(blob, node, "doublescan"))
1058 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1059 if (fdtdec_get_bool(blob, node, "doubleclk"))
1060 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1065 int fdtdec_setup_mem_size_base(void)
1069 struct resource res;
1071 mem = ofnode_path("/memory");
1072 if (!ofnode_valid(mem)) {
1073 debug("%s: Missing /memory node\n", __func__);
1077 ret = ofnode_read_resource(mem, 0, &res);
1079 debug("%s: Unable to decode first memory bank\n", __func__);
1083 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1084 gd->ram_base = (unsigned long)res.start;
1085 debug("%s: Initial DRAM size %llx\n", __func__,
1086 (unsigned long long)gd->ram_size);
1091 ofnode get_next_memory_node(ofnode mem)
1094 mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
1095 } while (!ofnode_is_available(mem));
1100 int fdtdec_setup_memory_banksize(void)
1102 int bank, ret, reg = 0;
1103 struct resource res;
1104 ofnode mem = ofnode_null();
1106 mem = get_next_memory_node(mem);
1107 if (!ofnode_valid(mem)) {
1108 debug("%s: Missing /memory node\n", __func__);
1112 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1113 ret = ofnode_read_resource(mem, reg++, &res);
1116 mem = get_next_memory_node(mem);
1117 if (!ofnode_valid(mem))
1120 ret = ofnode_read_resource(mem, reg++, &res);
1128 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1129 gd->bd->bi_dram[bank].size =
1130 (phys_size_t)(res.end - res.start + 1);
1132 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1134 (unsigned long long)gd->bd->bi_dram[bank].start,
1135 (unsigned long long)gd->bd->bi_dram[bank].size);
1141 int fdtdec_setup_mem_size_base_lowest(void)
1143 int bank, ret, reg = 0;
1144 struct resource res;
1147 ofnode mem = ofnode_null();
1149 gd->ram_base = (unsigned long)~0;
1151 mem = get_next_memory_node(mem);
1152 if (!ofnode_valid(mem)) {
1153 debug("%s: Missing /memory node\n", __func__);
1157 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1158 ret = ofnode_read_resource(mem, reg++, &res);
1161 mem = get_next_memory_node(mem);
1162 if (!ofnode_valid(mem))
1165 ret = ofnode_read_resource(mem, reg++, &res);
1173 base = (unsigned long)res.start;
1174 size = (phys_size_t)(res.end - res.start + 1);
1176 if (gd->ram_base > base && size) {
1177 gd->ram_base = base;
1178 gd->ram_size = size;
1179 debug("%s: Initial DRAM base %lx size %lx\n",
1180 __func__, base, (unsigned long)size);
1187 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1188 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1189 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1190 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1192 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1193 bool gzip = 0, lzo = 0;
1194 ulong sz_in = sz_src;
1198 if (CONFIG_IS_ENABLED(GZIP))
1199 if (gzip_parse_header(src, sz_in) >= 0)
1201 if (CONFIG_IS_ENABLED(LZO))
1202 if (!gzip && lzop_is_valid_header(src))
1209 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1210 dst = malloc(sz_out);
1212 puts("uncompress_blob: Unable to allocate memory\n");
1216 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1217 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1223 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1224 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1225 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1226 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1231 /* not a valid compressed blob */
1232 puts("uncompress_blob: Unable to uncompress\n");
1233 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1241 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1243 *dstp = (void *)src;
1249 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1251 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1252 * provide and/or fixup the fdt.
1254 __weak void *board_fdt_blob_setup(void)
1256 void *fdt_blob = NULL;
1257 #ifdef CONFIG_SPL_BUILD
1258 /* FDT is at end of BSS unless it is in a different memory region */
1259 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1260 fdt_blob = (ulong *)&_image_binary_end;
1262 fdt_blob = (ulong *)&__bss_end;
1264 /* FDT is at end of image */
1265 fdt_blob = (ulong *)&_end;
1271 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1276 if (!is_valid_ethaddr(mac))
1279 path = fdt_get_alias(fdt, "ethernet");
1283 debug("ethernet alias found: %s\n", path);
1285 offset = fdt_path_offset(fdt, path);
1287 debug("ethernet alias points to absent node %s\n", path);
1291 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1295 debug("MAC address: %pM\n", mac);
1300 static int fdtdec_init_reserved_memory(void *blob)
1302 int na, ns, node, err;
1305 /* inherit #address-cells and #size-cells from the root node */
1306 na = fdt_address_cells(blob, 0);
1307 ns = fdt_size_cells(blob, 0);
1309 node = fdt_add_subnode(blob, 0, "reserved-memory");
1313 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1317 value = cpu_to_fdt32(ns);
1319 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1323 value = cpu_to_fdt32(na);
1325 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1332 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1333 const struct fdt_memory *carveout,
1334 uint32_t *phandlep, bool no_map)
1336 fdt32_t cells[4] = {}, *ptr = cells;
1337 uint32_t upper, lower, phandle;
1338 int parent, node, na, ns, err;
1342 /* create an empty /reserved-memory node if one doesn't exist */
1343 parent = fdt_path_offset(blob, "/reserved-memory");
1345 parent = fdtdec_init_reserved_memory(blob);
1350 /* only 1 or 2 #address-cells and #size-cells are supported */
1351 na = fdt_address_cells(blob, parent);
1352 if (na < 1 || na > 2)
1353 return -FDT_ERR_BADNCELLS;
1355 ns = fdt_size_cells(blob, parent);
1356 if (ns < 1 || ns > 2)
1357 return -FDT_ERR_BADNCELLS;
1359 /* find a matching node and return the phandle to that */
1360 fdt_for_each_subnode(node, blob, parent) {
1361 const char *name = fdt_get_name(blob, node, NULL);
1365 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
1367 if (addr == FDT_ADDR_T_NONE) {
1368 debug("failed to read address/size for %s\n", name);
1372 if (addr == carveout->start && (addr + size - 1) ==
1375 *phandlep = fdt_get_phandle(blob, node);
1381 * Unpack the start address and generate the name of the new node
1382 * base on the basename and the unit-address.
1384 upper = upper_32_bits(carveout->start);
1385 lower = lower_32_bits(carveout->start);
1387 if (na > 1 && upper > 0)
1388 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1392 debug("address %08x:%08x exceeds addressable space\n",
1394 return -FDT_ERR_BADVALUE;
1397 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1400 node = fdt_add_subnode(blob, parent, name);
1405 err = fdt_generate_phandle(blob, &phandle);
1409 err = fdtdec_set_phandle(blob, node, phandle);
1414 /* store one or two address cells */
1416 *ptr++ = cpu_to_fdt32(upper);
1418 *ptr++ = cpu_to_fdt32(lower);
1420 /* store one or two size cells */
1421 size = carveout->end - carveout->start + 1;
1422 upper = upper_32_bits(size);
1423 lower = lower_32_bits(size);
1426 *ptr++ = cpu_to_fdt32(upper);
1428 *ptr++ = cpu_to_fdt32(lower);
1430 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1435 err = fdt_setprop(blob, node, "no-map", NULL, 0);
1440 /* return the phandle for the new node for the caller to use */
1442 *phandlep = phandle;
1447 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1448 unsigned int index, struct fdt_memory *carveout)
1450 const fdt32_t *prop;
1455 offset = fdt_path_offset(blob, node);
1459 prop = fdt_getprop(blob, offset, name, &len);
1461 debug("failed to get %s for %s\n", name, node);
1462 return -FDT_ERR_NOTFOUND;
1465 if ((len % sizeof(phandle)) != 0) {
1466 debug("invalid phandle property\n");
1467 return -FDT_ERR_BADPHANDLE;
1470 if (len < (sizeof(phandle) * (index + 1))) {
1471 debug("invalid phandle index\n");
1472 return -FDT_ERR_BADPHANDLE;
1475 phandle = fdt32_to_cpu(prop[index]);
1477 offset = fdt_node_offset_by_phandle(blob, phandle);
1479 debug("failed to find node for phandle %u\n", phandle);
1483 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1486 if (carveout->start == FDT_ADDR_T_NONE) {
1487 debug("failed to read address/size from \"reg\" property\n");
1488 return -FDT_ERR_NOTFOUND;
1491 carveout->end = carveout->start + size - 1;
1496 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1497 unsigned int index, const char *name,
1498 const struct fdt_memory *carveout)
1501 int err, offset, len;
1505 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle, false);
1507 debug("failed to add reserved memory: %d\n", err);
1511 offset = fdt_path_offset(blob, node);
1513 debug("failed to find offset for node %s: %d\n", node, offset);
1517 value = cpu_to_fdt32(phandle);
1519 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1520 if (len == -FDT_ERR_NOTFOUND)
1526 if ((index + 1) * sizeof(value) > len) {
1527 err = fdt_setprop_placeholder(blob, offset, prop_name,
1528 (index + 1) * sizeof(value),
1531 debug("failed to resize reserved memory property: %s\n",
1537 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1539 index * sizeof(value),
1540 &value, sizeof(value));
1542 debug("failed to update %s property for node %s: %s\n",
1543 prop_name, node, fdt_strerror(err));
1550 __weak int fdtdec_board_setup(const void *fdt_blob)
1555 int fdtdec_setup(void)
1558 #if CONFIG_IS_ENABLED(OF_CONTROL)
1559 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1562 # ifdef CONFIG_OF_EMBED
1563 /* Get a pointer to the FDT */
1564 # ifdef CONFIG_SPL_BUILD
1565 gd->fdt_blob = __dtb_dt_spl_begin;
1567 gd->fdt_blob = __dtb_dt_begin;
1569 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1570 /* Allow the board to override the fdt address. */
1571 gd->fdt_blob = board_fdt_blob_setup();
1572 # elif defined(CONFIG_OF_HOSTFILE)
1573 if (sandbox_read_fdt_from_file()) {
1574 puts("Failed to read control FDT\n");
1577 # elif defined(CONFIG_OF_PRIOR_STAGE)
1578 gd->fdt_blob = (void *)(uintptr_t)prior_stage_fdt_address;
1580 # ifndef CONFIG_SPL_BUILD
1581 /* Allow the early environment to override the fdt address */
1582 gd->fdt_blob = map_sysmem
1583 (env_get_ulong("fdtcontroladdr", 16,
1584 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1587 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1589 * Try and uncompress the blob.
1590 * Unfortunately there is no way to know how big the input blob really
1591 * is. So let us set the maximum input size arbitrarily high. 16MB
1592 * ought to be more than enough for packed DTBs.
1594 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1595 gd->fdt_blob = fdt_blob;
1598 * Check if blob is a FIT images containings DTBs.
1599 * If so, pick the most relevant
1601 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1603 gd->multi_dtb_fit = gd->fdt_blob;
1604 gd->fdt_blob = fdt_blob;
1610 ret = fdtdec_prepare_fdt();
1612 ret = fdtdec_board_setup(gd->fdt_blob);
1616 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1617 int fdtdec_resetup(int *rescan)
1622 * If the current DTB is part of a compressed FIT image,
1623 * try to locate the best match from the uncompressed
1624 * FIT image stillpresent there. Save the time and space
1625 * required to uncompress it again.
1627 if (gd->multi_dtb_fit) {
1628 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1630 if (fdt_blob == gd->fdt_blob) {
1632 * The best match did not change. no need to tear down
1633 * the DM and rescan the fdt.
1640 gd->fdt_blob = fdt_blob;
1641 return fdtdec_prepare_fdt();
1645 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1646 * not a FIT image containings DTB, but a single DTB. There is no need
1647 * to teard down DM and rescan the DT in this case.
1654 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1655 phys_addr_t *basep, phys_size_t *sizep,
1658 int addr_cells, size_cells;
1659 const u32 *cell, *end;
1660 u64 total_size, size, addr;
1666 debug("%s: board_id=%d\n", __func__, board_id);
1669 node = fdt_path_offset(blob, area);
1671 debug("No %s node found\n", area);
1675 cell = fdt_getprop(blob, node, "reg", &len);
1677 debug("No reg property found\n");
1681 addr_cells = fdt_address_cells(blob, node);
1682 size_cells = fdt_size_cells(blob, node);
1684 /* Check the board id and mask */
1685 for (child = fdt_first_subnode(blob, node);
1687 child = fdt_next_subnode(blob, child)) {
1688 int match_mask, match_value;
1690 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1691 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1693 if (match_value >= 0 &&
1694 ((board_id & match_mask) == match_value)) {
1695 /* Found matching mask */
1696 debug("Found matching mask %d\n", match_mask);
1698 cell = fdt_getprop(blob, node, "reg", &len);
1700 debug("No memory-banks property found\n");
1706 /* Note: if no matching subnode was found we use the parent node */
1709 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1710 CONFIG_NR_DRAM_BANKS);
1713 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1716 end = cell + len / 4 - addr_cells - size_cells;
1717 debug("cell at %p, end %p\n", cell, end);
1718 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1722 if (addr_cells == 2)
1723 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1724 addr += fdt32_to_cpu(*cell++);
1726 bd->bi_dram[bank].start = addr;
1728 *basep = (phys_addr_t)addr;
1731 if (size_cells == 2)
1732 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1733 size += fdt32_to_cpu(*cell++);
1738 debug("Auto-sizing %llx, size %llx: ", addr, size);
1739 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1740 if (new_size == size) {
1743 debug("sized to %llx\n", new_size);
1749 bd->bi_dram[bank].size = size;
1753 debug("Memory size %llu\n", total_size);
1755 *sizep = (phys_size_t)total_size;
1760 #endif /* !USE_HOSTCC */