1 /* SPDX-License-Identifier: GPL-2.0+ */
5 #ifndef __CONFIG_SOFTING_VINING_FPGA_H__
6 #define __CONFIG_SOFTING_VINING_FPGA_H__
8 #include <asm/arch/base_addr_ac5.h>
10 /* Memory configurations */
11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
15 /* Extra Environment */
18 * Active LOW GPIO buttons:
19 * A: GPIO 77 ... the button between USB B and ethernet
20 * B: GPIO 78 ... the button between USB A ports
23 * if button B is pressed, boot recovery system after 10 seconds
24 * if force_boottype is set, boot system depending on the value in the
25 * $force_boottype variable after 1 second
26 * if button B is not pressed and force_boottype is not set, boot normal
27 * Linux system after 5 seconds
30 #define CFG_EXTRA_ENV_SETTINGS \
34 "bootscript=boot.scr\0" \
37 "ubipart=ubi0:vining-fpga-rootfs\0" \
38 "ubisfcs=1\0" /* Default is flash at CS#1 */ \
40 "hostname=vining_fpga\0" \
41 "kernel_addr_r=0x10000000\0" \
42 "fdt_addr_r=0x20000000\0" \
43 "fdt_high=0xffffffff\0" \
44 "initrd_high=0xffffffff\0" \
45 "dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1\0" \
46 "mtdparts_0_16m=ff705000.spi.0:" /* 16MiB+128MiB SF config */ \
52 "-(rcvrfs)\0" /* Recovery */ \
53 "mtdparts_0_256m=ff705000.spi.0:" /* 256MiB(+256MiB) config */ \
59 "14720k(rcvrfs)," /* Recovery */ \
60 "192m(rootfs)," /* Root */ \
61 "-(userfs)\0" /* User */ \
62 "mtdparts_1_128m=ff705000.spi.1:" /* 16MiB+128MiB SF config */ \
65 "mtdparts_1_256m=ff705000.spi.1:" /* 256MiB+256MiB SF config */ \
67 "update_filename=u-boot-with-spl-dtb.sfp\0" \
68 "update_qspi_offset=0x0\0" \
69 "update_qspi=" /* Update the QSPI firmware */ \
70 "if sf probe ; then " \
71 "if tftp ${update_filename} ; then " \
72 "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
76 "setenv sf_size_0 ; setenv sf_size_1 ; " \
77 "sf probe 0:0 && setenv sf_size_0 ${sf_size} ; " \
78 "sf probe 0:1 && setenv sf_size_1 ${sf_size} ; " \
79 "if test -z \"${sf_size_1}\" ; then " \
81 "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
82 "setenv mtdparts_1 ; " \
83 "elif test \"${sf_size_0}\" = \"1000000\" ; then " \
84 /* 16MiB+128MiB SF */ \
85 "setenv mtdparts_0 ${mtdparts_0_16m} ; " \
86 "setenv mtdparts_1 ${mtdparts_1_128m} ; " \
88 /* 256MiB+256MiB SF */ \
89 "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
90 "setenv mtdparts_1 ${mtdparts_1_256m} ; " \
92 "fpga_filename=output_file.rbf\0" \
93 "load_fpga=" /* Load FPGA bitstream */ \
94 "if tftp ${fpga_filename} ; then " \
95 "fpga load 0 $loadaddr $filesize ; " \
99 "setenv bootargs ${bootargs} " \
100 "console=${consdev},${baudrate}\0" \
102 "setenv bootargs ${bootargs} " \
103 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
104 "${netmask}:${hostname}:${netdev}:off\0" \
106 "setenv bootargs ${bootargs} ${miscargs}\0" \
108 "if test -z \"${sf_size_1}\" ; then " \
109 "setenv mtdparts \"${mtdparts_0}\" ; " \
111 "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
113 "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
114 "addargs=run addcons addmtd addmisc\0" \
116 "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
117 "ubifsload ${kernel_addr_r} /boot/${bootfile} ; " \
118 "ubifsumount ; ubi detach\0" \
120 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
121 "miscargs=nohlt panic=1\0" \
123 "setenv bootargs ubi.mtd=${ubimtdnr} " \
124 "root=${ubipart} rootfstype=ubifs\0" \
126 "setenv bootargs root=/dev/nfs rw " \
127 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
129 "if test \"${boottype}\" = \"rcvr\" ; then " \
130 "setenv ubisfcs 0 ; " \
131 "setenv ubimtd rcvrfs ; " \
132 "setenv ubimtdnr 5 ; " \
133 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
134 "setenv mtdids nor0=ff705000.spi.0 ; " \
135 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
137 "if test \"${sf_size_0}\" = \"1000000\" ; then "\
138 /* 16MiB+128MiB SF */ \
139 "setenv ubisfcs 1 ; " \
140 "setenv ubimtd rootfs ; " \
141 "setenv ubimtdnr 6 ; " \
142 "setenv mtdparts mtdparts=${mtdparts_1} ; " \
143 "setenv mtdids nor0=ff705000.spi.1 ; " \
144 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
146 /* 256MiB(+256MiB) SF */ \
147 "setenv ubisfcs 0 ; " \
148 "setenv ubimtd rootfs ; " \
149 "setenv ubimtdnr 6 ; " \
150 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
151 "setenv mtdids nor0=ff705000.spi.0 ; " \
152 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
155 "sf probe 0:${ubisfcs}\0" \
157 "if test -z \"${sf_size_1}\" ; then " /* 1x256MiB SF */ \
158 "imxtract ${kernel_addr_r} fdt@1 ${fdt_addr_r} && " \
159 "fdt addr ${fdt_addr_r} && " \
161 "fdt set /soc/spi@ff705000/n25q00@1 status disabled && " \
162 "bootm ${kernel_addr_r}:kernel@1 - ${fdt_addr_r} ; " \
164 "bootm ${kernel_addr_r} ; " \
167 "run ubi_sfsel ubiload ubiargs addargs boot_kernel\0" \
169 "run ubiload nfsargs addip addargs boot_kernel\0" \
171 "run netload ubiargs addargs boot_kernel\0" \
173 "run netload nfsargs addip addargs boot_kernel\0" \
174 "selboot=" /* Select from where to boot. */ \
175 "run sf_identify ; " \
176 "if test \"${bootmode}\" = \"qspi\" ; then " \
178 "if test \"${boottype}\" = \"rcvr\" ; then " \
179 "echo \"Booting recovery system\" ; " \
180 "led 3 on ; " /* Bottom RED */ \
182 "led 1 on ; " /* Top RED */ \
184 "else echo \"Unsupported boot mode: \"${bootmode} ; " \
186 "socfpga_legacy_reset_compat=1\0"
188 /* The rest of the configuration is shared */
189 #include <configs/socfpga_common.h>
191 #endif /* __CONFIG_SOFTING_VINING_FPGA_H__ */