arch/riscv/cpu/k1/dram.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (c) 2024, Kongyang Liu <[email protected]>
   4  */
   5
   6 #include <asm/global_data.h>
   7 #include <asm/io.h>
   8 #include <config.h>
   9 #include <bitfield.h>
  10 #include <fdt_support.h>
  11 #include <linux/sizes.h>
  12
  13 #define DDR_BASE 0xC0000000
  14 DECLARE_GLOBAL_DATA_PTR;
  15
  16 static phys_size_t ddr_map_size(u32 val)
  17 {
  18         u32 tmp;
  19
  20         if (!(val & 0x1))
  21                 return 0;
  22
  23         tmp = bitfield_extract(val, 16, 5);
  24         switch (tmp) {
  25         case 0xd:
  26                 return 512;
  27         case 0xe:
  28                 return 1024;
  29         case 0xf:
  30                 return 2048;
  31         case 0x10:
  32                 return 4096;
  33         case 0x11:
  34                 return 8192;
  35         default:
  36                 pr_info("Invalid DRAM density %x\n", val);
  37                 return 0;
  38         }
  39 }
  40
  41 phys_size_t ddr_get_density(void)
  42 {
  43         phys_size_t cs0_size = ddr_map_size(readl((void *)DDR_BASE + 0x200));
  44         phys_size_t cs1_size = ddr_map_size(readl((void *)DDR_BASE + 0x208));
  45         phys_size_t ddr_size = cs0_size + cs1_size;
  46
  47         return ddr_size;
  48 }
  49
  50 int dram_init(void)
  51 {
  52         gd->ram_base = CFG_SYS_SDRAM_BASE;
  53         gd->ram_size = ddr_get_density() * SZ_1M;
  54         return 0;
  55 }
  56
  57 int dram_init_banksize(void)
  58 {
  59         gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
  60         gd->bd->bi_dram[0].size = min_t(phys_size_t, gd->ram_size, SZ_2G);
  61
  62         if (gd->ram_size > SZ_2G && CONFIG_NR_DRAM_BANKS > 1) {
  63                 gd->bd->bi_dram[1].start = 0x100000000;
  64                 gd->bd->bi_dram[1].size = gd->ram_size - SZ_2G;
  65         }
  66
  67         return 0;
  68 }
  69
  70 phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
  71 {
  72         if (gd->ram_size > SZ_2G)
  73                 return SZ_2G;
  74
  75         return gd->ram_size;
  76 }
  77
  78 int ft_board_setup(void *blob, struct bd_info *bd)
  79 {
  80         u64 start[CONFIG_NR_DRAM_BANKS];
  81         u64 size[CONFIG_NR_DRAM_BANKS];
  82         int i;
  83
  84         for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  85                 start[i] = gd->bd->bi_dram[i].start;
  86                 size[i] = gd->bd->bi_dram[i].size;
  87         }
  88
  89         return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
  90 }