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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
4  *
5  * (C) Copyright 2016
6  * Valentin Longchamp, Keymile AG, [email protected]
7  *
8  * Copyright 2014 - 2015 Freescale Semiconductor Inc.
9  */
10
11 /include/ "t104xsi-pre.dtsi"
12
13 / {
14         model = "keymile,kmcent2";
15         compatible = "keymile,kmcent2";
16
17         aliases {
18                 front_phy = &front_phy;
19         };
20
21         reserved-memory {
22                 #address-cells = <2>;
23                 #size-cells = <2>;
24                 ranges;
25
26                 bman_fbpr: bman-fbpr {
27                         size = <0 0x1000000>;
28                         alignment = <0 0x1000000>;
29                 };
30                 qman_fqd: qman-fqd {
31                         size = <0 0x400000>;
32                         alignment = <0 0x400000>;
33                 };
34                 qman_pfdr: qman-pfdr {
35                         size = <0 0x2000000>;
36                         alignment = <0 0x2000000>;
37                 };
38         };
39
40         ifc: localbus@ffe124000 {
41                 reg = <0xf 0xfe124000 0 0x2000>;
42                 ranges = <0 0 0xf 0xe8000000 0x04000000
43                           1 0 0xf 0xfa000000 0x00010000
44                           2 0 0xf 0xfb000000 0x00010000
45                           4 0 0xf 0xc0000000 0x08000000
46                           6 0 0xf 0xd0000000 0x08000000
47                           7 0 0xf 0xd8000000 0x08000000>;
48
49                 nor@0,0 {
50                         #address-cells = <1>;
51                         #size-cells = <1>;
52                         compatible = "cfi-flash";
53                         reg = <0x0 0x0 0x04000000>;
54                         bank-width = <2>;
55                         device-width = <2>;
56                 };
57
58                 nand@1,0 {
59                         #address-cells = <1>;
60                         #size-cells = <1>;
61                         compatible = "fsl,ifc-nand";
62                         reg = <0x1 0x0 0x10000>;
63                 };
64
65                 board-control@2,0 {
66                         compatible = "keymile,qriox";
67                         reg = <0x2 0x0 0x80>;
68                 };
69
70                 chassis-mgmt@6,0 {
71                         compatible = "keymile,bfticu";
72                         reg = <6 0 0x100>;
73                         interrupt-controller;
74                         interrupt-parent = <&mpic>;
75                         interrupts = <11 1 0 0>;
76                         #interrupt-cells = <1>;
77                 };
78
79         };
80
81         memory {
82                 device_type = "memory";
83         };
84
85         dcsr: dcsr@f00000000 {
86                 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
87         };
88
89         bportals: bman-portals@ff4000000 {
90                 ranges = <0x0 0xf 0xf4000000 0x2000000>;
91         };
92
93         qportals: qman-portals@ff6000000 {
94                 ranges = <0x0 0xf 0xf6000000 0x2000000>;
95         };
96
97         soc: soc@ffe000000 {
98                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
99                 reg = <0xf 0xfe000000 0 0x00001000>;
100
101                 spi@110000 {
102                         network-clock@1 {
103                                 compatible = "zarlink,zl30364";
104                                 reg = <1>;
105                                 spi-max-frequency = <1000000>;
106                         };
107                 };
108
109                 sdhc@114000 {
110                         status = "disabled";
111                 };
112
113                 i2c@118000 {
114                         clock-frequency = <100000>;
115
116                         mux@70 {
117                                 compatible = "nxp,pca9547";
118                                 reg = <0x70>;
119                                 #address-cells = <1>;
120                                 #size-cells = <0>;
121                                 i2c-mux-idle-disconnect;
122
123                                 i2c@0 {
124                                         reg = <0>;
125                                         #address-cells = <1>;
126                                         #size-cells = <0>;
127
128                                         eeprom@54 {
129                                                 compatible = "atmel,24c02";
130                                                 reg = <0x54>;
131                                                 pagesize = <2>;
132                                                 read-only;
133                                                 label = "ddr3-spd";
134                                         };
135                                 };
136
137                                 i2c@7 {
138                                         reg = <7>;
139                                         #address-cells = <1>;
140                                         #size-cells = <0>;
141
142                                         temp-sensor@48 {
143                                                 compatible = "national,lm75";
144                                                 reg = <0x48>;
145                                                 label = "SENSOR_0";
146                                         };
147                                         temp-sensor@4a {
148                                                 compatible = "national,lm75";
149                                                 reg = <0x4a>;
150                                                 label = "SENSOR_2";
151                                         };
152                                         temp-sensor@4b {
153                                                 compatible = "national,lm75";
154                                                 reg = <0x4b>;
155                                                 label = "SENSOR_3";
156                                         };
157                                 };
158                         };
159                 };
160
161                 i2c@118100 {
162                         clock-frequency = <100000>;
163
164                         eeprom@50 {
165                                 compatible = "atmel,24c08";
166                                 reg = <0x50>;
167                                 pagesize = <16>;
168                         };
169
170                         eeprom@54 {
171                                 compatible = "atmel,24c08";
172                                 reg = <0x54>;
173                                 pagesize = <16>;
174                         };
175                 };
176
177                 i2c@119000 {
178                         status = "disabled";
179                 };
180
181                 i2c@119100 {
182                         status = "disabled";
183                 };
184
185                 serial2: serial@11d500 {
186                         status = "disabled";
187                 };
188
189                 serial3: serial@11d600 {
190                         status = "disabled";
191                 };
192
193                 usb0: usb@210000 {
194                         status = "disabled";
195                 };
196                 usb1: usb@211000 {
197                         status = "disabled";
198                 };
199
200                 display@180000 {
201                         status = "disabled";
202                 };
203
204                 sata@220000 {
205                         status = "disabled";
206                 };
207                 sata@221000 {
208                         status = "disabled";
209                 };
210
211                 fman@400000 {
212                         ethernet@e0000 {
213                                 phy-mode = "sgmii";
214                                 fixed-link {
215                                         speed = <1000>;
216                                         full-duplex;
217                                 };
218                         };
219
220                         ethernet@e2000 {
221                                 phy-mode = "sgmii";
222                                 fixed-link {
223                                         speed = <1000>;
224                                         full-duplex;
225                                 };
226                         };
227
228                         ethernet@e4000 {
229                                 status = "disabled";
230                         };
231
232                         ethernet@e6000 {
233                                 status = "disabled";
234                         };
235
236                         ethernet@e8000 {
237                                 phy-handle = <&front_phy>;
238                                 phy-mode = "rgmii-id";
239                         };
240
241                         mdio0: mdio@fc000 {
242                                 front_phy: ethernet-phy@11 {
243                                         reg = <0x11>;
244                                 };
245                         };
246                 };
247         };
248
249         pci0: pcie@ffe240000 {
250                 reg = <0xf 0xfe240000 0 0x10000>;
251                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
252                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
253                 pcie@0 {
254                         ranges = <0x02000000 0 0xe0000000
255                                   0x02000000 0 0xe0000000
256                                   0 0x20000000
257
258                                   0x01000000 0 0x00000000
259                                   0x01000000 0 0x00000000
260                                   0 0x00010000>;
261                 };
262         };
263
264         pci1: pcie@ffe250000 {
265                 status = "disabled";
266                 reg = <0xf 0xfe250000 0 0x10000>;
267                 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
268                           0x01000000 0 0 0xf 0xf8010000 0 0x00010000>;
269                 pcie@0 {
270                         ranges = <0x02000000 0 0xe0000000
271                                   0x02000000 0 0xe0000000
272                                   0 0x10000000
273
274                                   0x01000000 0 0x00000000
275                                   0x01000000 0 0x00000000
276                                   0 0x00010000>;
277                 };
278         };
279
280         pci2: pcie@ffe260000 {
281                 status = "disabled";
282                 reg = <0xf 0xfe260000 0 0x10000>;
283                 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
284                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
285                 pcie@0 {
286                         ranges = <0x02000000 0 0xe0000000
287                                   0x02000000 0 0xe0000000
288                                   0 0x10000000
289
290                                   0x01000000 0 0x00000000
291                                   0x01000000 0 0x00000000
292                                   0 0x00010000>;
293                 };
294         };
295
296         pci3: pcie@ffe270000 {
297                 status = "disabled";
298                 reg = <0xf 0xfe270000 0 0x10000>;
299                 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
300                           0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
301                 pcie@0 {
302                         ranges = <0x02000000 0 0xe0000000
303                                   0x02000000 0 0xe0000000
304                                   0 0x10000000
305
306                                   0x01000000 0 0x00000000
307                                   0x01000000 0 0x00000000
308                                   0 0x00010000>;
309                 };
310         };
311
312         qe: qe@ffe140000 {
313                 ranges = <0x0 0xf 0xfe140000 0x40000>;
314                 reg = <0xf 0xfe140000 0 0x480>;
315                 brg-frequency = <0>;
316                 bus-frequency = <0>;
317
318                 si1: si@700 {
319                         compatible = "fsl,t1040-qe-si";
320                         reg = <0x700 0x80>;
321                 };
322
323                 siram1: siram@1000 {
324                         compatible = "fsl,t1040-qe-siram";
325                         reg = <0x1000 0x800>;
326                 };
327
328                 ucc_hdlc: ucc@2000 {
329                         device_type = "hdlc";
330                         compatible = "fsl,ucc-hdlc";
331                         rx-clock-name = "clk9";
332                         tx-clock-name = "clk9";
333                         fsl,hdlc-bus;
334                 };
335         };
336 };
337
338 #include "t1040si-post.dtsi"
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