board/cloos/imx8mm_phg/spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #include <command.h>
   7 #include <cpu_func.h>
   8 #include <hang.h>
   9 #include <image.h>
  10 #include <init.h>
  11 #include <log.h>
  12 #include <spl.h>
  13 #include <asm/global_data.h>
  14 #include <asm/io.h>
  15 #include <asm/mach-imx/iomux-v3.h>
  16 #include <asm/arch/clock.h>
  17 #include <asm/arch/imx8mm_pins.h>
  18 #include <asm/arch/sys_proto.h>
  19 #include <asm/mach-imx/boot_mode.h>
  20 #include <asm/arch/ddr.h>
  21 #include <asm/sections.h>
  22
  23 #include <dm/uclass.h>
  24 #include <dm/device.h>
  25 #include <dm/uclass-internal.h>
  26 #include <dm/device-internal.h>
  27
  28 #include <power/pmic.h>
  29 #include <power/pca9450.h>
  30
  31 DECLARE_GLOBAL_DATA_PTR;
  32
  33 int spl_board_boot_device(enum boot_device boot_dev_spl)
  34 {
  35         switch (boot_dev_spl) {
  36         case USB_BOOT:
  37                 return BOOT_DEVICE_BOARD;
  38         case SD2_BOOT:
  39         case MMC2_BOOT:
  40                 return BOOT_DEVICE_MMC1;
  41         case SD3_BOOT:
  42         case MMC3_BOOT:
  43                 return BOOT_DEVICE_MMC2;
  44         default:
  45                 return BOOT_DEVICE_NONE;
  46         }
  47 }
  48
  49 static void spl_dram_init(void)
  50 {
  51         ddr_init(&dram_timing);
  52 }
  53
  54 void spl_board_init(void)
  55 {
  56         if (is_usb_boot())
  57                 puts("USB Boot\n");
  58         else
  59                 puts("Normal Boot\n");
  60 }
  61
  62 #ifdef CONFIG_SPL_LOAD_FIT
  63 int board_fit_config_name_match(const char *name)
  64 {
  65         /* Just empty function now - can't decide what to choose */
  66         debug("%s: %s\n", __func__, name);
  67
  68         return 0;
  69 }
  70 #endif
  71
  72 static int power_init_board(void)
  73 {
  74         struct udevice *dev;
  75         int ret;
  76
  77         ret = pmic_get("pmic@25", &dev);
  78         if (ret == -ENODEV) {
  79                 puts("No pmic\n");
  80                 return 0;
  81         }
  82         if (ret != 0)
  83                 return ret;
  84
  85         /* BUCKxOUT_DVS0/1 control BUCK123 output */
  86         pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
  87
  88         /* Buck 1 DVS control through PMIC_STBY_REQ */
  89         pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
  90
  91         /* Set DVS1 to 0.8V for suspend */
  92         pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x10);
  93
  94         /* increase VDD_DRAM to 0.95V for 3GHz DDR */
  95         pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1C);
  96
  97         /* VDD_DRAM needs off in suspend, set B1_ENMODE=10 (ON by PMIC_ON_REQ = H && PMIC_STBY_REQ = L) */
  98         pmic_reg_write(dev, PCA9450_BUCK3CTRL, 0x4a);
  99
 100         /* set VDD_SNVS_0V8 from default 0.85V */
 101         pmic_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
 102
 103         /* set WDOG_B_CFG to cold reset */
 104         pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
 105
 106         return 0;
 107 }
 108
 109 void board_init_f(ulong dummy)
 110 {
 111         struct udevice *dev;
 112         int ret;
 113
 114         arch_cpu_init();
 115
 116         init_uart_clk(1);
 117
 118         timer_init();
 119
 120         /* Clear the BSS. */
 121         memset(__bss_start, 0, __bss_end - __bss_start);
 122
 123         ret = spl_early_init();
 124         if (ret) {
 125                 debug("spl_early_init() failed: %d\n", ret);
 126                 hang();
 127         }
 128
 129         ret = uclass_get_device_by_name(UCLASS_CLK,
 130                                         "clock-controller@30380000",
 131                                         &dev);
 132         if (ret < 0) {
 133                 printf("Failed to find clock node. Check device tree\n");
 134                 hang();
 135         }
 136
 137         preloader_console_init();
 138
 139         enable_tzc380();
 140
 141         power_init_board();
 142
 143         /* DDR initialization */
 144         spl_dram_init();
 145
 146         board_init_r(NULL, 0);
 147 }