drivers/video/rockchip/rk3399_vop.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
   4  * Copyright (c) 2015 Google, Inc
   5  * Copyright 2014 Rockchip Inc.
   6  */
   7
   8 #include <common.h>
   9 #include <display.h>
  10 #include <dm.h>
  11 #include <log.h>
  12 #include <regmap.h>
  13 #include <video.h>
  14 #include <asm/arch-rockchip/hardware.h>
  15 #include <asm/io.h>
  16 #include "rk_vop.h"
  17
  18 DECLARE_GLOBAL_DATA_PTR;
  19
  20 static void rk3399_set_pin_polarity(struct udevice *dev,
  21                                     enum vop_modes mode, u32 polarity)
  22 {
  23         struct rk_vop_priv *priv = dev_get_priv(dev);
  24         struct rk3288_vop *regs = priv->regs;
  25
  26         /*
  27          * The RK3399 VOPs (v3.5 and v3.6) require a per-mode setting of
  28          * the polarity configuration (in ctrl1).
  29          */
  30         switch (mode) {
  31         case VOP_MODE_HDMI:
  32                 clrsetbits_le32(&regs->dsp_ctrl1,
  33                                 M_RK3399_DSP_HDMI_POL,
  34                                 V_RK3399_DSP_HDMI_POL(polarity));
  35                 break;
  36
  37         case VOP_MODE_EDP:
  38                 clrsetbits_le32(&regs->dsp_ctrl1,
  39                                 M_RK3399_DSP_EDP_POL,
  40                                 V_RK3399_DSP_EDP_POL(polarity));
  41                 break;
  42
  43         case VOP_MODE_MIPI:
  44                 clrsetbits_le32(&regs->dsp_ctrl1,
  45                                 M_RK3399_DSP_MIPI_POL,
  46                                 V_RK3399_DSP_MIPI_POL(polarity));
  47                 break;
  48
  49         default:
  50                 debug("%s: unsupported output mode %x\n", __func__, mode);
  51         }
  52 }
  53
  54 /*
  55  * Try some common regulators. We should really get these from the
  56  * device tree somehow.
  57  */
  58 static const char * const rk3399_regulator_names[] = {
  59         "vcc33_lcd"
  60 };
  61
  62 static int rk3399_vop_probe(struct udevice *dev)
  63 {
  64         /* Before relocation we don't need to do anything */
  65         if (!(gd->flags & GD_FLG_RELOC))
  66                 return 0;
  67
  68         /* Probe regulators required for the RK3399 VOP */
  69         rk_vop_probe_regulators(dev, rk3399_regulator_names,
  70                                 ARRAY_SIZE(rk3399_regulator_names));
  71
  72         return rk_vop_probe(dev);
  73 }
  74
  75 struct rkvop_driverdata rk3399_lit_driverdata = {
  76         .set_pin_polarity = rk3399_set_pin_polarity,
  77 };
  78
  79 struct rkvop_driverdata rk3399_big_driverdata = {
  80         .features = VOP_FEATURE_OUTPUT_10BIT,
  81         .set_pin_polarity = rk3399_set_pin_polarity,
  82 };
  83
  84 static const struct udevice_id rk3399_vop_ids[] = {
  85         { .compatible = "rockchip,rk3399-vop-big",
  86           .data = (ulong)&rk3399_big_driverdata },
  87         { .compatible = "rockchip,rk3399-vop-lit",
  88           .data = (ulong)&rk3399_lit_driverdata },
  89         { }
  90 };
  91
  92 static const struct video_ops rk3399_vop_ops = {
  93 };
  94
  95 U_BOOT_DRIVER(rk3399_vop) = {
  96         .name   = "rk3399_vop",
  97         .id     = UCLASS_VIDEO,
  98         .of_match = rk3399_vop_ids,
  99         .ops    = &rk3399_vop_ops,
 100         .bind   = rk_vop_bind,
 101         .probe  = rk3399_vop_probe,
 102         .priv_auto_alloc_size   = sizeof(struct rk_vop_priv),
 103 };