1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
14 #include <dm/of_extra.h>
18 #include <fdt_support.h>
21 #include <linux/libfdt.h>
23 #include <asm/sections.h>
24 #include <linux/ctype.h>
25 #include <linux/lzo.h>
27 DECLARE_GLOBAL_DATA_PTR;
30 * Here are the type we know about. One day we might allow drivers to
31 * register. For now we just put them here. The COMPAT macro allows us to
32 * turn this into a sparse list later, and keeps the ID with the name.
34 * NOTE: This list is basically a TODO list for things that need to be
35 * converted to driver model. So don't add new things here unless there is a
36 * good reason why driver-model conversion is infeasible. Examples include
37 * things which are used before driver model is available.
39 #define COMPAT(id, name) name
40 static const char * const compat_names[COMPAT_COUNT] = {
41 COMPAT(UNKNOWN, "<none>"),
42 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
43 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
44 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
45 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
46 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
47 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
48 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
49 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
50 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
51 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
52 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
53 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
54 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
55 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
56 COMPAT(INTEL_MICROCODE, "intel,microcode"),
57 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
58 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
59 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
60 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
61 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
62 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
63 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
64 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
65 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
66 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
67 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
68 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
73 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
74 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
75 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
78 const char *fdtdec_get_compatible(enum fdt_compat_id id)
80 /* We allow reading of the 'unknown' ID for testing purposes */
81 assert(id >= 0 && id < COMPAT_COUNT);
82 return compat_names[id];
85 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
86 const char *prop_name, int index, int na,
87 int ns, fdt_size_t *sizep,
90 const fdt32_t *prop, *prop_end;
91 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
95 debug("%s: %s: ", __func__, prop_name);
97 prop = fdt_getprop(blob, node, prop_name, &len);
99 debug("(not found)\n");
100 return FDT_ADDR_T_NONE;
102 prop_end = prop + (len / sizeof(*prop));
104 prop_addr = prop + (index * (na + ns));
105 prop_size = prop_addr + na;
106 prop_after_size = prop_size + ns;
107 if (prop_after_size > prop_end) {
108 debug("(not enough data: expected >= %d cells, got %d cells)\n",
109 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
110 return FDT_ADDR_T_NONE;
113 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
115 addr = fdt_translate_address(blob, node, prop_addr);
118 addr = fdtdec_get_number(prop_addr, na);
121 *sizep = fdtdec_get_number(prop_size, ns);
122 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
123 (unsigned long long)*sizep);
125 debug("addr=%08llx\n", (unsigned long long)addr);
131 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
132 int node, const char *prop_name,
133 int index, fdt_size_t *sizep,
138 debug("%s: ", __func__);
140 na = fdt_address_cells(blob, parent);
142 debug("(bad #address-cells)\n");
143 return FDT_ADDR_T_NONE;
146 ns = fdt_size_cells(blob, parent);
148 debug("(bad #size-cells)\n");
149 return FDT_ADDR_T_NONE;
152 debug("na=%d, ns=%d, ", na, ns);
154 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
155 ns, sizep, translate);
158 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
159 const char *prop_name, int index,
165 debug("%s: ", __func__);
167 parent = fdt_parent_offset(blob, node);
169 debug("(no parent found)\n");
170 return FDT_ADDR_T_NONE;
173 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
174 index, sizep, translate);
177 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
178 const char *prop_name, fdt_size_t *sizep)
180 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
182 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
183 sizeof(fdt_addr_t) / sizeof(fdt32_t),
187 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
189 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
192 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
193 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
195 const char *list, *end;
198 list = fdt_getprop(blob, node, "compatible", &len);
205 if (len >= strlen("pciVVVV,DDDD")) {
206 char *s = strstr(list, "pci");
209 * check if the string is something like pciVVVV,DDDD.RR
210 * or just pciVVVV,DDDD
212 if (s && s[7] == ',' &&
213 (s[12] == '.' || s[12] == 0)) {
215 *vendor = simple_strtol(s, NULL, 16);
218 *device = simple_strtol(s, NULL, 16);
229 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
234 /* extract the bar number from fdt_pci_addr */
235 barnum = addr->phys_hi & 0xff;
236 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
239 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
240 *bar = dm_pci_read_bar32(dev, barnum);
246 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
247 uint64_t default_val)
249 const unaligned_fdt64_t *cell64;
252 cell64 = fdt_getprop(blob, node, prop_name, &length);
253 if (!cell64 || length < sizeof(*cell64))
256 return fdt64_to_cpu(*cell64);
259 int fdtdec_get_is_enabled(const void *blob, int node)
264 * It should say "okay", so only allow that. Some fdts use "ok" but
265 * this is a bug. Please fix your device tree source file. See here
270 cell = fdt_getprop(blob, node, "status", NULL);
272 return strcmp(cell, "okay") == 0;
276 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
278 enum fdt_compat_id id;
280 /* Search our drivers */
281 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
282 if (fdt_node_check_compatible(blob, node,
283 compat_names[id]) == 0)
285 return COMPAT_UNKNOWN;
288 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
290 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
293 int fdtdec_next_compatible_subnode(const void *blob, int node,
294 enum fdt_compat_id id, int *depthp)
297 node = fdt_next_node(blob, node, depthp);
298 } while (*depthp > 1);
300 /* If this is a direct subnode, and compatible, return it */
301 if (*depthp == 1 && 0 == fdt_node_check_compatible(
302 blob, node, compat_names[id]))
305 return -FDT_ERR_NOTFOUND;
308 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
311 #define MAX_STR_LEN 20
312 char str[MAX_STR_LEN + 20];
315 /* snprintf() is not available */
316 assert(strlen(name) < MAX_STR_LEN);
317 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
318 node = fdt_path_offset(blob, str);
321 err = fdt_node_check_compatible(blob, node, compat_names[id]);
325 return -FDT_ERR_NOTFOUND;
330 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
331 enum fdt_compat_id id, int *node_list,
334 memset(node_list, '\0', sizeof(*node_list) * maxcount);
336 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
339 /* TODO: Can we tighten this code up a little? */
340 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
341 enum fdt_compat_id id, int *node_list,
344 int name_len = strlen(name);
352 /* find the alias node if present */
353 alias_node = fdt_path_offset(blob, "/aliases");
356 * start with nothing, and we can assume that the root node can't
359 memset(nodes, '\0', sizeof(nodes));
361 /* First find all the compatible nodes */
362 for (node = count = 0; node >= 0 && count < maxcount;) {
363 node = fdtdec_next_compatible(blob, node, id);
365 nodes[count++] = node;
368 debug("%s: warning: maxcount exceeded with alias '%s'\n",
371 /* Now find all the aliases */
372 for (offset = fdt_first_property_offset(blob, alias_node);
374 offset = fdt_next_property_offset(blob, offset)) {
375 const struct fdt_property *prop;
381 prop = fdt_get_property_by_offset(blob, offset, NULL);
382 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
383 if (prop->len && 0 == strncmp(path, name, name_len))
384 node = fdt_path_offset(blob, prop->data);
388 /* Get the alias number */
389 number = simple_strtoul(path + name_len, NULL, 10);
390 if (number < 0 || number >= maxcount) {
391 debug("%s: warning: alias '%s' is out of range\n",
396 /* Make sure the node we found is actually in our list! */
398 for (j = 0; j < count; j++)
399 if (nodes[j] == node) {
405 debug("%s: warning: alias '%s' points to a node "
406 "'%s' that is missing or is not compatible "
407 " with '%s'\n", __func__, path,
408 fdt_get_name(blob, node, NULL),
414 * Add this node to our list in the right place, and mark
417 if (fdtdec_get_is_enabled(blob, node)) {
418 if (node_list[number]) {
419 debug("%s: warning: alias '%s' requires that "
420 "a node be placed in the list in a "
421 "position which is already filled by "
422 "node '%s'\n", __func__, path,
423 fdt_get_name(blob, node, NULL));
426 node_list[number] = node;
427 if (number >= num_found)
428 num_found = number + 1;
433 /* Add any nodes not mentioned by an alias */
434 for (i = j = 0; i < maxcount; i++) {
436 for (; j < maxcount; j++)
438 fdtdec_get_is_enabled(blob, nodes[j]))
441 /* Have we run out of nodes to add? */
445 assert(!node_list[i]);
446 node_list[i] = nodes[j++];
455 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
458 int base_len = strlen(base);
459 const char *find_name;
464 find_name = fdt_get_name(blob, offset, &find_namelen);
465 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
467 aliases = fdt_path_offset(blob, "/aliases");
468 for (prop_offset = fdt_first_property_offset(blob, aliases);
470 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
476 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
477 debug(" - %s, %s\n", name, prop);
478 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
479 strncmp(name, base, base_len))
482 slash = strrchr(prop, '/');
483 if (strcmp(slash + 1, find_name))
485 val = trailing_strtol(name);
488 debug("Found seq %d\n", *seqp);
493 debug("Not found\n");
497 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
499 int base_len = strlen(base);
504 debug("Looking for highest alias id for '%s'\n", base);
506 aliases = fdt_path_offset(blob, "/aliases");
507 for (prop_offset = fdt_first_property_offset(blob, aliases);
509 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
514 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
515 debug(" - %s, %s\n", name, prop);
516 if (*prop != '/' || prop[len - 1] ||
517 strncmp(name, base, base_len))
520 val = trailing_strtol(name);
522 debug("Found seq %d\n", val);
530 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
536 chosen_node = fdt_path_offset(blob, "/chosen");
537 return fdt_getprop(blob, chosen_node, name, NULL);
540 int fdtdec_get_chosen_node(const void *blob, const char *name)
544 prop = fdtdec_get_chosen_prop(blob, name);
546 return -FDT_ERR_NOTFOUND;
547 return fdt_path_offset(blob, prop);
550 int fdtdec_check_fdt(void)
553 * We must have an FDT, but we cannot panic() yet since the console
554 * is not ready. So for now, just assert(). Boards which need an early
555 * FDT (prior to console ready) will need to make their own
556 * arrangements and do their own checks.
558 assert(!fdtdec_prepare_fdt());
563 * This function is a little odd in that it accesses global data. At some
564 * point if the architecture board.c files merge this will make more sense.
565 * Even now, it is common code.
567 int fdtdec_prepare_fdt(void)
569 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
570 fdt_check_header(gd->fdt_blob)) {
571 #ifdef CONFIG_SPL_BUILD
572 puts("Missing DTB\n");
574 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
577 printf("fdt_blob=%p\n", gd->fdt_blob);
578 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
588 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
593 debug("%s: %s\n", __func__, prop_name);
594 phandle = fdt_getprop(blob, node, prop_name, NULL);
596 return -FDT_ERR_NOTFOUND;
598 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
603 * Look up a property in a node and check that it has a minimum length.
605 * @param blob FDT blob
606 * @param node node to examine
607 * @param prop_name name of property to find
608 * @param min_len minimum property length in bytes
609 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
610 found, or -FDT_ERR_BADLAYOUT if not enough data
611 * @return pointer to cell, which is only valid if err == 0
613 static const void *get_prop_check_min_len(const void *blob, int node,
614 const char *prop_name, int min_len,
620 debug("%s: %s\n", __func__, prop_name);
621 cell = fdt_getprop(blob, node, prop_name, &len);
623 *err = -FDT_ERR_NOTFOUND;
624 else if (len < min_len)
625 *err = -FDT_ERR_BADLAYOUT;
631 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
632 u32 *array, int count)
637 debug("%s: %s\n", __func__, prop_name);
638 cell = get_prop_check_min_len(blob, node, prop_name,
639 sizeof(u32) * count, &err);
643 for (i = 0; i < count; i++)
644 array[i] = fdt32_to_cpu(cell[i]);
649 int fdtdec_get_int_array_count(const void *blob, int node,
650 const char *prop_name, u32 *array, int count)
656 debug("%s: %s\n", __func__, prop_name);
657 cell = fdt_getprop(blob, node, prop_name, &len);
659 return -FDT_ERR_NOTFOUND;
660 elems = len / sizeof(u32);
663 for (i = 0; i < count; i++)
664 array[i] = fdt32_to_cpu(cell[i]);
669 const u32 *fdtdec_locate_array(const void *blob, int node,
670 const char *prop_name, int count)
675 cell = get_prop_check_min_len(blob, node, prop_name,
676 sizeof(u32) * count, &err);
677 return err ? NULL : cell;
680 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
685 debug("%s: %s\n", __func__, prop_name);
686 cell = fdt_getprop(blob, node, prop_name, &len);
690 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
691 const char *list_name,
692 const char *cells_name,
693 int cell_count, int index,
694 struct fdtdec_phandle_args *out_args)
696 const __be32 *list, *list_end;
697 int rc = 0, size, cur_index = 0;
702 /* Retrieve the phandle list property */
703 list = fdt_getprop(blob, src_node, list_name, &size);
706 list_end = list + size / sizeof(*list);
708 /* Loop over the phandles until all the requested entry is found */
709 while (list < list_end) {
714 * If phandle is 0, then it is an empty entry with no
715 * arguments. Skip forward to the next entry.
717 phandle = be32_to_cpup(list++);
720 * Find the provider node and parse the #*-cells
721 * property to determine the argument length.
723 * This is not needed if the cell count is hard-coded
724 * (i.e. cells_name not set, but cell_count is set),
725 * except when we're going to return the found node
728 if (cells_name || cur_index == index) {
729 node = fdt_node_offset_by_phandle(blob,
732 debug("%s: could not find phandle\n",
733 fdt_get_name(blob, src_node,
740 count = fdtdec_get_int(blob, node, cells_name,
743 debug("%s: could not get %s for %s\n",
744 fdt_get_name(blob, src_node,
747 fdt_get_name(blob, node,
756 * Make sure that the arguments actually fit in the
757 * remaining property data length
759 if (list + count > list_end) {
760 debug("%s: arguments longer than property\n",
761 fdt_get_name(blob, src_node, NULL));
767 * All of the error cases above bail out of the loop, so at
768 * this point, the parsing is successful. If the requested
769 * index matches, then fill the out_args structure and return,
770 * or return -ENOENT for an empty entry.
773 if (cur_index == index) {
780 if (count > MAX_PHANDLE_ARGS) {
781 debug("%s: too many arguments %d\n",
782 fdt_get_name(blob, src_node,
784 count = MAX_PHANDLE_ARGS;
786 out_args->node = node;
787 out_args->args_count = count;
788 for (i = 0; i < count; i++) {
790 be32_to_cpup(list++);
794 /* Found it! return success */
804 * Result will be one of:
805 * -ENOENT : index is for empty phandle
806 * -EINVAL : parsing error on data
807 * [1..n] : Number of phandle (count mode; when index = -1)
809 rc = index < 0 ? cur_index : -ENOENT;
814 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
815 u8 *array, int count)
820 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
822 memcpy(array, cell, count);
826 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
827 const char *prop_name, int count)
832 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
838 int fdtdec_get_config_int(const void *blob, const char *prop_name,
843 debug("%s: %s\n", __func__, prop_name);
844 config_node = fdt_path_offset(blob, "/config");
847 return fdtdec_get_int(blob, config_node, prop_name, default_val);
850 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
855 debug("%s: %s\n", __func__, prop_name);
856 config_node = fdt_path_offset(blob, "/config");
859 prop = fdt_get_property(blob, config_node, prop_name, NULL);
864 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
870 debug("%s: %s\n", __func__, prop_name);
871 nodeoffset = fdt_path_offset(blob, "/config");
875 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
879 return (char *)nodep;
882 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
887 number = (number << 32) | fdt32_to_cpu(*ptr++);
892 int fdt_get_resource(const void *fdt, int node, const char *property,
893 unsigned int index, struct fdt_resource *res)
895 const fdt32_t *ptr, *end;
896 int na, ns, len, parent;
899 parent = fdt_parent_offset(fdt, node);
903 na = fdt_address_cells(fdt, parent);
904 ns = fdt_size_cells(fdt, parent);
906 ptr = fdt_getprop(fdt, node, property, &len);
910 end = ptr + len / sizeof(*ptr);
912 while (ptr + na + ns <= end) {
914 res->start = fdtdec_get_number(ptr, na);
915 res->end = res->start;
916 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
924 return -FDT_ERR_NOTFOUND;
927 int fdt_get_named_resource(const void *fdt, int node, const char *property,
928 const char *prop_names, const char *name,
929 struct fdt_resource *res)
933 index = fdt_stringlist_search(fdt, node, prop_names, name);
937 return fdt_get_resource(fdt, node, property, index, res);
940 static int decode_timing_property(const void *blob, int node, const char *name,
941 struct timing_entry *result)
946 prop = fdt_getprop(blob, node, name, &length);
948 debug("%s: could not find property %s\n",
949 fdt_get_name(blob, node, NULL), name);
953 if (length == sizeof(u32)) {
954 result->typ = fdtdec_get_int(blob, node, name, 0);
955 result->min = result->typ;
956 result->max = result->typ;
958 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
964 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
965 struct display_timing *dt)
967 int i, node, timings_node;
971 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
972 if (timings_node < 0)
975 for (i = 0, node = fdt_first_subnode(blob, timings_node);
976 node > 0 && i != index;
977 node = fdt_next_subnode(blob, node))
983 memset(dt, 0, sizeof(*dt));
985 ret |= decode_timing_property(blob, node, "hback-porch",
987 ret |= decode_timing_property(blob, node, "hfront-porch",
989 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
990 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
991 ret |= decode_timing_property(blob, node, "vback-porch",
993 ret |= decode_timing_property(blob, node, "vfront-porch",
995 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
996 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
997 ret |= decode_timing_property(blob, node, "clock-frequency",
1001 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1003 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1004 DISPLAY_FLAGS_VSYNC_LOW;
1006 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1008 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1009 DISPLAY_FLAGS_HSYNC_LOW;
1011 val = fdtdec_get_int(blob, node, "de-active", -1);
1013 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1014 DISPLAY_FLAGS_DE_LOW;
1016 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1018 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1019 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1022 if (fdtdec_get_bool(blob, node, "interlaced"))
1023 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1024 if (fdtdec_get_bool(blob, node, "doublescan"))
1025 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1026 if (fdtdec_get_bool(blob, node, "doubleclk"))
1027 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1032 int fdtdec_setup_mem_size_base_fdt(const void *blob)
1035 struct fdt_resource res;
1037 mem = fdt_path_offset(blob, "/memory");
1039 debug("%s: Missing /memory node\n", __func__);
1043 ret = fdt_get_resource(blob, mem, "reg", 0, &res);
1045 debug("%s: Unable to decode first memory bank\n", __func__);
1049 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1050 gd->ram_base = (unsigned long)res.start;
1051 debug("%s: Initial DRAM size %llx\n", __func__,
1052 (unsigned long long)gd->ram_size);
1057 int fdtdec_setup_mem_size_base(void)
1059 return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
1062 #if defined(CONFIG_NR_DRAM_BANKS)
1064 static int get_next_memory_node(const void *blob, int mem)
1067 mem = fdt_node_offset_by_prop_value(blob, mem,
1068 "device_type", "memory", 7);
1069 } while (!fdtdec_get_is_enabled(blob, mem));
1074 int fdtdec_setup_memory_banksize_fdt(const void *blob)
1076 int bank, ret, mem, reg = 0;
1077 struct fdt_resource res;
1079 mem = get_next_memory_node(blob, -1);
1081 debug("%s: Missing /memory node\n", __func__);
1085 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1086 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1087 if (ret == -FDT_ERR_NOTFOUND) {
1089 mem = get_next_memory_node(blob, mem);
1090 if (mem == -FDT_ERR_NOTFOUND)
1093 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1094 if (ret == -FDT_ERR_NOTFOUND)
1101 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1102 gd->bd->bi_dram[bank].size =
1103 (phys_size_t)(res.end - res.start + 1);
1105 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1107 (unsigned long long)gd->bd->bi_dram[bank].start,
1108 (unsigned long long)gd->bd->bi_dram[bank].size);
1114 int fdtdec_setup_memory_banksize(void)
1116 return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
1121 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1122 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1123 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1124 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1126 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1127 bool gzip = 0, lzo = 0;
1128 ulong sz_in = sz_src;
1132 if (CONFIG_IS_ENABLED(GZIP))
1133 if (gzip_parse_header(src, sz_in) >= 0)
1135 if (CONFIG_IS_ENABLED(LZO))
1136 if (!gzip && lzop_is_valid_header(src))
1143 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1144 dst = malloc(sz_out);
1146 puts("uncompress_blob: Unable to allocate memory\n");
1150 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1151 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1157 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1158 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1159 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1160 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1165 /* not a valid compressed blob */
1166 puts("uncompress_blob: Unable to uncompress\n");
1167 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1175 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1177 *dstp = (void *)src;
1183 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1185 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1186 * provide and/or fixup the fdt.
1188 __weak void *board_fdt_blob_setup(void)
1190 void *fdt_blob = NULL;
1191 #ifdef CONFIG_SPL_BUILD
1192 /* FDT is at end of BSS unless it is in a different memory region */
1193 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1194 fdt_blob = (ulong *)&_image_binary_end;
1196 fdt_blob = (ulong *)&__bss_end;
1198 /* FDT is at end of image */
1199 fdt_blob = (ulong *)&_end;
1205 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1210 if (!is_valid_ethaddr(mac))
1213 path = fdt_get_alias(fdt, "ethernet");
1217 debug("ethernet alias found: %s\n", path);
1219 offset = fdt_path_offset(fdt, path);
1221 debug("ethernet alias points to absent node %s\n", path);
1225 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1229 debug("MAC address: %pM\n", mac);
1234 static int fdtdec_init_reserved_memory(void *blob)
1236 int na, ns, node, err;
1239 /* inherit #address-cells and #size-cells from the root node */
1240 na = fdt_address_cells(blob, 0);
1241 ns = fdt_size_cells(blob, 0);
1243 node = fdt_add_subnode(blob, 0, "reserved-memory");
1247 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1251 value = cpu_to_fdt32(ns);
1253 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1257 value = cpu_to_fdt32(na);
1259 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1266 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1267 const struct fdt_memory *carveout,
1270 fdt32_t cells[4] = {}, *ptr = cells;
1271 uint32_t upper, lower, phandle;
1272 int parent, node, na, ns, err;
1276 /* create an empty /reserved-memory node if one doesn't exist */
1277 parent = fdt_path_offset(blob, "/reserved-memory");
1279 parent = fdtdec_init_reserved_memory(blob);
1284 /* only 1 or 2 #address-cells and #size-cells are supported */
1285 na = fdt_address_cells(blob, parent);
1286 if (na < 1 || na > 2)
1287 return -FDT_ERR_BADNCELLS;
1289 ns = fdt_size_cells(blob, parent);
1290 if (ns < 1 || ns > 2)
1291 return -FDT_ERR_BADNCELLS;
1293 /* find a matching node and return the phandle to that */
1294 fdt_for_each_subnode(node, blob, parent) {
1295 const char *name = fdt_get_name(blob, node, NULL);
1296 phys_addr_t addr, size;
1298 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
1299 if (addr == FDT_ADDR_T_NONE) {
1300 debug("failed to read address/size for %s\n", name);
1304 if (addr == carveout->start && (addr + size - 1) ==
1307 *phandlep = fdt_get_phandle(blob, node);
1313 * Unpack the start address and generate the name of the new node
1314 * base on the basename and the unit-address.
1316 upper = upper_32_bits(carveout->start);
1317 lower = lower_32_bits(carveout->start);
1319 if (na > 1 && upper > 0)
1320 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1324 debug("address %08x:%08x exceeds addressable space\n",
1326 return -FDT_ERR_BADVALUE;
1329 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1332 node = fdt_add_subnode(blob, parent, name);
1337 err = fdt_generate_phandle(blob, &phandle);
1341 err = fdtdec_set_phandle(blob, node, phandle);
1346 /* store one or two address cells */
1348 *ptr++ = cpu_to_fdt32(upper);
1350 *ptr++ = cpu_to_fdt32(lower);
1352 /* store one or two size cells */
1353 size = carveout->end - carveout->start + 1;
1354 upper = upper_32_bits(size);
1355 lower = lower_32_bits(size);
1358 *ptr++ = cpu_to_fdt32(upper);
1360 *ptr++ = cpu_to_fdt32(lower);
1362 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1366 /* return the phandle for the new node for the caller to use */
1368 *phandlep = phandle;
1373 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1374 unsigned int index, struct fdt_memory *carveout)
1376 const fdt32_t *prop;
1381 offset = fdt_path_offset(blob, node);
1385 prop = fdt_getprop(blob, offset, name, &len);
1387 debug("failed to get %s for %s\n", name, node);
1388 return -FDT_ERR_NOTFOUND;
1391 if ((len % sizeof(phandle)) != 0) {
1392 debug("invalid phandle property\n");
1393 return -FDT_ERR_BADPHANDLE;
1396 if (len < (sizeof(phandle) * (index + 1))) {
1397 debug("invalid phandle index\n");
1398 return -FDT_ERR_BADPHANDLE;
1401 phandle = fdt32_to_cpu(prop[index]);
1403 offset = fdt_node_offset_by_phandle(blob, phandle);
1405 debug("failed to find node for phandle %u\n", phandle);
1409 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1412 if (carveout->start == FDT_ADDR_T_NONE) {
1413 debug("failed to read address/size from \"reg\" property\n");
1414 return -FDT_ERR_NOTFOUND;
1417 carveout->end = carveout->start + size - 1;
1422 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1423 unsigned int index, const char *name,
1424 const struct fdt_memory *carveout)
1427 int err, offset, len;
1431 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
1433 debug("failed to add reserved memory: %d\n", err);
1437 offset = fdt_path_offset(blob, node);
1439 debug("failed to find offset for node %s: %d\n", node, offset);
1443 value = cpu_to_fdt32(phandle);
1445 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1446 if (len == -FDT_ERR_NOTFOUND)
1452 if ((index + 1) * sizeof(value) > len) {
1453 err = fdt_setprop_placeholder(blob, offset, prop_name,
1454 (index + 1) * sizeof(value),
1457 debug("failed to resize reserved memory property: %s\n",
1463 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1465 index * sizeof(value),
1466 &value, sizeof(value));
1468 debug("failed to update %s property for node %s: %s\n",
1469 prop_name, node, fdt_strerror(err));
1476 int fdtdec_setup(void)
1478 #if CONFIG_IS_ENABLED(OF_CONTROL)
1479 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1482 # ifdef CONFIG_OF_EMBED
1483 /* Get a pointer to the FDT */
1484 # ifdef CONFIG_SPL_BUILD
1485 gd->fdt_blob = __dtb_dt_spl_begin;
1487 gd->fdt_blob = __dtb_dt_begin;
1489 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1490 /* Allow the board to override the fdt address. */
1491 gd->fdt_blob = board_fdt_blob_setup();
1492 # elif defined(CONFIG_OF_HOSTFILE)
1493 if (sandbox_read_fdt_from_file()) {
1494 puts("Failed to read control FDT\n");
1497 # elif defined(CONFIG_OF_PRIOR_STAGE)
1498 gd->fdt_blob = (void *)prior_stage_fdt_address;
1500 # ifndef CONFIG_SPL_BUILD
1501 /* Allow the early environment to override the fdt address */
1502 gd->fdt_blob = map_sysmem
1503 (env_get_ulong("fdtcontroladdr", 16,
1504 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1507 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1509 * Try and uncompress the blob.
1510 * Unfortunately there is no way to know how big the input blob really
1511 * is. So let us set the maximum input size arbitrarily high. 16MB
1512 * ought to be more than enough for packed DTBs.
1514 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1515 gd->fdt_blob = fdt_blob;
1518 * Check if blob is a FIT images containings DTBs.
1519 * If so, pick the most relevant
1521 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1523 gd->multi_dtb_fit = gd->fdt_blob;
1524 gd->fdt_blob = fdt_blob;
1530 return fdtdec_prepare_fdt();
1533 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1534 int fdtdec_resetup(int *rescan)
1539 * If the current DTB is part of a compressed FIT image,
1540 * try to locate the best match from the uncompressed
1541 * FIT image stillpresent there. Save the time and space
1542 * required to uncompress it again.
1544 if (gd->multi_dtb_fit) {
1545 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1547 if (fdt_blob == gd->fdt_blob) {
1549 * The best match did not change. no need to tear down
1550 * the DM and rescan the fdt.
1557 gd->fdt_blob = fdt_blob;
1558 return fdtdec_prepare_fdt();
1562 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1563 * not a FIT image containings DTB, but a single DTB. There is no need
1564 * to teard down DM and rescan the DT in this case.
1571 #ifdef CONFIG_NR_DRAM_BANKS
1572 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1573 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1575 int addr_cells, size_cells;
1576 const u32 *cell, *end;
1577 u64 total_size, size, addr;
1583 debug("%s: board_id=%d\n", __func__, board_id);
1586 node = fdt_path_offset(blob, area);
1588 debug("No %s node found\n", area);
1592 cell = fdt_getprop(blob, node, "reg", &len);
1594 debug("No reg property found\n");
1598 addr_cells = fdt_address_cells(blob, node);
1599 size_cells = fdt_size_cells(blob, node);
1601 /* Check the board id and mask */
1602 for (child = fdt_first_subnode(blob, node);
1604 child = fdt_next_subnode(blob, child)) {
1605 int match_mask, match_value;
1607 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1608 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1610 if (match_value >= 0 &&
1611 ((board_id & match_mask) == match_value)) {
1612 /* Found matching mask */
1613 debug("Found matching mask %d\n", match_mask);
1615 cell = fdt_getprop(blob, node, "reg", &len);
1617 debug("No memory-banks property found\n");
1623 /* Note: if no matching subnode was found we use the parent node */
1626 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1627 CONFIG_NR_DRAM_BANKS);
1630 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1633 end = cell + len / 4 - addr_cells - size_cells;
1634 debug("cell at %p, end %p\n", cell, end);
1635 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1639 if (addr_cells == 2)
1640 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1641 addr += fdt32_to_cpu(*cell++);
1643 bd->bi_dram[bank].start = addr;
1645 *basep = (phys_addr_t)addr;
1648 if (size_cells == 2)
1649 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1650 size += fdt32_to_cpu(*cell++);
1655 debug("Auto-sizing %llx, size %llx: ", addr, size);
1656 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1657 if (new_size == size) {
1660 debug("sized to %llx\n", new_size);
1666 bd->bi_dram[bank].size = size;
1670 debug("Memory size %llu\n", total_size);
1672 *sizep = (phys_size_t)total_size;
1676 #endif /* CONFIG_NR_DRAM_BANKS */
1678 #endif /* !USE_HOSTCC */