arch/arm/dts/r8a7795.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7795 SoC
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7795-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7795_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7795";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c_dvfs;
  28         };
  29
  30         psci {
  31                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  32                 method = "smc";
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 a57_0: cpu@0 {
  40                         compatible = "arm,cortex-a57", "arm,armv8";
  41                         reg = <0x0>;
  42                         device_type = "cpu";
  43                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  44                         next-level-cache = <&L2_CA57>;
  45                         enable-method = "psci";
  46                 };
  47
  48                 a57_1: cpu@1 {
  49                         compatible = "arm,cortex-a57","arm,armv8";
  50                         reg = <0x1>;
  51                         device_type = "cpu";
  52                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  53                         next-level-cache = <&L2_CA57>;
  54                         enable-method = "psci";
  55                 };
  56
  57                 a57_2: cpu@2 {
  58                         compatible = "arm,cortex-a57","arm,armv8";
  59                         reg = <0x2>;
  60                         device_type = "cpu";
  61                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  62                         next-level-cache = <&L2_CA57>;
  63                         enable-method = "psci";
  64                 };
  65
  66                 a57_3: cpu@3 {
  67                         compatible = "arm,cortex-a57","arm,armv8";
  68                         reg = <0x3>;
  69                         device_type = "cpu";
  70                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  71                         next-level-cache = <&L2_CA57>;
  72                         enable-method = "psci";
  73                 };
  74
  75                 a53_0: cpu@100 {
  76                         compatible = "arm,cortex-a53", "arm,armv8";
  77                         reg = <0x100>;
  78                         device_type = "cpu";
  79                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
  80                         next-level-cache = <&L2_CA53>;
  81                         enable-method = "psci";
  82                 };
  83
  84                 a53_1: cpu@101 {
  85                         compatible = "arm,cortex-a53","arm,armv8";
  86                         reg = <0x101>;
  87                         device_type = "cpu";
  88                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
  89                         next-level-cache = <&L2_CA53>;
  90                         enable-method = "psci";
  91                 };
  92
  93                 a53_2: cpu@102 {
  94                         compatible = "arm,cortex-a53","arm,armv8";
  95                         reg = <0x102>;
  96                         device_type = "cpu";
  97                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
  98                         next-level-cache = <&L2_CA53>;
  99                         enable-method = "psci";
 100                 };
 101
 102                 a53_3: cpu@103 {
 103                         compatible = "arm,cortex-a53","arm,armv8";
 104                         reg = <0x103>;
 105                         device_type = "cpu";
 106                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 107                         next-level-cache = <&L2_CA53>;
 108                         enable-method = "psci";
 109                 };
 110
 111                 L2_CA57: cache-controller-0 {
 112                         compatible = "cache";
 113                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 114                         cache-unified;
 115                         cache-level = <2>;
 116                 };
 117
 118                 L2_CA53: cache-controller-1 {
 119                         compatible = "cache";
 120                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 121                         cache-unified;
 122                         cache-level = <2>;
 123                 };
 124         };
 125
 126         extal_clk: extal {
 127                 compatible = "fixed-clock";
 128                 #clock-cells = <0>;
 129                 /* This value must be overridden by the board */
 130                 clock-frequency = <0>;
 131         };
 132
 133         extalr_clk: extalr {
 134                 compatible = "fixed-clock";
 135                 #clock-cells = <0>;
 136                 /* This value must be overridden by the board */
 137                 clock-frequency = <0>;
 138         };
 139
 140         /*
 141          * The external audio clocks are configured as 0 Hz fixed frequency
 142          * clocks by default.
 143          * Boards that provide audio clocks should override them.
 144          */
 145         audio_clk_a: audio_clk_a {
 146                 compatible = "fixed-clock";
 147                 #clock-cells = <0>;
 148                 clock-frequency = <0>;
 149         };
 150
 151         audio_clk_b: audio_clk_b {
 152                 compatible = "fixed-clock";
 153                 #clock-cells = <0>;
 154                 clock-frequency = <0>;
 155         };
 156
 157         audio_clk_c: audio_clk_c {
 158                 compatible = "fixed-clock";
 159                 #clock-cells = <0>;
 160                 clock-frequency = <0>;
 161         };
 162
 163         /* External CAN clock - to be overridden by boards that provide it */
 164         can_clk: can {
 165                 compatible = "fixed-clock";
 166                 #clock-cells = <0>;
 167                 clock-frequency = <0>;
 168         };
 169
 170         /* External SCIF clock - to be overridden by boards that provide it */
 171         scif_clk: scif {
 172                 compatible = "fixed-clock";
 173                 #clock-cells = <0>;
 174                 clock-frequency = <0>;
 175         };
 176
 177         /* External PCIe clock - can be overridden by the board */
 178         pcie_bus_clk: pcie_bus {
 179                 compatible = "fixed-clock";
 180                 #clock-cells = <0>;
 181                 clock-frequency = <0>;
 182         };
 183
 184         soc: soc {
 185                 compatible = "simple-bus";
 186                 interrupt-parent = <&gic>;
 187
 188                 #address-cells = <2>;
 189                 #size-cells = <2>;
 190                 ranges;
 191
 192                 gic: interrupt-controller@f1010000 {
 193                         compatible = "arm,gic-400";
 194                         #interrupt-cells = <3>;
 195                         #address-cells = <0>;
 196                         interrupt-controller;
 197                         reg = <0x0 0xf1010000 0 0x1000>,
 198                               <0x0 0xf1020000 0 0x20000>,
 199                               <0x0 0xf1040000 0 0x20000>,
 200                               <0x0 0xf1060000 0 0x20000>;
 201                         interrupts = <GIC_PPI 9
 202                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 203                         clocks = <&cpg CPG_MOD 408>;
 204                         clock-names = "clk";
 205                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 206                         resets = <&cpg 408>;
 207                 };
 208
 209                 wdt0: watchdog@e6020000 {
 210                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 211                         reg = <0 0xe6020000 0 0x0c>;
 212                         clocks = <&cpg CPG_MOD 402>;
 213                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 214                         resets = <&cpg 402>;
 215                         status = "disabled";
 216                 };
 217
 218                 gpio0: gpio@e6050000 {
 219                         compatible = "renesas,gpio-r8a7795",
 220                                      "renesas,gpio-rcar";
 221                         reg = <0 0xe6050000 0 0x50>;
 222                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 223                         #gpio-cells = <2>;
 224                         gpio-controller;
 225                         gpio-ranges = <&pfc 0 0 16>;
 226                         #interrupt-cells = <2>;
 227                         interrupt-controller;
 228                         clocks = <&cpg CPG_MOD 912>;
 229                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 230                         resets = <&cpg 912>;
 231                 };
 232
 233                 gpio1: gpio@e6051000 {
 234                         compatible = "renesas,gpio-r8a7795",
 235                                      "renesas,gpio-rcar";
 236                         reg = <0 0xe6051000 0 0x50>;
 237                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 238                         #gpio-cells = <2>;
 239                         gpio-controller;
 240                         gpio-ranges = <&pfc 0 32 28>;
 241                         #interrupt-cells = <2>;
 242                         interrupt-controller;
 243                         clocks = <&cpg CPG_MOD 911>;
 244                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 245                         resets = <&cpg 911>;
 246                 };
 247
 248                 gpio2: gpio@e6052000 {
 249                         compatible = "renesas,gpio-r8a7795",
 250                                      "renesas,gpio-rcar";
 251                         reg = <0 0xe6052000 0 0x50>;
 252                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 253                         #gpio-cells = <2>;
 254                         gpio-controller;
 255                         gpio-ranges = <&pfc 0 64 15>;
 256                         #interrupt-cells = <2>;
 257                         interrupt-controller;
 258                         clocks = <&cpg CPG_MOD 910>;
 259                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 260                         resets = <&cpg 910>;
 261                 };
 262
 263                 gpio3: gpio@e6053000 {
 264                         compatible = "renesas,gpio-r8a7795",
 265                                      "renesas,gpio-rcar";
 266                         reg = <0 0xe6053000 0 0x50>;
 267                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 268                         #gpio-cells = <2>;
 269                         gpio-controller;
 270                         gpio-ranges = <&pfc 0 96 16>;
 271                         #interrupt-cells = <2>;
 272                         interrupt-controller;
 273                         clocks = <&cpg CPG_MOD 909>;
 274                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 275                         resets = <&cpg 909>;
 276                 };
 277
 278                 gpio4: gpio@e6054000 {
 279                         compatible = "renesas,gpio-r8a7795",
 280                                      "renesas,gpio-rcar";
 281                         reg = <0 0xe6054000 0 0x50>;
 282                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 283                         #gpio-cells = <2>;
 284                         gpio-controller;
 285                         gpio-ranges = <&pfc 0 128 18>;
 286                         #interrupt-cells = <2>;
 287                         interrupt-controller;
 288                         clocks = <&cpg CPG_MOD 908>;
 289                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 290                         resets = <&cpg 908>;
 291                 };
 292
 293                 gpio5: gpio@e6055000 {
 294                         compatible = "renesas,gpio-r8a7795",
 295                                      "renesas,gpio-rcar";
 296                         reg = <0 0xe6055000 0 0x50>;
 297                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 298                         #gpio-cells = <2>;
 299                         gpio-controller;
 300                         gpio-ranges = <&pfc 0 160 26>;
 301                         #interrupt-cells = <2>;
 302                         interrupt-controller;
 303                         clocks = <&cpg CPG_MOD 907>;
 304                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 305                         resets = <&cpg 907>;
 306                 };
 307
 308                 gpio6: gpio@e6055400 {
 309                         compatible = "renesas,gpio-r8a7795",
 310                                      "renesas,gpio-rcar";
 311                         reg = <0 0xe6055400 0 0x50>;
 312                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 313                         #gpio-cells = <2>;
 314                         gpio-controller;
 315                         gpio-ranges = <&pfc 0 192 32>;
 316                         #interrupt-cells = <2>;
 317                         interrupt-controller;
 318                         clocks = <&cpg CPG_MOD 906>;
 319                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 320                         resets = <&cpg 906>;
 321                 };
 322
 323                 gpio7: gpio@e6055800 {
 324                         compatible = "renesas,gpio-r8a7795",
 325                                      "renesas,gpio-rcar";
 326                         reg = <0 0xe6055800 0 0x50>;
 327                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 328                         #gpio-cells = <2>;
 329                         gpio-controller;
 330                         gpio-ranges = <&pfc 0 224 4>;
 331                         #interrupt-cells = <2>;
 332                         interrupt-controller;
 333                         clocks = <&cpg CPG_MOD 905>;
 334                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 335                         resets = <&cpg 905>;
 336                 };
 337
 338                 pmu_a57 {
 339                         compatible = "arm,cortex-a57-pmu";
 340                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 341                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 342                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 343                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 344                         interrupt-affinity = <&a57_0>,
 345                                              <&a57_1>,
 346                                              <&a57_2>,
 347                                              <&a57_3>;
 348                 };
 349
 350                 pmu_a53 {
 351                         compatible = "arm,cortex-a53-pmu";
 352                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 353                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 354                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 355                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 356                         interrupt-affinity = <&a53_0>,
 357                                              <&a53_1>,
 358                                              <&a53_2>,
 359                                              <&a53_3>;
 360                 };
 361
 362                 timer {
 363                         compatible = "arm,armv8-timer";
 364                         interrupts = <GIC_PPI 13
 365                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 366                                      <GIC_PPI 14
 367                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 368                                      <GIC_PPI 11
 369                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 370                                      <GIC_PPI 10
 371                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 372                 };
 373
 374                 cpg: clock-controller@e6150000 {
 375                         compatible = "renesas,r8a7795-cpg-mssr";
 376                         reg = <0 0xe6150000 0 0x1000>;
 377                         clocks = <&extal_clk>, <&extalr_clk>;
 378                         clock-names = "extal", "extalr";
 379                         #clock-cells = <2>;
 380                         #power-domain-cells = <0>;
 381                         #reset-cells = <1>;
 382                 };
 383
 384                 rst: reset-controller@e6160000 {
 385                         compatible = "renesas,r8a7795-rst";
 386                         reg = <0 0xe6160000 0 0x0200>;
 387                 };
 388
 389                 prr: chipid@fff00044 {
 390                         compatible = "renesas,prr";
 391                         reg = <0 0xfff00044 0 4>;
 392                 };
 393
 394                 sysc: system-controller@e6180000 {
 395                         compatible = "renesas,r8a7795-sysc";
 396                         reg = <0 0xe6180000 0 0x0400>;
 397                         #power-domain-cells = <1>;
 398                 };
 399
 400                 pfc: pin-controller@e6060000 {
 401                         compatible = "renesas,pfc-r8a7795";
 402                         reg = <0 0xe6060000 0 0x50c>;
 403                 };
 404
 405                 intc_ex: interrupt-controller@e61c0000 {
 406                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 407                         #interrupt-cells = <2>;
 408                         interrupt-controller;
 409                         reg = <0 0xe61c0000 0 0x200>;
 410                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 411                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 412                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 413                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 414                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 415                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 416                         clocks = <&cpg CPG_MOD 407>;
 417                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 418                         resets = <&cpg 407>;
 419                 };
 420
 421                 dmac0: dma-controller@e6700000 {
 422                         compatible = "renesas,dmac-r8a7795",
 423                                      "renesas,rcar-dmac";
 424                         reg = <0 0xe6700000 0 0x10000>;
 425                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 426                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 437                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 438                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 439                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 440                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 441                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 442                         interrupt-names = "error",
 443                                         "ch0", "ch1", "ch2", "ch3",
 444                                         "ch4", "ch5", "ch6", "ch7",
 445                                         "ch8", "ch9", "ch10", "ch11",
 446                                         "ch12", "ch13", "ch14", "ch15";
 447                         clocks = <&cpg CPG_MOD 219>;
 448                         clock-names = "fck";
 449                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 450                         resets = <&cpg 219>;
 451                         #dma-cells = <1>;
 452                         dma-channels = <16>;
 453                 };
 454
 455                 dmac1: dma-controller@e7300000 {
 456                         compatible = "renesas,dmac-r8a7795",
 457                                      "renesas,rcar-dmac";
 458                         reg = <0 0xe7300000 0 0x10000>;
 459                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 464                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 471                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 472                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 473                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 474                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 475                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 476                         interrupt-names = "error",
 477                                         "ch0", "ch1", "ch2", "ch3",
 478                                         "ch4", "ch5", "ch6", "ch7",
 479                                         "ch8", "ch9", "ch10", "ch11",
 480                                         "ch12", "ch13", "ch14", "ch15";
 481                         clocks = <&cpg CPG_MOD 218>;
 482                         clock-names = "fck";
 483                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 484                         resets = <&cpg 218>;
 485                         #dma-cells = <1>;
 486                         dma-channels = <16>;
 487                 };
 488
 489                 dmac2: dma-controller@e7310000 {
 490                         compatible = "renesas,dmac-r8a7795",
 491                                      "renesas,rcar-dmac";
 492                         reg = <0 0xe7310000 0 0x10000>;
 493                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 494                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 495                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 496                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 497                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 498                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 499                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 500                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 501                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 502                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 503                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 504                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 505                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 506                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 507                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 508                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 509                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 510                         interrupt-names = "error",
 511                                         "ch0", "ch1", "ch2", "ch3",
 512                                         "ch4", "ch5", "ch6", "ch7",
 513                                         "ch8", "ch9", "ch10", "ch11",
 514                                         "ch12", "ch13", "ch14", "ch15";
 515                         clocks = <&cpg CPG_MOD 217>;
 516                         clock-names = "fck";
 517                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 518                         resets = <&cpg 217>;
 519                         #dma-cells = <1>;
 520                         dma-channels = <16>;
 521                 };
 522
 523                 audma0: dma-controller@ec700000 {
 524                         compatible = "renesas,dmac-r8a7795",
 525                                      "renesas,rcar-dmac";
 526                         reg = <0 0xec700000 0 0x10000>;
 527                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 528                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 529                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 530                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 531                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 532                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 533                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 534                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 535                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 536                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 537                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 538                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 539                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 540                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 541                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 542                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 543                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 544                         interrupt-names = "error",
 545                                         "ch0", "ch1", "ch2", "ch3",
 546                                         "ch4", "ch5", "ch6", "ch7",
 547                                         "ch8", "ch9", "ch10", "ch11",
 548                                         "ch12", "ch13", "ch14", "ch15";
 549                         clocks = <&cpg CPG_MOD 502>;
 550                         clock-names = "fck";
 551                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 552                         resets = <&cpg 502>;
 553                         #dma-cells = <1>;
 554                         dma-channels = <16>;
 555                 };
 556
 557                 audma1: dma-controller@ec720000 {
 558                         compatible = "renesas,dmac-r8a7795",
 559                                      "renesas,rcar-dmac";
 560                         reg = <0 0xec720000 0 0x10000>;
 561                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 562                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 563                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 564                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 565                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 566                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 567                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 568                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 569                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 570                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 571                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 572                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 573                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 574                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 575                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 576                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 577                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 578                         interrupt-names = "error",
 579                                         "ch0", "ch1", "ch2", "ch3",
 580                                         "ch4", "ch5", "ch6", "ch7",
 581                                         "ch8", "ch9", "ch10", "ch11",
 582                                         "ch12", "ch13", "ch14", "ch15";
 583                         clocks = <&cpg CPG_MOD 501>;
 584                         clock-names = "fck";
 585                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 586                         resets = <&cpg 501>;
 587                         #dma-cells = <1>;
 588                         dma-channels = <16>;
 589                 };
 590
 591                 avb: ethernet@e6800000 {
 592                         compatible = "renesas,etheravb-r8a7795",
 593                                      "renesas,etheravb-rcar-gen3";
 594                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 595                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 596                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 597                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 598                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 599                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 600                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 601                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 602                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 603                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 604                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 605                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 607                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 608                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 611                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 612                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 613                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 614                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 615                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 616                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 617                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 618                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 620                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 621                                           "ch4", "ch5", "ch6", "ch7",
 622                                           "ch8", "ch9", "ch10", "ch11",
 623                                           "ch12", "ch13", "ch14", "ch15",
 624                                           "ch16", "ch17", "ch18", "ch19",
 625                                           "ch20", "ch21", "ch22", "ch23",
 626                                           "ch24";
 627                         clocks = <&cpg CPG_MOD 812>;
 628                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 629                         resets = <&cpg 812>;
 630                         phy-mode = "rgmii-txid";
 631                         #address-cells = <1>;
 632                         #size-cells = <0>;
 633                         status = "disabled";
 634                 };
 635
 636                 can0: can@e6c30000 {
 637                         compatible = "renesas,can-r8a7795",
 638                                      "renesas,rcar-gen3-can";
 639                         reg = <0 0xe6c30000 0 0x1000>;
 640                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 641                         clocks = <&cpg CPG_MOD 916>,
 642                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 643                                <&can_clk>;
 644                         clock-names = "clkp1", "clkp2", "can_clk";
 645                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 646                         assigned-clock-rates = <40000000>;
 647                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 648                         resets = <&cpg 916>;
 649                         status = "disabled";
 650                 };
 651
 652                 can1: can@e6c38000 {
 653                         compatible = "renesas,can-r8a7795",
 654                                      "renesas,rcar-gen3-can";
 655                         reg = <0 0xe6c38000 0 0x1000>;
 656                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 657                         clocks = <&cpg CPG_MOD 915>,
 658                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 659                                <&can_clk>;
 660                         clock-names = "clkp1", "clkp2", "can_clk";
 661                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 662                         assigned-clock-rates = <40000000>;
 663                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 664                         resets = <&cpg 915>;
 665                         status = "disabled";
 666                 };
 667
 668                 canfd: can@e66c0000 {
 669                         compatible = "renesas,r8a7795-canfd",
 670                                      "renesas,rcar-gen3-canfd";
 671                         reg = <0 0xe66c0000 0 0x8000>;
 672                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 673                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 674                         clocks = <&cpg CPG_MOD 914>,
 675                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 676                                <&can_clk>;
 677                         clock-names = "fck", "canfd", "can_clk";
 678                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 679                         assigned-clock-rates = <40000000>;
 680                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 681                         resets = <&cpg 914>;
 682                         status = "disabled";
 683
 684                         channel0 {
 685                                 status = "disabled";
 686                         };
 687
 688                         channel1 {
 689                                 status = "disabled";
 690                         };
 691                 };
 692
 693                 drif00: rif@e6f40000 {
 694                         compatible = "renesas,r8a7795-drif",
 695                                      "renesas,rcar-gen3-drif";
 696                         reg = <0 0xe6f40000 0 0x64>;
 697                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 698                         clocks = <&cpg CPG_MOD 515>;
 699                         clock-names = "fck";
 700                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
 701                         dma-names = "rx", "rx";
 702                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 703                         resets = <&cpg 515>;
 704                         renesas,bonding = <&drif01>;
 705                         status = "disabled";
 706                 };
 707
 708                 drif01: rif@e6f50000 {
 709                         compatible = "renesas,r8a7795-drif",
 710                                      "renesas,rcar-gen3-drif";
 711                         reg = <0 0xe6f50000 0 0x64>;
 712                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 713                         clocks = <&cpg CPG_MOD 514>;
 714                         clock-names = "fck";
 715                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
 716                         dma-names = "rx", "rx";
 717                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 718                         resets = <&cpg 514>;
 719                         renesas,bonding = <&drif00>;
 720                         status = "disabled";
 721                 };
 722
 723                 drif10: rif@e6f60000 {
 724                         compatible = "renesas,r8a7795-drif",
 725                                      "renesas,rcar-gen3-drif";
 726                         reg = <0 0xe6f60000 0 0x64>;
 727                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 728                         clocks = <&cpg CPG_MOD 513>;
 729                         clock-names = "fck";
 730                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
 731                         dma-names = "rx", "rx";
 732                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 733                         resets = <&cpg 513>;
 734                         renesas,bonding = <&drif11>;
 735                         status = "disabled";
 736                 };
 737
 738                 drif11: rif@e6f70000 {
 739                         compatible = "renesas,r8a7795-drif",
 740                                      "renesas,rcar-gen3-drif";
 741                         reg = <0 0xe6f70000 0 0x64>;
 742                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 743                         clocks = <&cpg CPG_MOD 512>;
 744                         clock-names = "fck";
 745                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
 746                         dma-names = "rx", "rx";
 747                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 748                         resets = <&cpg 512>;
 749                         renesas,bonding = <&drif10>;
 750                         status = "disabled";
 751                 };
 752
 753                 drif20: rif@e6f80000 {
 754                         compatible = "renesas,r8a7795-drif",
 755                                      "renesas,rcar-gen3-drif";
 756                         reg = <0 0xe6f80000 0 0x64>;
 757                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 758                         clocks = <&cpg CPG_MOD 511>;
 759                         clock-names = "fck";
 760                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
 761                         dma-names = "rx", "rx";
 762                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 763                         resets = <&cpg 511>;
 764                         renesas,bonding = <&drif21>;
 765                         status = "disabled";
 766                 };
 767
 768                 drif21: rif@e6f90000 {
 769                         compatible = "renesas,r8a7795-drif",
 770                                      "renesas,rcar-gen3-drif";
 771                         reg = <0 0xe6f90000 0 0x64>;
 772                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 773                         clocks = <&cpg CPG_MOD 510>;
 774                         clock-names = "fck";
 775                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
 776                         dma-names = "rx", "rx";
 777                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 778                         resets = <&cpg 510>;
 779                         renesas,bonding = <&drif20>;
 780                         status = "disabled";
 781                 };
 782
 783                 drif30: rif@e6fa0000 {
 784                         compatible = "renesas,r8a7795-drif",
 785                                      "renesas,rcar-gen3-drif";
 786                         reg = <0 0xe6fa0000 0 0x64>;
 787                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 788                         clocks = <&cpg CPG_MOD 509>;
 789                         clock-names = "fck";
 790                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
 791                         dma-names = "rx", "rx";
 792                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 793                         resets = <&cpg 509>;
 794                         renesas,bonding = <&drif31>;
 795                         status = "disabled";
 796                 };
 797
 798                 drif31: rif@e6fb0000 {
 799                         compatible = "renesas,r8a7795-drif",
 800                                      "renesas,rcar-gen3-drif";
 801                         reg = <0 0xe6fb0000 0 0x64>;
 802                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 803                         clocks = <&cpg CPG_MOD 508>;
 804                         clock-names = "fck";
 805                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
 806                         dma-names = "rx", "rx";
 807                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 808                         resets = <&cpg 508>;
 809                         renesas,bonding = <&drif30>;
 810                         status = "disabled";
 811                 };
 812
 813                 hscif0: serial@e6540000 {
 814                         compatible = "renesas,hscif-r8a7795",
 815                                      "renesas,rcar-gen3-hscif",
 816                                      "renesas,hscif";
 817                         reg = <0 0xe6540000 0 96>;
 818                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 819                         clocks = <&cpg CPG_MOD 520>,
 820                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 821                                  <&scif_clk>;
 822                         clock-names = "fck", "brg_int", "scif_clk";
 823                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 824                         dma-names = "tx", "rx";
 825                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 826                         resets = <&cpg 520>;
 827                         status = "disabled";
 828                 };
 829
 830                 hscif1: serial@e6550000 {
 831                         compatible = "renesas,hscif-r8a7795",
 832                                      "renesas,rcar-gen3-hscif",
 833                                      "renesas,hscif";
 834                         reg = <0 0xe6550000 0 96>;
 835                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 836                         clocks = <&cpg CPG_MOD 519>,
 837                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 838                                  <&scif_clk>;
 839                         clock-names = "fck", "brg_int", "scif_clk";
 840                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 841                         dma-names = "tx", "rx";
 842                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 843                         resets = <&cpg 519>;
 844                         status = "disabled";
 845                 };
 846
 847                 hscif2: serial@e6560000 {
 848                         compatible = "renesas,hscif-r8a7795",
 849                                      "renesas,rcar-gen3-hscif",
 850                                      "renesas,hscif";
 851                         reg = <0 0xe6560000 0 96>;
 852                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 853                         clocks = <&cpg CPG_MOD 518>,
 854                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 855                                  <&scif_clk>;
 856                         clock-names = "fck", "brg_int", "scif_clk";
 857                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 858                         dma-names = "tx", "rx";
 859                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 860                         resets = <&cpg 518>;
 861                         status = "disabled";
 862                 };
 863
 864                 hscif3: serial@e66a0000 {
 865                         compatible = "renesas,hscif-r8a7795",
 866                                      "renesas,rcar-gen3-hscif",
 867                                      "renesas,hscif";
 868                         reg = <0 0xe66a0000 0 96>;
 869                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 870                         clocks = <&cpg CPG_MOD 517>,
 871                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 872                                  <&scif_clk>;
 873                         clock-names = "fck", "brg_int", "scif_clk";
 874                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 875                         dma-names = "tx", "rx";
 876                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 877                         resets = <&cpg 517>;
 878                         status = "disabled";
 879                 };
 880
 881                 hscif4: serial@e66b0000 {
 882                         compatible = "renesas,hscif-r8a7795",
 883                                      "renesas,rcar-gen3-hscif",
 884                                      "renesas,hscif";
 885                         reg = <0 0xe66b0000 0 96>;
 886                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 887                         clocks = <&cpg CPG_MOD 516>,
 888                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 889                                  <&scif_clk>;
 890                         clock-names = "fck", "brg_int", "scif_clk";
 891                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 892                         dma-names = "tx", "rx";
 893                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 894                         resets = <&cpg 516>;
 895                         status = "disabled";
 896                 };
 897
 898                 msiof0: spi@e6e90000 {
 899                         compatible = "renesas,msiof-r8a7795",
 900                                      "renesas,rcar-gen3-msiof";
 901                         reg = <0 0xe6e90000 0 0x0064>;
 902                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 903                         clocks = <&cpg CPG_MOD 211>;
 904                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
 905                                <&dmac2 0x41>, <&dmac2 0x40>;
 906                         dma-names = "tx", "rx", "tx", "rx";
 907                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 908                         resets = <&cpg 211>;
 909                         #address-cells = <1>;
 910                         #size-cells = <0>;
 911                         status = "disabled";
 912                 };
 913
 914                 msiof1: spi@e6ea0000 {
 915                         compatible = "renesas,msiof-r8a7795",
 916                                      "renesas,rcar-gen3-msiof";
 917                         reg = <0 0xe6ea0000 0 0x0064>;
 918                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 919                         clocks = <&cpg CPG_MOD 210>;
 920                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
 921                                <&dmac2 0x43>, <&dmac2 0x42>;
 922                         dma-names = "tx", "rx", "tx", "rx";
 923                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 924                         resets = <&cpg 210>;
 925                         #address-cells = <1>;
 926                         #size-cells = <0>;
 927                         status = "disabled";
 928                 };
 929
 930                 msiof2: spi@e6c00000 {
 931                         compatible = "renesas,msiof-r8a7795",
 932                                      "renesas,rcar-gen3-msiof";
 933                         reg = <0 0xe6c00000 0 0x0064>;
 934                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 935                         clocks = <&cpg CPG_MOD 209>;
 936                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
 937                         dma-names = "tx", "rx";
 938                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 939                         resets = <&cpg 209>;
 940                         #address-cells = <1>;
 941                         #size-cells = <0>;
 942                         status = "disabled";
 943                 };
 944
 945                 msiof3: spi@e6c10000 {
 946                         compatible = "renesas,msiof-r8a7795",
 947                                      "renesas,rcar-gen3-msiof";
 948                         reg = <0 0xe6c10000 0 0x0064>;
 949                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 950                         clocks = <&cpg CPG_MOD 208>;
 951                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
 952                         dma-names = "tx", "rx";
 953                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 954                         resets = <&cpg 208>;
 955                         #address-cells = <1>;
 956                         #size-cells = <0>;
 957                         status = "disabled";
 958                 };
 959
 960                 scif0: serial@e6e60000 {
 961                         compatible = "renesas,scif-r8a7795",
 962                                      "renesas,rcar-gen3-scif", "renesas,scif";
 963                         reg = <0 0xe6e60000 0 64>;
 964                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 965                         clocks = <&cpg CPG_MOD 207>,
 966                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 967                                  <&scif_clk>;
 968                         clock-names = "fck", "brg_int", "scif_clk";
 969                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 970                         dma-names = "tx", "rx";
 971                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 972                         resets = <&cpg 207>;
 973                         status = "disabled";
 974                 };
 975
 976                 scif1: serial@e6e68000 {
 977                         compatible = "renesas,scif-r8a7795",
 978                                      "renesas,rcar-gen3-scif", "renesas,scif";
 979                         reg = <0 0xe6e68000 0 64>;
 980                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 981                         clocks = <&cpg CPG_MOD 206>,
 982                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 983                                  <&scif_clk>;
 984                         clock-names = "fck", "brg_int", "scif_clk";
 985                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 986                         dma-names = "tx", "rx";
 987                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 988                         resets = <&cpg 206>;
 989                         status = "disabled";
 990                 };
 991
 992                 scif2: serial@e6e88000 {
 993                         compatible = "renesas,scif-r8a7795",
 994                                      "renesas,rcar-gen3-scif", "renesas,scif";
 995                         reg = <0 0xe6e88000 0 64>;
 996                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 997                         clocks = <&cpg CPG_MOD 310>,
 998                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 999                                  <&scif_clk>;
1000                         clock-names = "fck", "brg_int", "scif_clk";
1001                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
1002                         dma-names = "tx", "rx";
1003                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1004                         resets = <&cpg 310>;
1005                         status = "disabled";
1006                 };
1007
1008                 scif3: serial@e6c50000 {
1009                         compatible = "renesas,scif-r8a7795",
1010                                      "renesas,rcar-gen3-scif", "renesas,scif";
1011                         reg = <0 0xe6c50000 0 64>;
1012                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1013                         clocks = <&cpg CPG_MOD 204>,
1014                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1015                                  <&scif_clk>;
1016                         clock-names = "fck", "brg_int", "scif_clk";
1017                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1018                         dma-names = "tx", "rx";
1019                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1020                         resets = <&cpg 204>;
1021                         status = "disabled";
1022                 };
1023
1024                 scif4: serial@e6c40000 {
1025                         compatible = "renesas,scif-r8a7795",
1026                                      "renesas,rcar-gen3-scif", "renesas,scif";
1027                         reg = <0 0xe6c40000 0 64>;
1028                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1029                         clocks = <&cpg CPG_MOD 203>,
1030                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1031                                  <&scif_clk>;
1032                         clock-names = "fck", "brg_int", "scif_clk";
1033                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1034                         dma-names = "tx", "rx";
1035                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1036                         resets = <&cpg 203>;
1037                         status = "disabled";
1038                 };
1039
1040                 scif5: serial@e6f30000 {
1041                         compatible = "renesas,scif-r8a7795",
1042                                      "renesas,rcar-gen3-scif", "renesas,scif";
1043                         reg = <0 0xe6f30000 0 64>;
1044                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1045                         clocks = <&cpg CPG_MOD 202>,
1046                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1047                                  <&scif_clk>;
1048                         clock-names = "fck", "brg_int", "scif_clk";
1049                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
1050                         dma-names = "tx", "rx";
1051                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1052                         resets = <&cpg 202>;
1053                         status = "disabled";
1054                 };
1055
1056                 i2c_dvfs: i2c@e60b0000 {
1057                         #address-cells = <1>;
1058                         #size-cells = <0>;
1059                         compatible = "renesas,iic-r8a7795",
1060                                      "renesas,rcar-gen3-iic",
1061                                      "renesas,rmobile-iic";
1062                         reg = <0 0xe60b0000 0 0x425>;
1063                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
1064                         clocks = <&cpg CPG_MOD 926>;
1065                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1066                         resets = <&cpg 926>;
1067                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
1068                         dma-names = "tx", "rx";
1069                         status = "disabled";
1070                 };
1071
1072                 i2c0: i2c@e6500000 {
1073                         #address-cells = <1>;
1074                         #size-cells = <0>;
1075                         compatible = "renesas,i2c-r8a7795",
1076                                      "renesas,rcar-gen3-i2c";
1077                         reg = <0 0xe6500000 0 0x40>;
1078                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
1079                         clocks = <&cpg CPG_MOD 931>;
1080                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1081                         resets = <&cpg 931>;
1082                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
1083                         dma-names = "tx", "rx";
1084                         i2c-scl-internal-delay-ns = <110>;
1085                         status = "disabled";
1086                 };
1087
1088                 i2c1: i2c@e6508000 {
1089                         #address-cells = <1>;
1090                         #size-cells = <0>;
1091                         compatible = "renesas,i2c-r8a7795",
1092                                      "renesas,rcar-gen3-i2c";
1093                         reg = <0 0xe6508000 0 0x40>;
1094                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
1095                         clocks = <&cpg CPG_MOD 930>;
1096                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1097                         resets = <&cpg 930>;
1098                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
1099                         dma-names = "tx", "rx";
1100                         i2c-scl-internal-delay-ns = <6>;
1101                         status = "disabled";
1102                 };
1103
1104                 i2c2: i2c@e6510000 {
1105                         #address-cells = <1>;
1106                         #size-cells = <0>;
1107                         compatible = "renesas,i2c-r8a7795",
1108                                      "renesas,rcar-gen3-i2c";
1109                         reg = <0 0xe6510000 0 0x40>;
1110                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
1111                         clocks = <&cpg CPG_MOD 929>;
1112                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1113                         resets = <&cpg 929>;
1114                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
1115                         dma-names = "tx", "rx";
1116                         i2c-scl-internal-delay-ns = <6>;
1117                         status = "disabled";
1118                 };
1119
1120                 i2c3: i2c@e66d0000 {
1121                         #address-cells = <1>;
1122                         #size-cells = <0>;
1123                         compatible = "renesas,i2c-r8a7795",
1124                                      "renesas,rcar-gen3-i2c";
1125                         reg = <0 0xe66d0000 0 0x40>;
1126                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
1127                         clocks = <&cpg CPG_MOD 928>;
1128                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1129                         resets = <&cpg 928>;
1130                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
1131                         dma-names = "tx", "rx";
1132                         i2c-scl-internal-delay-ns = <110>;
1133                         status = "disabled";
1134                 };
1135
1136                 i2c4: i2c@e66d8000 {
1137                         #address-cells = <1>;
1138                         #size-cells = <0>;
1139                         compatible = "renesas,i2c-r8a7795",
1140                                      "renesas,rcar-gen3-i2c";
1141                         reg = <0 0xe66d8000 0 0x40>;
1142                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1143                         clocks = <&cpg CPG_MOD 927>;
1144                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1145                         resets = <&cpg 927>;
1146                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
1147                         dma-names = "tx", "rx";
1148                         i2c-scl-internal-delay-ns = <110>;
1149                         status = "disabled";
1150                 };
1151
1152                 i2c5: i2c@e66e0000 {
1153                         #address-cells = <1>;
1154                         #size-cells = <0>;
1155                         compatible = "renesas,i2c-r8a7795",
1156                                      "renesas,rcar-gen3-i2c";
1157                         reg = <0 0xe66e0000 0 0x40>;
1158                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
1159                         clocks = <&cpg CPG_MOD 919>;
1160                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1161                         resets = <&cpg 919>;
1162                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
1163                         dma-names = "tx", "rx";
1164                         i2c-scl-internal-delay-ns = <110>;
1165                         status = "disabled";
1166                 };
1167
1168                 i2c6: i2c@e66e8000 {
1169                         #address-cells = <1>;
1170                         #size-cells = <0>;
1171                         compatible = "renesas,i2c-r8a7795",
1172                                      "renesas,rcar-gen3-i2c";
1173                         reg = <0 0xe66e8000 0 0x40>;
1174                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1175                         clocks = <&cpg CPG_MOD 918>;
1176                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1177                         resets = <&cpg 918>;
1178                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
1179                         dma-names = "tx", "rx";
1180                         i2c-scl-internal-delay-ns = <6>;
1181                         status = "disabled";
1182                 };
1183
1184                 pwm0: pwm@e6e30000 {
1185                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1186                         reg = <0 0xe6e30000 0 0x8>;
1187                         clocks = <&cpg CPG_MOD 523>;
1188                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1189                         resets = <&cpg 523>;
1190                         #pwm-cells = <2>;
1191                         status = "disabled";
1192                 };
1193
1194                 pwm1: pwm@e6e31000 {
1195                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1196                         reg = <0 0xe6e31000 0 0x8>;
1197                         clocks = <&cpg CPG_MOD 523>;
1198                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1199                         resets = <&cpg 523>;
1200                         #pwm-cells = <2>;
1201                         status = "disabled";
1202                 };
1203
1204                 pwm2: pwm@e6e32000 {
1205                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1206                         reg = <0 0xe6e32000 0 0x8>;
1207                         clocks = <&cpg CPG_MOD 523>;
1208                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1209                         resets = <&cpg 523>;
1210                         #pwm-cells = <2>;
1211                         status = "disabled";
1212                 };
1213
1214                 pwm3: pwm@e6e33000 {
1215                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1216                         reg = <0 0xe6e33000 0 0x8>;
1217                         clocks = <&cpg CPG_MOD 523>;
1218                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1219                         resets = <&cpg 523>;
1220                         #pwm-cells = <2>;
1221                         status = "disabled";
1222                 };
1223
1224                 pwm4: pwm@e6e34000 {
1225                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1226                         reg = <0 0xe6e34000 0 0x8>;
1227                         clocks = <&cpg CPG_MOD 523>;
1228                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1229                         resets = <&cpg 523>;
1230                         #pwm-cells = <2>;
1231                         status = "disabled";
1232                 };
1233
1234                 pwm5: pwm@e6e35000 {
1235                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1236                         reg = <0 0xe6e35000 0 0x8>;
1237                         clocks = <&cpg CPG_MOD 523>;
1238                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1239                         resets = <&cpg 523>;
1240                         #pwm-cells = <2>;
1241                         status = "disabled";
1242                 };
1243
1244                 pwm6: pwm@e6e36000 {
1245                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1246                         reg = <0 0xe6e36000 0 0x8>;
1247                         clocks = <&cpg CPG_MOD 523>;
1248                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1249                         resets = <&cpg 523>;
1250                         #pwm-cells = <2>;
1251                         status = "disabled";
1252                 };
1253
1254                 rcar_sound: sound@ec500000 {
1255                         /*
1256                          * #sound-dai-cells is required
1257                          *
1258                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1259                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1260                          */
1261                         /*
1262                          * #clock-cells is required for audio_clkout0/1/2/3
1263                          *
1264                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1265                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1266                          */
1267                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1268                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1269                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1270                                 <0 0xec540000 0 0x1000>, /* SSIU */
1271                                 <0 0xec541000 0 0x280>,  /* SSI */
1272                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1273                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1274
1275                         clocks = <&cpg CPG_MOD 1005>,
1276                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1277                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1278                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1279                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1280                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1281                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1282                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1283                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1284                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1285                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1286                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1287                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1288                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1289                                  <&audio_clk_a>, <&audio_clk_b>,
1290                                  <&audio_clk_c>,
1291                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1292                         clock-names = "ssi-all",
1293                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1294                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1295                                       "ssi.1", "ssi.0",
1296                                       "src.9", "src.8", "src.7", "src.6",
1297                                       "src.5", "src.4", "src.3", "src.2",
1298                                       "src.1", "src.0",
1299                                       "mix.1", "mix.0",
1300                                       "ctu.1", "ctu.0",
1301                                       "dvc.0", "dvc.1",
1302                                       "clk_a", "clk_b", "clk_c", "clk_i";
1303                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1304                         resets = <&cpg 1005>,
1305                                  <&cpg 1006>, <&cpg 1007>,
1306                                  <&cpg 1008>, <&cpg 1009>,
1307                                  <&cpg 1010>, <&cpg 1011>,
1308                                  <&cpg 1012>, <&cpg 1013>,
1309                                  <&cpg 1014>, <&cpg 1015>;
1310                         reset-names = "ssi-all",
1311                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1312                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1313                                       "ssi.1", "ssi.0";
1314                         status = "disabled";
1315
1316                         rcar_sound,dvc {
1317                                 dvc0: dvc-0 {
1318                                         dmas = <&audma1 0xbc>;
1319                                         dma-names = "tx";
1320                                 };
1321                                 dvc1: dvc-1 {
1322                                         dmas = <&audma1 0xbe>;
1323                                         dma-names = "tx";
1324                                 };
1325                         };
1326
1327                         rcar_sound,mix {
1328                                 mix0: mix-0 { };
1329                                 mix1: mix-1 { };
1330                         };
1331
1332                         rcar_sound,ctu {
1333                                 ctu00: ctu-0 { };
1334                                 ctu01: ctu-1 { };
1335                                 ctu02: ctu-2 { };
1336                                 ctu03: ctu-3 { };
1337                                 ctu10: ctu-4 { };
1338                                 ctu11: ctu-5 { };
1339                                 ctu12: ctu-6 { };
1340                                 ctu13: ctu-7 { };
1341                         };
1342
1343                         rcar_sound,src {
1344                                 src0: src-0 {
1345                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1346                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1347                                         dma-names = "rx", "tx";
1348                                 };
1349                                 src1: src-1 {
1350                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1351                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1352                                         dma-names = "rx", "tx";
1353                                 };
1354                                 src2: src-2 {
1355                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1356                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1357                                         dma-names = "rx", "tx";
1358                                 };
1359                                 src3: src-3 {
1360                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1361                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1362                                         dma-names = "rx", "tx";
1363                                 };
1364                                 src4: src-4 {
1365                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1366                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1367                                         dma-names = "rx", "tx";
1368                                 };
1369                                 src5: src-5 {
1370                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1371                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1372                                         dma-names = "rx", "tx";
1373                                 };
1374                                 src6: src-6 {
1375                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1376                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1377                                         dma-names = "rx", "tx";
1378                                 };
1379                                 src7: src-7 {
1380                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1381                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1382                                         dma-names = "rx", "tx";
1383                                 };
1384                                 src8: src-8 {
1385                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1386                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1387                                         dma-names = "rx", "tx";
1388                                 };
1389                                 src9: src-9 {
1390                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1391                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1392                                         dma-names = "rx", "tx";
1393                                 };
1394                         };
1395
1396                         rcar_sound,ssi {
1397                                 ssi0: ssi-0 {
1398                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1399                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1400                                         dma-names = "rx", "tx", "rxu", "txu";
1401                                 };
1402                                 ssi1: ssi-1 {
1403                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1404                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1405                                         dma-names = "rx", "tx", "rxu", "txu";
1406                                 };
1407                                 ssi2: ssi-2 {
1408                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1409                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1410                                         dma-names = "rx", "tx", "rxu", "txu";
1411                                 };
1412                                 ssi3: ssi-3 {
1413                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1414                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1415                                         dma-names = "rx", "tx", "rxu", "txu";
1416                                 };
1417                                 ssi4: ssi-4 {
1418                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1419                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1420                                         dma-names = "rx", "tx", "rxu", "txu";
1421                                 };
1422                                 ssi5: ssi-5 {
1423                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1424                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1425                                         dma-names = "rx", "tx", "rxu", "txu";
1426                                 };
1427                                 ssi6: ssi-6 {
1428                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1429                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1430                                         dma-names = "rx", "tx", "rxu", "txu";
1431                                 };
1432                                 ssi7: ssi-7 {
1433                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1434                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1435                                         dma-names = "rx", "tx", "rxu", "txu";
1436                                 };
1437                                 ssi8: ssi-8 {
1438                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1439                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1440                                         dma-names = "rx", "tx", "rxu", "txu";
1441                                 };
1442                                 ssi9: ssi-9 {
1443                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1444                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1445                                         dma-names = "rx", "tx", "rxu", "txu";
1446                                 };
1447                         };
1448                 };
1449
1450                 sata: sata@ee300000 {
1451                         compatible = "renesas,sata-r8a7795",
1452                                      "renesas,rcar-gen3-sata";
1453                         reg = <0 0xee300000 0 0x200000>;
1454                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1455                         clocks = <&cpg CPG_MOD 815>;
1456                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1457                         resets = <&cpg 815>;
1458                         status = "disabled";
1459                 };
1460
1461                 xhci0: usb@ee000000 {
1462                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1463                         reg = <0 0xee000000 0 0xc00>;
1464                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1465                         clocks = <&cpg CPG_MOD 328>;
1466                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1467                         resets = <&cpg 328>;
1468                         status = "disabled";
1469                 };
1470
1471                 usb_dmac0: dma-controller@e65a0000 {
1472                         compatible = "renesas,r8a7795-usb-dmac",
1473                                      "renesas,usb-dmac";
1474                         reg = <0 0xe65a0000 0 0x100>;
1475                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1476                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1477                         interrupt-names = "ch0", "ch1";
1478                         clocks = <&cpg CPG_MOD 330>;
1479                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1480                         resets = <&cpg 330>;
1481                         #dma-cells = <1>;
1482                         dma-channels = <2>;
1483                 };
1484
1485                 usb_dmac1: dma-controller@e65b0000 {
1486                         compatible = "renesas,r8a7795-usb-dmac",
1487                                      "renesas,usb-dmac";
1488                         reg = <0 0xe65b0000 0 0x100>;
1489                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1490                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1491                         interrupt-names = "ch0", "ch1";
1492                         clocks = <&cpg CPG_MOD 331>;
1493                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1494                         resets = <&cpg 331>;
1495                         #dma-cells = <1>;
1496                         dma-channels = <2>;
1497                 };
1498
1499                 usb_dmac2: dma-controller@e6460000 {
1500                         compatible = "renesas,r8a7795-usb-dmac",
1501                                      "renesas,usb-dmac";
1502                         reg = <0 0xe6460000 0 0x100>;
1503                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
1504                                       GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1505                         interrupt-names = "ch0", "ch1";
1506                         clocks = <&cpg CPG_MOD 326>;
1507                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1508                         resets = <&cpg 326>;
1509                         #dma-cells = <1>;
1510                         dma-channels = <2>;
1511                 };
1512
1513                 usb_dmac3: dma-controller@e6470000 {
1514                         compatible = "renesas,r8a7795-usb-dmac",
1515                                      "renesas,usb-dmac";
1516                         reg = <0 0xe6470000 0 0x100>;
1517                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
1518                                       GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1519                         interrupt-names = "ch0", "ch1";
1520                         clocks = <&cpg CPG_MOD 329>;
1521                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1522                         resets = <&cpg 329>;
1523                         #dma-cells = <1>;
1524                         dma-channels = <2>;
1525                 };
1526
1527                 rpc: rpc@0xee200000 {
1528                         compatible = "renesas,rpc-r8a7795", "renesas,rpc";
1529                         reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
1530                         clocks = <&cpg CPG_MOD 917>;
1531                         bank-width = <2>;
1532                         status = "disabled";
1533                 };
1534
1535                 sdhi0: sd@ee100000 {
1536                         compatible = "renesas,sdhi-r8a7795";
1537                         reg = <0 0xee100000 0 0x2000>;
1538                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1539                         clocks = <&cpg CPG_MOD 314>;
1540                         max-frequency = <200000000>;
1541                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1542                         resets = <&cpg 314>;
1543                         status = "disabled";
1544                 };
1545
1546                 sdhi1: sd@ee120000 {
1547                         compatible = "renesas,sdhi-r8a7795";
1548                         reg = <0 0xee120000 0 0x2000>;
1549                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1550                         clocks = <&cpg CPG_MOD 313>;
1551                         max-frequency = <200000000>;
1552                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1553                         resets = <&cpg 313>;
1554                         status = "disabled";
1555                 };
1556
1557                 sdhi2: sd@ee140000 {
1558                         compatible = "renesas,sdhi-r8a7795";
1559                         reg = <0 0xee140000 0 0x2000>;
1560                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1561                         clocks = <&cpg CPG_MOD 312>;
1562                         max-frequency = <200000000>;
1563                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1564                         resets = <&cpg 312>;
1565                         status = "disabled";
1566                 };
1567
1568                 sdhi3: sd@ee160000 {
1569                         compatible = "renesas,sdhi-r8a7795";
1570                         reg = <0 0xee160000 0 0x2000>;
1571                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1572                         clocks = <&cpg CPG_MOD 311>;
1573                         max-frequency = <200000000>;
1574                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1575                         resets = <&cpg 311>;
1576                         status = "disabled";
1577                 };
1578
1579                 usb2_phy0: usb-phy@ee080200 {
1580                         compatible = "renesas,usb2-phy-r8a7795",
1581                                      "renesas,rcar-gen3-usb2-phy";
1582                         reg = <0 0xee080200 0 0x700>;
1583                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1584                         clocks = <&cpg CPG_MOD 703>;
1585                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1586                         resets = <&cpg 703>;
1587                         #phy-cells = <0>;
1588                         status = "disabled";
1589                 };
1590
1591                 usb2_phy1: usb-phy@ee0a0200 {
1592                         compatible = "renesas,usb2-phy-r8a7795",
1593                                      "renesas,rcar-gen3-usb2-phy";
1594                         reg = <0 0xee0a0200 0 0x700>;
1595                         clocks = <&cpg CPG_MOD 702>;
1596                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1597                         resets = <&cpg 702>;
1598                         #phy-cells = <0>;
1599                         status = "disabled";
1600                 };
1601
1602                 usb2_phy2: usb-phy@ee0c0200 {
1603                         compatible = "renesas,usb2-phy-r8a7795",
1604                                      "renesas,rcar-gen3-usb2-phy";
1605                         reg = <0 0xee0c0200 0 0x700>;
1606                         clocks = <&cpg CPG_MOD 701>;
1607                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1608                         resets = <&cpg 701>;
1609                         #phy-cells = <0>;
1610                         status = "disabled";
1611                 };
1612
1613                 usb2_phy3: usb-phy@ee0e0200 {
1614                         compatible = "renesas,usb2-phy-r8a7795",
1615                                      "renesas,rcar-gen3-usb2-phy";
1616                         reg = <0 0xee0e0200 0 0x700>;
1617                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1618                         clocks = <&cpg CPG_MOD 700>;
1619                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1620                         resets = <&cpg 700>;
1621                         #phy-cells = <0>;
1622                         status = "disabled";
1623                 };
1624
1625                 ehci0: usb@ee080100 {
1626                         compatible = "generic-ehci";
1627                         reg = <0 0xee080100 0 0x100>;
1628                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1629                         clocks = <&cpg CPG_MOD 703>;
1630                         phys = <&usb2_phy0>;
1631                         phy-names = "usb";
1632                         companion = <&ohci0>;
1633                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1634                         resets = <&cpg 703>;
1635                         status = "disabled";
1636                 };
1637
1638                 ehci1: usb@ee0a0100 {
1639                         compatible = "generic-ehci";
1640                         reg = <0 0xee0a0100 0 0x100>;
1641                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1642                         clocks = <&cpg CPG_MOD 702>;
1643                         phys = <&usb2_phy1>;
1644                         phy-names = "usb";
1645                         companion = <&ohci1>;
1646                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1647                         resets = <&cpg 702>;
1648                         status = "disabled";
1649                 };
1650
1651                 ehci2: usb@ee0c0100 {
1652                         compatible = "generic-ehci";
1653                         reg = <0 0xee0c0100 0 0x100>;
1654                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1655                         clocks = <&cpg CPG_MOD 701>;
1656                         phys = <&usb2_phy2>;
1657                         phy-names = "usb";
1658                         companion = <&ohci2>;
1659                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1660                         resets = <&cpg 701>;
1661                         status = "disabled";
1662                 };
1663
1664                 ehci3: usb@ee0e0100 {
1665                         compatible = "generic-ehci";
1666                         reg = <0 0xee0e0100 0 0x100>;
1667                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1668                         clocks = <&cpg CPG_MOD 700>;
1669                         phys = <&usb2_phy3>;
1670                         phy-names = "usb";
1671                         companion = <&ohci3>;
1672                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1673                         resets = <&cpg 700>;
1674                         status = "disabled";
1675                 };
1676
1677                 ohci0: usb@ee080000 {
1678                         compatible = "generic-ohci";
1679                         reg = <0 0xee080000 0 0x100>;
1680                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1681                         clocks = <&cpg CPG_MOD 703>;
1682                         phys = <&usb2_phy0>;
1683                         phy-names = "usb";
1684                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1685                         resets = <&cpg 703>;
1686                         status = "disabled";
1687                 };
1688
1689                 ohci1: usb@ee0a0000 {
1690                         compatible = "generic-ohci";
1691                         reg = <0 0xee0a0000 0 0x100>;
1692                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1693                         clocks = <&cpg CPG_MOD 702>;
1694                         phys = <&usb2_phy1>;
1695                         phy-names = "usb";
1696                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1697                         resets = <&cpg 702>;
1698                         status = "disabled";
1699                 };
1700
1701                 ohci2: usb@ee0c0000 {
1702                         compatible = "generic-ohci";
1703                         reg = <0 0xee0c0000 0 0x100>;
1704                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1705                         clocks = <&cpg CPG_MOD 701>;
1706                         phys = <&usb2_phy2>;
1707                         phy-names = "usb";
1708                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1709                         resets = <&cpg 701>;
1710                         status = "disabled";
1711                 };
1712
1713                 ohci3: usb@ee0e0000 {
1714                         compatible = "generic-ohci";
1715                         reg = <0 0xee0e0000 0 0x100>;
1716                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
1717                         clocks = <&cpg CPG_MOD 700>;
1718                         phys = <&usb2_phy3>;
1719                         phy-names = "usb";
1720                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1721                         resets = <&cpg 700>;
1722                         status = "disabled";
1723                 };
1724
1725                 hsusb: usb@e6590000 {
1726                         compatible = "renesas,usbhs-r8a7795",
1727                                      "renesas,rcar-gen3-usbhs";
1728                         reg = <0 0xe6590000 0 0x100>;
1729                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1730                         clocks = <&cpg CPG_MOD 704>;
1731                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1732                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1733                         dma-names = "ch0", "ch1", "ch2", "ch3";
1734                         renesas,buswait = <11>;
1735                         phys = <&usb2_phy0>;
1736                         phy-names = "usb";
1737                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1738                         resets = <&cpg 704>;
1739                         status = "disabled";
1740                 };
1741
1742                 hsusb3: usb@e659c000 {
1743                         compatible = "renesas,usbhs-r8a7795",
1744                                      "renesas,rcar-gen3-usbhs";
1745                         reg = <0 0xe659c000 0 0x100>;
1746                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1747                         clocks = <&cpg CPG_MOD 705>;
1748                         dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
1749                                <&usb_dmac3 0>, <&usb_dmac3 1>;
1750                         dma-names = "ch0", "ch1", "ch2", "ch3";
1751                         renesas,buswait = <11>;
1752                         phys = <&usb2_phy3>;
1753                         phy-names = "usb";
1754                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1755                         resets = <&cpg 705>;
1756                         status = "disabled";
1757                 };
1758
1759                 pciec0: pcie@fe000000 {
1760                         compatible = "renesas,pcie-r8a7795",
1761                                      "renesas,pcie-rcar-gen3";
1762                         reg = <0 0xfe000000 0 0x80000>;
1763                         #address-cells = <3>;
1764                         #size-cells = <2>;
1765                         bus-range = <0x00 0xff>;
1766                         device_type = "pci";
1767                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1768                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1769                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1770                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1771                         /* Map all possible DDR as inbound ranges */
1772                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1773                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1774                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1775                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1776                         #interrupt-cells = <1>;
1777                         interrupt-map-mask = <0 0 0 0>;
1778                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1779                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1780                         clock-names = "pcie", "pcie_bus";
1781                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1782                         resets = <&cpg 319>;
1783                         status = "disabled";
1784                 };
1785
1786                 pciec1: pcie@ee800000 {
1787                         compatible = "renesas,pcie-r8a7795",
1788                                      "renesas,pcie-rcar-gen3";
1789                         reg = <0 0xee800000 0 0x80000>;
1790                         #address-cells = <3>;
1791                         #size-cells = <2>;
1792                         bus-range = <0x00 0xff>;
1793                         device_type = "pci";
1794                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1795                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1796                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1797                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1798                         /* Map all possible DDR as inbound ranges */
1799                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1800                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1801                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1802                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1803                         #interrupt-cells = <1>;
1804                         interrupt-map-mask = <0 0 0 0>;
1805                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1806                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1807                         clock-names = "pcie", "pcie_bus";
1808                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1809                         resets = <&cpg 318>;
1810                         status = "disabled";
1811                 };
1812
1813                 imr-lx4@fe860000 {
1814                         compatible = "renesas,r8a7795-imr-lx4",
1815                                      "renesas,imr-lx4";
1816                         reg = <0 0xfe860000 0 0x2000>;
1817                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
1818                         clocks = <&cpg CPG_MOD 823>;
1819                         power-domains = <&sysc R8A7795_PD_A3VC>;
1820                         resets = <&cpg 823>;
1821                 };
1822
1823                 imr-lx4@fe870000 {
1824                         compatible = "renesas,r8a7795-imr-lx4",
1825                                      "renesas,imr-lx4";
1826                         reg = <0 0xfe870000 0 0x2000>;
1827                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
1828                         clocks = <&cpg CPG_MOD 822>;
1829                         power-domains = <&sysc R8A7795_PD_A3VC>;
1830                         resets = <&cpg 822>;
1831                 };
1832
1833                 imr-lx4@fe880000 {
1834                         compatible = "renesas,r8a7795-imr-lx4",
1835                                      "renesas,imr-lx4";
1836                         reg = <0 0xfe880000 0 0x2000>;
1837                         interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
1838                         clocks = <&cpg CPG_MOD 821>;
1839                         power-domains = <&sysc R8A7795_PD_A3VC>;
1840                         resets = <&cpg 821>;
1841                 };
1842
1843                 imr-lx4@fe890000 {
1844                         compatible = "renesas,r8a7795-imr-lx4",
1845                                      "renesas,imr-lx4";
1846                         reg = <0 0xfe890000 0 0x2000>;
1847                         interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
1848                         clocks = <&cpg CPG_MOD 820>;
1849                         power-domains = <&sysc R8A7795_PD_A3VC>;
1850                         resets = <&cpg 820>;
1851                 };
1852
1853                 vspbc: vsp@fe920000 {
1854                         compatible = "renesas,vsp2";
1855                         reg = <0 0xfe920000 0 0x8000>;
1856                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1857                         clocks = <&cpg CPG_MOD 624>;
1858                         power-domains = <&sysc R8A7795_PD_A3VP>;
1859                         resets = <&cpg 624>;
1860
1861                         renesas,fcp = <&fcpvb1>;
1862                 };
1863
1864                 fcpvb1: fcp@fe92f000 {
1865                         compatible = "renesas,fcpv";
1866                         reg = <0 0xfe92f000 0 0x200>;
1867                         clocks = <&cpg CPG_MOD 606>;
1868                         power-domains = <&sysc R8A7795_PD_A3VP>;
1869                         resets = <&cpg 606>;
1870                 };
1871
1872                 fcpf0: fcp@fe950000 {
1873                         compatible = "renesas,fcpf";
1874                         reg = <0 0xfe950000 0 0x200>;
1875                         clocks = <&cpg CPG_MOD 615>;
1876                         power-domains = <&sysc R8A7795_PD_A3VP>;
1877                         resets = <&cpg 615>;
1878                 };
1879
1880                 fcpf1: fcp@fe951000 {
1881                         compatible = "renesas,fcpf";
1882                         reg = <0 0xfe951000 0 0x200>;
1883                         clocks = <&cpg CPG_MOD 614>;
1884                         power-domains = <&sysc R8A7795_PD_A3VP>;
1885                         resets = <&cpg 614>;
1886                 };
1887
1888                 vspbd: vsp@fe960000 {
1889                         compatible = "renesas,vsp2";
1890                         reg = <0 0xfe960000 0 0x8000>;
1891                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1892                         clocks = <&cpg CPG_MOD 626>;
1893                         power-domains = <&sysc R8A7795_PD_A3VP>;
1894                         resets = <&cpg 626>;
1895
1896                         renesas,fcp = <&fcpvb0>;
1897                 };
1898
1899                 fcpvb0: fcp@fe96f000 {
1900                         compatible = "renesas,fcpv";
1901                         reg = <0 0xfe96f000 0 0x200>;
1902                         clocks = <&cpg CPG_MOD 607>;
1903                         power-domains = <&sysc R8A7795_PD_A3VP>;
1904                         resets = <&cpg 607>;
1905                 };
1906
1907                 vspi0: vsp@fe9a0000 {
1908                         compatible = "renesas,vsp2";
1909                         reg = <0 0xfe9a0000 0 0x8000>;
1910                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1911                         clocks = <&cpg CPG_MOD 631>;
1912                         power-domains = <&sysc R8A7795_PD_A3VP>;
1913                         resets = <&cpg 631>;
1914
1915                         renesas,fcp = <&fcpvi0>;
1916                 };
1917
1918                 fcpvi0: fcp@fe9af000 {
1919                         compatible = "renesas,fcpv";
1920                         reg = <0 0xfe9af000 0 0x200>;
1921                         clocks = <&cpg CPG_MOD 611>;
1922                         power-domains = <&sysc R8A7795_PD_A3VP>;
1923                         resets = <&cpg 611>;
1924                 };
1925
1926                 vspi1: vsp@fe9b0000 {
1927                         compatible = "renesas,vsp2";
1928                         reg = <0 0xfe9b0000 0 0x8000>;
1929                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1930                         clocks = <&cpg CPG_MOD 630>;
1931                         power-domains = <&sysc R8A7795_PD_A3VP>;
1932                         resets = <&cpg 630>;
1933
1934                         renesas,fcp = <&fcpvi1>;
1935                 };
1936
1937                 fcpvi1: fcp@fe9bf000 {
1938                         compatible = "renesas,fcpv";
1939                         reg = <0 0xfe9bf000 0 0x200>;
1940                         clocks = <&cpg CPG_MOD 610>;
1941                         power-domains = <&sysc R8A7795_PD_A3VP>;
1942                         resets = <&cpg 610>;
1943                 };
1944
1945                 vspd0: vsp@fea20000 {
1946                         compatible = "renesas,vsp2";
1947                         reg = <0 0xfea20000 0 0x4000>;
1948                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1949                         clocks = <&cpg CPG_MOD 623>;
1950                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1951                         resets = <&cpg 623>;
1952
1953                         renesas,fcp = <&fcpvd0>;
1954                 };
1955
1956                 fcpvd0: fcp@fea27000 {
1957                         compatible = "renesas,fcpv";
1958                         reg = <0 0xfea27000 0 0x200>;
1959                         clocks = <&cpg CPG_MOD 603>;
1960                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1961                         resets = <&cpg 603>;
1962                 };
1963
1964                 vspd1: vsp@fea28000 {
1965                         compatible = "renesas,vsp2";
1966                         reg = <0 0xfea28000 0 0x4000>;
1967                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1968                         clocks = <&cpg CPG_MOD 622>;
1969                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1970                         resets = <&cpg 622>;
1971
1972                         renesas,fcp = <&fcpvd1>;
1973                 };
1974
1975                 fcpvd1: fcp@fea2f000 {
1976                         compatible = "renesas,fcpv";
1977                         reg = <0 0xfea2f000 0 0x200>;
1978                         clocks = <&cpg CPG_MOD 602>;
1979                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1980                         resets = <&cpg 602>;
1981                 };
1982
1983                 vspd2: vsp@fea30000 {
1984                         compatible = "renesas,vsp2";
1985                         reg = <0 0xfea30000 0 0x4000>;
1986                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1987                         clocks = <&cpg CPG_MOD 621>;
1988                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1989                         resets = <&cpg 621>;
1990
1991                         renesas,fcp = <&fcpvd2>;
1992                 };
1993
1994                 fcpvd2: fcp@fea37000 {
1995                         compatible = "renesas,fcpv";
1996                         reg = <0 0xfea37000 0 0x200>;
1997                         clocks = <&cpg CPG_MOD 601>;
1998                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1999                         resets = <&cpg 601>;
2000                 };
2001
2002                 fdp1@fe940000 {
2003                         compatible = "renesas,fdp1";
2004                         reg = <0 0xfe940000 0 0x2400>;
2005                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2006                         clocks = <&cpg CPG_MOD 119>;
2007                         power-domains = <&sysc R8A7795_PD_A3VP>;
2008                         resets = <&cpg 119>;
2009                         renesas,fcp = <&fcpf0>;
2010                 };
2011
2012                 fdp1@fe944000 {
2013                         compatible = "renesas,fdp1";
2014                         reg = <0 0xfe944000 0 0x2400>;
2015                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2016                         clocks = <&cpg CPG_MOD 118>;
2017                         power-domains = <&sysc R8A7795_PD_A3VP>;
2018                         resets = <&cpg 118>;
2019                         renesas,fcp = <&fcpf1>;
2020                 };
2021
2022                 hdmi0: hdmi0@fead0000 {
2023                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2024                         reg = <0 0xfead0000 0 0x10000>;
2025                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2026                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2027                         clock-names = "iahb", "isfr";
2028                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2029                         resets = <&cpg 729>;
2030                         status = "disabled";
2031
2032                         ports {
2033                                 #address-cells = <1>;
2034                                 #size-cells = <0>;
2035                                 port@0 {
2036                                         reg = <0>;
2037                                         dw_hdmi0_in: endpoint {
2038                                                 remote-endpoint = <&du_out_hdmi0>;
2039                                         };
2040                                 };
2041                                 port@1 {
2042                                         reg = <1>;
2043                                 };
2044                         };
2045                 };
2046
2047                 hdmi1: hdmi1@feae0000 {
2048                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
2049                         reg = <0 0xfeae0000 0 0x10000>;
2050                         interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
2051                         clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
2052                         clock-names = "iahb", "isfr";
2053                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2054                         resets = <&cpg 728>;
2055                         status = "disabled";
2056
2057                         ports {
2058                                 #address-cells = <1>;
2059                                 #size-cells = <0>;
2060                                 port@0 {
2061                                         reg = <0>;
2062                                         dw_hdmi1_in: endpoint {
2063                                                 remote-endpoint = <&du_out_hdmi1>;
2064                                         };
2065                                 };
2066                                 port@1 {
2067                                         reg = <1>;
2068                                 };
2069                         };
2070                 };
2071
2072                 du: display@feb00000 {
2073                         compatible = "renesas,du-r8a7795";
2074                         reg = <0 0xfeb00000 0 0x80000>,
2075                               <0 0xfeb90000 0 0x14>;
2076                         reg-names = "du", "lvds.0";
2077                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2078                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2079                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
2080                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2081                         clocks = <&cpg CPG_MOD 724>,
2082                                  <&cpg CPG_MOD 723>,
2083                                  <&cpg CPG_MOD 722>,
2084                                  <&cpg CPG_MOD 721>,
2085                                  <&cpg CPG_MOD 727>;
2086                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
2087                         vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
2088                         status = "disabled";
2089
2090                         ports {
2091                                 #address-cells = <1>;
2092                                 #size-cells = <0>;
2093
2094                                 port@0 {
2095                                         reg = <0>;
2096                                         du_out_rgb: endpoint {
2097                                         };
2098                                 };
2099                                 port@1 {
2100                                         reg = <1>;
2101                                         du_out_hdmi0: endpoint {
2102                                                 remote-endpoint = <&dw_hdmi0_in>;
2103                                         };
2104                                 };
2105                                 port@2 {
2106                                         reg = <2>;
2107                                         du_out_hdmi1: endpoint {
2108                                                 remote-endpoint = <&dw_hdmi1_in>;
2109                                         };
2110                                 };
2111                                 port@3 {
2112                                         reg = <3>;
2113                                         du_out_lvds0: endpoint {
2114                                         };
2115                                 };
2116                         };
2117                 };
2118
2119                 tsc: thermal@e6198000 {
2120                         compatible = "renesas,r8a7795-thermal";
2121                         reg = <0 0xe6198000 0 0x68>,
2122                               <0 0xe61a0000 0 0x5c>,
2123                               <0 0xe61a8000 0 0x5c>;
2124                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
2125                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
2126                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
2127                         clocks = <&cpg CPG_MOD 522>;
2128                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2129                         resets = <&cpg 522>;
2130                         #thermal-sensor-cells = <1>;
2131                         status = "okay";
2132                 };
2133
2134                 thermal-zones {
2135                         sensor_thermal1: sensor-thermal1 {
2136                                 polling-delay-passive = <250>;
2137                                 polling-delay = <1000>;
2138                                 thermal-sensors = <&tsc 0>;
2139
2140                                 trips {
2141                                         sensor1_crit: sensor1-crit {
2142                                                 temperature = <120000>;
2143                                                 hysteresis = <2000>;
2144                                                 type = "critical";
2145                                         };
2146                                 };
2147                         };
2148
2149                         sensor_thermal2: sensor-thermal2 {
2150                                 polling-delay-passive = <250>;
2151                                 polling-delay = <1000>;
2152                                 thermal-sensors = <&tsc 1>;
2153
2154                                 trips {
2155                                         sensor2_crit: sensor2-crit {
2156                                                 temperature = <120000>;
2157                                                 hysteresis = <2000>;
2158                                                 type = "critical";
2159                                         };
2160                                 };
2161                         };
2162
2163                         sensor_thermal3: sensor-thermal3 {
2164                                 polling-delay-passive = <250>;
2165                                 polling-delay = <1000>;
2166                                 thermal-sensors = <&tsc 2>;
2167
2168                                 trips {
2169                                         sensor3_crit: sensor3-crit {
2170                                                 temperature = <120000>;
2171                                                 hysteresis = <2000>;
2172                                                 type = "critical";
2173                                         };
2174                                 };
2175                         };
2176                 };
2177         };
2178 };