drivers/net/fm/b4860.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2012 Freescale Semiconductor, Inc.
   4  *      Roy Zang <[email protected]>
   5  */
   6 #include <common.h>
   7 #include <phy.h>
   8 #include <fm_eth.h>
   9 #include <asm/io.h>
  10 #include <asm/immap_85xx.h>
  11 #include <asm/fsl_serdes.h>
  12 #include <hwconfig.h>
  13
  14 u32 port_to_devdisr[] = {
  15         [FM1_DTSEC1] = FSL_CORENET_DEVDISR2_DTSEC1_1,
  16         [FM1_DTSEC2] = FSL_CORENET_DEVDISR2_DTSEC1_2,
  17         [FM1_DTSEC3] = FSL_CORENET_DEVDISR2_DTSEC1_3,
  18         [FM1_DTSEC4] = FSL_CORENET_DEVDISR2_DTSEC1_4,
  19         [FM1_DTSEC5] = FSL_CORENET_DEVDISR2_DTSEC1_5,
  20         [FM1_DTSEC6] = FSL_CORENET_DEVDISR2_DTSEC1_6,
  21         [FM1_10GEC1] = FSL_CORENET_DEVDISR2_10GEC1_1,
  22         [FM1_10GEC2] = FSL_CORENET_DEVDISR2_10GEC1_2,
  23 };
  24
  25 static int is_device_disabled(enum fm_port port)
  26 {
  27         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  28         u32 devdisr2 = in_be32(&gur->devdisr2);
  29
  30         return port_to_devdisr[port] & devdisr2;
  31 }
  32
  33 void fman_disable_port(enum fm_port port)
  34 {
  35         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  36
  37         setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
  38 }
  39
  40 void fman_enable_port(enum fm_port port)
  41 {
  42         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  43
  44         clrbits_be32(&gur->devdisr2, port_to_devdisr[port]);
  45 }
  46
  47 phy_interface_t fman_port_enet_if(enum fm_port port)
  48 {
  49 #if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS)
  50         u32 serdes2_prtcl;
  51         char buffer[HWCONFIG_BUFFER_SIZE];
  52         char *buf = NULL;
  53         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  54 #endif
  55
  56         if (is_device_disabled(port))
  57                 return PHY_INTERFACE_MODE_NONE;
  58
  59         /*B4860 has two 10Gig Mac*/
  60         if ((port == FM1_10GEC1 || port == FM1_10GEC2)  &&
  61             ((is_serdes_configured(XAUI_FM1_MAC9))      ||
  62              #if (!defined(CONFIG_TARGET_B4860QDS) && \
  63                   !defined(CONFIG_TARGET_B4R420QDS))
  64              (is_serdes_configured(XFI_FM1_MAC9))       ||
  65              (is_serdes_configured(XFI_FM1_MAC10))      ||
  66              #endif
  67              (is_serdes_configured(XAUI_FM1_MAC10))
  68              ))
  69                 return PHY_INTERFACE_MODE_XGMII;
  70
  71 #if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS)
  72         serdes2_prtcl = in_be32(&gur->rcwsr[4]) &
  73                         FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
  74
  75         if (serdes2_prtcl) {
  76                 serdes2_prtcl >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
  77                 switch (serdes2_prtcl) {
  78                 case 0x80:
  79                 case 0x81:
  80                 case 0x82:
  81                 case 0x83:
  82                 case 0x84:
  83                 case 0x85:
  84                 case 0x86:
  85                 case 0x87:
  86                 case 0x88:
  87                 case 0x89:
  88                 case 0x8a:
  89                 case 0x8b:
  90                 case 0x8c:
  91                 case 0x8d:
  92                 case 0x8e:
  93                 case 0xb1:
  94                 case 0xb2:
  95                         /*
  96                          * Extract hwconfig from environment since environment
  97                          * is not setup yet
  98                          */
  99                         env_get_f("hwconfig", buffer, sizeof(buffer));
 100                         buf = buffer;
 101
 102                         /* check if XFI interface enable in hwconfig for 10g */
 103                         if (hwconfig_subarg_cmp_f("fsl_b4860_serdes2",
 104                                                   "sfp_amc", "sfp", buf)) {
 105                                 if ((port == FM1_10GEC1 ||
 106                                      port == FM1_10GEC2) &&
 107                                     ((is_serdes_configured(XFI_FM1_MAC9)) ||
 108                                     (is_serdes_configured(XFI_FM1_MAC10))))
 109                                         return PHY_INTERFACE_MODE_XGMII;
 110                                 else if ((port == FM1_DTSEC1) ||
 111                                          (port == FM1_DTSEC2) ||
 112                                          (port == FM1_DTSEC3) ||
 113                                          (port == FM1_DTSEC4))
 114                                         return PHY_INTERFACE_MODE_NONE;
 115                         }
 116                 }
 117         }
 118 #endif
 119
 120         /* Fix me need to handle RGMII here first */
 121
 122         switch (port) {
 123         case FM1_DTSEC1:
 124         case FM1_DTSEC2:
 125         case FM1_DTSEC3:
 126         case FM1_DTSEC4:
 127         case FM1_DTSEC5:
 128         case FM1_DTSEC6:
 129                 if (is_serdes_configured(SGMII_FM1_DTSEC1 + port - FM1_DTSEC1))
 130                         return PHY_INTERFACE_MODE_SGMII;
 131                 break;
 132         default:
 133                 return PHY_INTERFACE_MODE_NONE;
 134         }
 135
 136         return PHY_INTERFACE_MODE_NONE;
 137 }