Bindings/spi/spi-nxp-fspi.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: NXP Flex Serial Peripheral Interface (FSPI)
   8
   9 maintainers:
  10   - Han Xu <[email protected]>
  11   - Kuldeep Singh <[email protected]>
  12
  13 allOf:
  14   - $ref: spi-controller.yaml#
  15
  16 properties:
  17   compatible:
  18     oneOf:
  19       - enum:
  20           - nxp,imx8dxl-fspi
  21           - nxp,imx8mm-fspi
  22           - nxp,imx8mp-fspi
  23           - nxp,imx8qxp-fspi
  24           - nxp,lx2160a-fspi
  25       - items:
  26           - enum:
  27               - nxp,imx93-fspi
  28               - nxp,imx95-fspi
  29           - const: nxp,imx8mm-fspi
  30
  31   reg:
  32     items:
  33       - description: registers address space
  34       - description: memory mapped address space
  35
  36   reg-names:
  37     items:
  38       - const: fspi_base
  39       - const: fspi_mmap
  40
  41   interrupts:
  42     maxItems: 1
  43
  44   clocks:
  45     items:
  46       - description: SPI bus clock
  47       - description: SPI serial clock
  48
  49   clock-names:
  50     items:
  51       - const: fspi_en
  52       - const: fspi
  53
  54   power-domains:
  55     maxItems: 1
  56
  57 required:
  58   - compatible
  59   - reg
  60   - reg-names
  61   - interrupts
  62   - clocks
  63   - clock-names
  64
  65 unevaluatedProperties: false
  66
  67 examples:
  68   - |
  69     #include <dt-bindings/interrupt-controller/arm-gic.h>
  70     #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
  71
  72     soc {
  73         #address-cells = <2>;
  74         #size-cells = <2>;
  75
  76         spi@20c0000 {
  77             compatible = "nxp,lx2160a-fspi";
  78             reg = <0x0 0x20c0000 0x0 0x100000>,
  79                   <0x0 0x20000000 0x0 0x10000000>;
  80             reg-names = "fspi_base", "fspi_mmap";
  81             interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
  82             clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>,
  83                      <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>;
  84             clock-names = "fspi_en", "fspi";
  85             #address-cells = <1>;
  86             #size-cells = <0>;
  87
  88             flash@0 {
  89                 compatible = "jedec,spi-nor";
  90                 spi-max-frequency = <50000000>;
  91                 reg = <0>;
  92                 spi-rx-bus-width = <8>;
  93                 spi-tx-bus-width = <8>;
  94             };
  95         };
  96     };