1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
5 $id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek mt76 wireless devices
16 This node provides properties for configuring the MediaTek mt76xx
17 wireless device. The node is expected to be specified as a child
18 node of the PCI controller to which the wireless chip is connected.
19 Alternatively, it can specify the wireless part of the MT7628/MT7688
26 - mediatek,mt7628-wmac
27 - mediatek,mt7622-wmac
28 - mediatek,mt7981-wmac
29 - mediatek,mt7986-wmac
35 MT7986 should contain 3 regions consys, dcm, and sku, in this order.
40 - description: major interrupt for rings
41 - description: additional interrupt for ring 19
42 - description: additional interrupt for ring 4
43 - description: additional interrupt for ring 5
54 Specify the consys reset for mt7986.
62 Specify the consys clocks for mt7986.
70 $ref: /schemas/types.yaml#/definitions/phandle
72 Phandle to the infrastructure bus fabric syscon node.
73 This property is MT7622 specific
75 ieee80211-freq-limit: true
79 - description: NVMEM cell with EEPROM
86 $ref: /schemas/types.yaml#/definitions/uint32-array
88 EEPROM data embedded as array.
91 $ref: /schemas/types.yaml#/definitions/phandle-array
94 - description: phandle to MTD partition
95 - description: offset containing EEPROM data
97 Phandle to a MTD partition + offset containing EEPROM data
101 $ref: /schemas/types.yaml#/definitions/flag
103 Specify if the radio eeprom partition is written in big-endian
105 mediatek,eeprom-merge-otp:
108 Merge EEPROM data with OTP data. Can be used on boards where the flash
109 calibration data is generic and specific calibration data should be
110 pulled from the OTP ROM
112 mediatek,disable-radar-background:
115 Disable/enable radar/CAC detection running on a dedicated offchannel
116 chain available on some hw.
117 Background radar/CAC detection allows to avoid the CAC downtime
118 switching on a different channel during CAC detection on the selected
123 $ref: /schemas/leds/common.yaml#
124 additionalProperties: false
128 LED is enabled with ground signal.
136 additionalProperties: false
140 additionalProperties: false
143 $ref: /schemas/types.yaml#/definitions/string
145 Regdomain refers to a legal regulatory region. Different
146 countries define different levels of allowable transmitter
147 power, time that a channel can be occupied, and different
157 additionalProperties: false
161 additionalProperties: false
164 $ref: /schemas/types.yaml#/definitions/uint32-array
168 Pairs of first and last channel number of the selected
172 $ref: /schemas/types.yaml#/definitions/uint8-array
176 4 half-dBm per-rate power limit values
179 $ref: /schemas/types.yaml#/definitions/uint8-array
183 8 half-dBm per-rate power limit values
186 $ref: /schemas/types.yaml#/definitions/uint8-matrix
188 Sets of per-rate power limit values for 802.11n/802.11ac
189 rates for multiple channel bandwidth settings.
190 Each set starts with the number of channel bandwidth
191 settings for which the rate set applies, followed by
192 either 8 or 10 power limit values. The order of the
193 channel bandwidth settings is 20, 40, 80 and 160 MHz.
200 $ref: /schemas/types.yaml#/definitions/uint8-matrix
202 Sets of per-rate power limit values for 802.11ax rates
203 for multiple channel bandwidth or resource unit settings.
204 Each set starts with the number of channel bandwidth or
205 resource unit settings for which the rate set applies,
206 followed by 12 power limit values. The order of the
207 channel resource unit settings is RU26, RU52, RU106,
208 RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160.
214 $ref: /schemas/types.yaml#/definitions/uint32-array
216 Half-dBm power delta for different numbers of antennas
223 - $ref: ieee80211.yaml#
229 - mediatek,mt7981-wmac
230 - mediatek,mt7986-wmac
240 unevaluatedProperties: false
245 #address-cells = <3>;
248 compatible = "mediatek,mt76";
249 reg = <0x0000 0 0 0 0>;
250 ieee80211-freq-limit = <5000000 6000000>;
251 mediatek,mtd-eeprom = <&factory 0x8000>;
264 rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>;
265 rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>,
266 /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>;
267 rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>,
268 /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>;
271 channels = <100 181>;
272 rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>;
273 rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>;
274 txs-delta = <12 9 6>;
275 rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>;
285 compatible = "mediatek,mt7628-wmac";
286 reg = <0x10300000 0x100000>;
288 interrupt-parent = <&cpuintc>;
291 nvmem-cells = <&eeprom>;
292 nvmem-cell-names = "eeprom";
296 #include <dt-bindings/interrupt-controller/arm-gic.h>
297 #include <dt-bindings/interrupt-controller/irq.h>
299 compatible = "mediatek,mt7622-wmac";
300 reg = <0x10300000 0x100000>;
301 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>;
303 mediatek,infracfg = <&infracfg>;
305 power-domains = <&scpsys 3>;
310 compatible = "mediatek,mt7986-wmac";
311 resets = <&watchdog 23>;
312 reset-names = "consys";
313 reg = <0x18000000 0x1000000>,
316 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
318 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
319 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
320 clocks = <&topckgen 50>,
322 clock-names = "mcu", "ap2conn";
323 memory-region = <&wmcpu_emi>;