include/configs/UCP1020.h

   1 /*
   2  * Copyright 2013-2015 Arcturus Networks, Inc.
   3  *           http://www.arcturusnetworks.com/products/ucp1020/
   4  * based on include/configs/p1_p2_rdb_pc.h
   5  * original copyright follows:
   6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 /*
  12  * QorIQ uCP1020-xx boards configuration file
  13  */
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 #define CONFIG_FSL_ELBC
  18 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  19 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  20 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  21 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  22 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  23 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  24
  25 #if defined(CONFIG_TARTGET_UCP1020T1)
  26
  27 #define CONFIG_UCP1020_REV_1_3
  28
  29 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  30
  31 #define CONFIG_TSEC_ENET
  32 #define CONFIG_TSEC1
  33 #define CONFIG_TSEC3
  34 #define CONFIG_HAS_ETH0
  35 #define CONFIG_HAS_ETH1
  36 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  37 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  38 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  39 #define CONFIG_IPADDR           10.80.41.229
  40 #define CONFIG_SERVERIP         10.80.41.227
  41 #define CONFIG_NETMASK          255.255.252.0
  42 #define CONFIG_ETHPRIME         "eTSEC3"
  43
  44 #ifndef CONFIG_SPI_FLASH
  45 #endif
  46 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  47
  48 #define CONFIG_MMC
  49 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  50
  51 #define CONFIG_LAST_STAGE_INIT
  52
  53 #endif
  54
  55 #if defined(CONFIG_TARGET_UCP1020)
  56
  57 #define CONFIG_UCP1020
  58 #define CONFIG_UCP1020_REV_1_3
  59
  60 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  61
  62 #define CONFIG_TSEC_ENET
  63 #define CONFIG_TSEC1
  64 #define CONFIG_TSEC2
  65 #define CONFIG_TSEC3
  66 #define CONFIG_HAS_ETH0
  67 #define CONFIG_HAS_ETH1
  68 #define CONFIG_HAS_ETH2
  69 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  70 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  71 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  72 #define CONFIG_IPADDR           192.168.1.81
  73 #define CONFIG_IPADDR1          192.168.1.82
  74 #define CONFIG_IPADDR2          192.168.1.83
  75 #define CONFIG_SERVERIP         192.168.1.80
  76 #define CONFIG_GATEWAYIP        102.168.1.1
  77 #define CONFIG_NETMASK          255.255.255.0
  78 #define CONFIG_ETHPRIME         "eTSEC1"
  79
  80 #ifndef CONFIG_SPI_FLASH
  81 #endif
  82 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  83
  84 #define CONFIG_MMC
  85 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  86
  87 #define CONFIG_LAST_STAGE_INIT
  88
  89 #endif
  90
  91 #ifdef CONFIG_SDCARD
  92 #define CONFIG_RAMBOOT_SDCARD
  93 #define CONFIG_SYS_RAMBOOT
  94 #define CONFIG_SYS_EXTRA_ENV_RELOC
  95 #define CONFIG_SYS_TEXT_BASE            0x11000000
  96 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  97 #endif
  98
  99 #ifdef CONFIG_SPIFLASH
 100 #define CONFIG_RAMBOOT_SPIFLASH
 101 #define CONFIG_SYS_RAMBOOT
 102 #define CONFIG_SYS_EXTRA_ENV_RELOC
 103 #define CONFIG_SYS_TEXT_BASE            0x11000000
 104 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 105 #endif
 106
 107 #ifndef CONFIG_SYS_TEXT_BASE
 108 #define CONFIG_SYS_TEXT_BASE            0xeff80000
 109 #endif
 110 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
 111
 112 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 113 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
 114 #endif
 115
 116 #ifndef CONFIG_SYS_MONITOR_BASE
 117 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 118 #endif
 119
 120 /* High Level Configuration Options */
 121 #define CONFIG_BOOKE
 122 #define CONFIG_E500
 123 /* #define CONFIG_MPC85xx */
 124
 125 #define CONFIG_MP
 126
 127 #define CONFIG_FSL_LAW
 128
 129 #define CONFIG_ENV_OVERWRITE
 130
 131 #define CONFIG_CMD_SATA
 132 #define CONFIG_SATA_SIL
 133 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 134 #define CONFIG_LIBATA
 135 #define CONFIG_LBA48
 136
 137 #define CONFIG_SYS_CLK_FREQ     66666666
 138 #define CONFIG_DDR_CLK_FREQ     66666666
 139
 140 #define CONFIG_HWCONFIG
 141
 142 #define CONFIG_DTT_ADM1021      1       /* ADM1021 temp sensor support  */
 143 #define CONFIG_SYS_DTT_BUS_NUM  1       /* The I2C bus for DTT          */
 144 #define CONFIG_DTT_SENSORS      { 0, 1 }        /* Sensor index */
 145 /*
 146  * ADM1021/NCT72 temp sensor configuration (see dtt/adm1021.c for details).
 147  * there will be one entry in this array for each two (dummy) sensors in
 148  * CONFIG_DTT_SENSORS.
 149  *
 150  * For uCP1020 module:
 151  * - only one ADM1021/NCT72
 152  * - i2c addr 0x41
 153  * - conversion rate 0x02 = 0.25 conversions/second
 154  * - ALERT output disabled
 155  * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
 156  * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg
 157  */
 158 #define CONFIG_SYS_DTT_ADM1021  { { CONFIG_SYS_I2C_NCT72_ADDR, \
 159                                          0x02, 0, 1, 0, 85, 1, 0, 85} }
 160
 161 #define CONFIG_CMD_DTT
 162
 163 /*
 164  * These can be toggled for performance analysis, otherwise use default.
 165  */
 166 #define CONFIG_L2_CACHE
 167 #define CONFIG_BTB
 168
 169 #define CONFIG_BOARD_EARLY_INIT_F       /* Call board_pre_init */
 170
 171 #define CONFIG_ENABLE_36BIT_PHYS
 172
 173 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 174 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 175 #define CONFIG_PANIC_HANG       /* do not reset board on panic */
 176
 177 #define CONFIG_SYS_CCSRBAR              0xffe00000
 178 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 179
 180 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 181        SPL code*/
 182 #ifdef CONFIG_SPL_BUILD
 183 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 184 #endif
 185
 186 /* DDR Setup */
 187 #define CONFIG_DDR_ECC_ENABLE
 188 #define CONFIG_SYS_FSL_DDR3
 189 #ifndef CONFIG_DDR_ECC_ENABLE
 190 #define CONFIG_SYS_DDR_RAW_TIMING
 191 #define CONFIG_DDR_SPD
 192 #endif
 193 #define CONFIG_SYS_SPD_BUS_NUM 1
 194 #undef CONFIG_FSL_DDR_INTERACTIVE
 195
 196 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 197 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 198 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 199 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 200 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 201
 202 #define CONFIG_NUM_DDR_CONTROLLERS      1
 203 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 204
 205 /* Default settings for DDR3 */
 206 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 207 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 208 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 209 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 210 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 211 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 212
 213 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 214 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 215 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 216 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 217
 218 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 219 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 220 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 221 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 222 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 223 #ifdef CONFIG_DDR_ECC_ENABLE
 224 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 225 #else
 226 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 227 #endif
 228 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 229 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 230 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 231
 232 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 233 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 234 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 235 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 236 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 237 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 238 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 239 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 240
 241 #undef CONFIG_CLOCKS_IN_MHZ
 242
 243 /*
 244  * Memory map
 245  *
 246  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 247  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 248  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 249  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 250  *   (early boot only)
 251  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 252  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 253  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 254  */
 255
 256 /*
 257  * Local Bus Definitions
 258  */
 259 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 260 #define CONFIG_SYS_FLASH_BASE           0xec000000
 261
 262 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 263
 264 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 265         | BR_PS_16 | BR_V)
 266
 267 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 268
 269 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 270 #define CONFIG_SYS_FLASH_QUIET_TEST
 271 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 272
 273 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 274
 275 #undef CONFIG_SYS_FLASH_CHECKSUM
 276 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 277 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 278
 279 #define CONFIG_FLASH_CFI_DRIVER
 280 #define CONFIG_SYS_FLASH_CFI
 281 #define CONFIG_SYS_FLASH_EMPTY_INFO
 282 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 283
 284 #define CONFIG_BOARD_EARLY_INIT_R       /* call board_early_init_r function */
 285
 286 #define CONFIG_SYS_INIT_RAM_LOCK
 287 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 288 /* Initial L1 address */
 289 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 290 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 291 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 292 /* Size of used area in RAM */
 293 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 294
 295 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 296                                         GENERATED_GBL_DATA_SIZE)
 297 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 298
 299 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 300 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 301
 302 #define CONFIG_SYS_PMC_BASE     0xff980000
 303 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 304 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 305                                         BR_PS_8 | BR_V)
 306 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 307                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 308                                  OR_GPCM_EAD)
 309
 310 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 311 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 312 #ifdef CONFIG_NAND_FSL_ELBC
 313 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 314 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 315 #endif
 316
 317 /* Serial Port - controlled on board with jumper J8
 318  * open - index 2
 319  * shorted - index 1
 320  */
 321 #define CONFIG_CONS_INDEX               1
 322 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 323 #define CONFIG_SYS_NS16550_SERIAL
 324 #define CONFIG_SYS_NS16550_REG_SIZE     1
 325 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 326 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 327 #define CONFIG_NS16550_MIN_FUNCTIONS
 328 #endif
 329
 330 #define CONFIG_SYS_BAUDRATE_TABLE       \
 331         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 332
 333 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 334 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 335
 336 /* I2C */
 337 #define CONFIG_SYS_I2C
 338 #define CONFIG_SYS_I2C_FSL
 339 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 340 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 341 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 342 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 343 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 344 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 345 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 346 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 347
 348 #define CONFIG_RTC_DS1337
 349 #define CONFIG_SYS_RTC_DS1337_NOOSC
 350 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 351 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 352 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 353 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 354
 355 /*
 356  * eSPI - Enhanced SPI
 357  */
 358 #define CONFIG_HARD_SPI
 359
 360 #define CONFIG_SF_DEFAULT_SPEED         10000000
 361 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 362
 363 #if defined(CONFIG_PCI)
 364 /*
 365  * General PCI
 366  * Memory space is mapped 1-1, but I/O space must start from 0.
 367  */
 368
 369 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 370 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 371 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 372 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 373 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 374 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 375 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 376 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 377 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 378 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 379
 380 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 381 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 382 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 383 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 384 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 385 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 386 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 387 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 388 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 389 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 390
 391 #define CONFIG_CMD_PCI
 392
 393 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 394 #define CONFIG_DOS_PARTITION
 395 #endif /* CONFIG_PCI */
 396
 397 /*
 398  * Environment
 399  */
 400 #ifdef CONFIG_ENV_FIT_UCBOOT
 401
 402 #define CONFIG_ENV_IS_IN_FLASH
 403 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 404 #define CONFIG_ENV_SIZE         0x20000
 405 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 406
 407 #else
 408
 409 #define CONFIG_ENV_SPI_BUS      0
 410 #define CONFIG_ENV_SPI_CS       0
 411 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 412 #define CONFIG_ENV_SPI_MODE     0
 413
 414 #ifdef CONFIG_RAMBOOT_SPIFLASH
 415
 416 #define CONFIG_ENV_IS_IN_SPI_FLASH
 417 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 418 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 419 #define CONFIG_ENV_SECT_SIZE    0x1000
 420
 421 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 422 /* Address and size of Redundant Environment Sector     */
 423 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 424 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 425 #endif
 426
 427 #elif defined(CONFIG_RAMBOOT_SDCARD)
 428 #define CONFIG_ENV_IS_IN_MMC
 429 #define CONFIG_FSL_FIXED_MMC_LOCATION
 430 #define CONFIG_ENV_SIZE         0x2000
 431 #define CONFIG_SYS_MMC_ENV_DEV  0
 432
 433 #elif defined(CONFIG_SYS_RAMBOOT)
 434 #define CONFIG_ENV_IS_NOWHERE   /* Store ENV in memory only */
 435 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 436 #define CONFIG_ENV_SIZE         0x2000
 437
 438 #else
 439 #define CONFIG_ENV_IS_IN_FLASH
 440 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 441 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 442 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 443 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 444 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 445 /* Address and size of Redundant Environment Sector     */
 446 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 447 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 448 #endif
 449
 450 #endif
 451
 452 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 453
 454 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 455 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 456
 457 /*
 458  * Command line configuration.
 459  */
 460 #define CONFIG_CMD_IRQ
 461 #define CONFIG_CMD_DATE
 462 #define CONFIG_CMD_IRQ
 463 #define CONFIG_CMD_REGINFO
 464 #define CONFIG_CMD_ERRATA
 465 #define CONFIG_CMD_CRAMFS
 466
 467 /*
 468  * USB
 469  */
 470 #define CONFIG_HAS_FSL_DR_USB
 471
 472 #if defined(CONFIG_HAS_FSL_DR_USB)
 473 #define CONFIG_USB_EHCI
 474
 475 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 476
 477 #ifdef CONFIG_USB_EHCI
 478 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 479 #define CONFIG_USB_EHCI_FSL
 480 #endif
 481 #endif
 482
 483 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 484
 485 #ifdef CONFIG_MMC
 486 #define CONFIG_FSL_ESDHC
 487 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 488 #define CONFIG_MMC_SPI
 489 #define CONFIG_CMD_MMC_SPI
 490 #define CONFIG_GENERIC_MMC
 491 #endif
 492
 493 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) || defined(CONFIG_FSL_SATA)
 494 #define CONFIG_DOS_PARTITION
 495 #endif
 496
 497 /* Misc Extra Settings */
 498 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 499
 500 /*
 501  * Miscellaneous configurable options
 502  */
 503 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 504 #define CONFIG_CMDLINE_EDITING                  /* Command-line editing */
 505 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 506 #if defined(CONFIG_CMD_KGDB)
 507 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size */
 508 #else
 509 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 510 #endif
 511 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 512         /* Print Buffer Size */
 513 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 514 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
 515 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 516
 517 /*
 518  * For booting Linux, the board info and command line data
 519  * have to be in the first 64 MB of memory, since this is
 520  * the maximum mapped by the Linux kernel during initialization.
 521  */
 522 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 523 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 524
 525 #if defined(CONFIG_CMD_KGDB)
 526 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 527 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 528 #endif
 529
 530 /*
 531  * Environment Configuration
 532  */
 533
 534 #if defined(CONFIG_TSEC_ENET)
 535
 536 #if defined(CONFIG_UCP1020_REV_1_2)
 537 #define CONFIG_PHY_MICREL_KSZ9021
 538 #elif defined(CONFIG_UCP1020_REV_1_3)
 539 #define CONFIG_PHY_MICREL_KSZ9031
 540 #else
 541 #error "UCP1020 module revision is not defined !!!"
 542 #endif
 543
 544 #define CONFIG_BOOTP_SERVERIP
 545
 546 #define CONFIG_MII              /* MII PHY management */
 547 #define CONFIG_TSEC1_NAME       "eTSEC1"
 548 #define CONFIG_TSEC2_NAME       "eTSEC2"
 549 #define CONFIG_TSEC3_NAME       "eTSEC3"
 550
 551 #define TSEC1_PHY_ADDR  4
 552 #define TSEC2_PHY_ADDR  0
 553 #define TSEC2_PHY_ADDR_SGMII    0x00
 554 #define TSEC3_PHY_ADDR  6
 555
 556 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 557 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 558 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 559
 560 #define TSEC1_PHYIDX    0
 561 #define TSEC2_PHYIDX    0
 562 #define TSEC3_PHYIDX    0
 563
 564 #define CONFIG_PHY_GIGE 1       /* Include GbE speed/duplex detection */
 565
 566 #endif
 567
 568 #define CONFIG_HOSTNAME         UCP1020
 569 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 570 #define CONFIG_BOOTFILE         "uImage"
 571 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 572
 573 /* default location for tftp and bootm */
 574 #define CONFIG_LOADADDR         1000000
 575
 576 #define CONFIG_BOOTARGS /* the boot command will set bootargs */
 577
 578 #define CONFIG_BAUDRATE 115200
 579
 580 #if defined(CONFIG_DONGLE)
 581
 582 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 583 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 584 "bootfile=uImage\0"                                                     \
 585 "consoledev=ttyS0\0"                                                    \
 586 "cramfsfile=image.cramfs\0"                                             \
 587 "dtbaddr=0x00c00000\0"                                                  \
 588 "dtbfile=image.dtb\0"                                                   \
 589 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 590 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 591 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 592 "fileaddr=0x01000000\0"                                                 \
 593 "filesize=0x00080000\0"                                                 \
 594 "flashmbr=sf probe 0; "                                                 \
 595         "tftp $loadaddr $mbr; "                                         \
 596         "sf erase $mbr_offset +$filesize; "                             \
 597         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 598 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 599         "protect off $nor_recoveryaddr +$filesize; "                    \
 600         "erase $nor_recoveryaddr +$filesize; "                          \
 601         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 602         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 603 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 604         "protect off $nor_ubootaddr +$filesize; "                       \
 605         "erase $nor_ubootaddr +$filesize; "                             \
 606         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 607         "protect on $nor_ubootaddr +$filesize\0 "                       \
 608 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 609         "protect off $nor_workingaddr +$filesize; "                     \
 610         "erase $nor_workingaddr +$filesize; "                           \
 611         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 612         "protect on $nor_workingaddr +$filesize\0 "                     \
 613 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 614 "kerneladdr=0x01100000\0"                                               \
 615 "kernelfile=uImage\0"                                                   \
 616 "loadaddr=0x01000000\0"                                                 \
 617 "mbr=uCP1020d.mbr\0"                                                    \
 618 "mbr_offset=0x00000000\0"                                               \
 619 "mmbr=uCP1020Quiet.mbr\0"                                               \
 620 "mmcpart=0:2\0"                                                         \
 621 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 622         "mmc erase 1 1; "                                               \
 623         "mmc write $loadaddr 1 1\0"                                     \
 624 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 625         "mmc erase 0x40 0x400; "                                        \
 626         "mmc write $loadaddr 0x40 0x400\0"                              \
 627 "netdev=eth0\0"                                                         \
 628 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 629 "nor_ubootaddr=0xEFF80000\0"                                            \
 630 "nor_workingaddr=0xECFA0000\0"                                          \
 631 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 632         " console=$consoledev,$baudrate $othbootargs; "                 \
 633         "run norloadrecovery; "                                         \
 634         "bootm $kerneladdr - $dtbaddr\0"                                \
 635 "norbootworking=setenv bootargs $workingbootargs"                       \
 636         " console=$consoledev,$baudrate $othbootargs; "                 \
 637         "run norloadworking; "                                          \
 638         "bootm $kerneladdr - $dtbaddr\0"                                \
 639 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 640         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 641         "cramfsload $dtbaddr $dtbfile; "                                \
 642         "cramfsload $kerneladdr $kernelfile\0"                          \
 643 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 644         "setenv cramfsaddr $nor_workingaddr; "                          \
 645         "cramfsload $dtbaddr $dtbfile; "                                \
 646         "cramfsload $kerneladdr $kernelfile\0"                          \
 647 "prog_spi_mbr=run spi__mbr\0"                                           \
 648 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 649 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 650         "run spi__cramfs\0"                                             \
 651 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 652         " console=$consoledev,$baudrate $othbootargs; "                 \
 653         "tftp $rootfsaddr $rootfsfile; "                                \
 654         "tftp $loadaddr $kernelfile; "                                  \
 655         "tftp $dtbaddr $dtbfile; "                                      \
 656         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 657 "ramdisk_size=120000\0"                                                 \
 658 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 659 "recoveryaddr=0x02F00000\0"                                             \
 660 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 661 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 662         "mw.l 0xffe0f008 0x00400000\0"                                  \
 663 "rootfsaddr=0x02F00000\0"                                               \
 664 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 665 "rootpath=/opt/nfsroot\0"                                               \
 666 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 667         "protect off 0xeC000000 +$filesize; "                           \
 668         "erase 0xEC000000 +$filesize; "                                 \
 669         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 670         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 671         "protect on 0xeC000000 +$filesize\0"                            \
 672 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 673         "protect off 0xeFF80000 +$filesize; "                           \
 674         "erase 0xEFF80000 +$filesize; "                                 \
 675         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 676         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 677         "protect on 0xeFF80000 +$filesize\0"                            \
 678 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 679         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 680         "sf write $loadaddr 0x8000 $filesize\0"                         \
 681 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 682         "protect off 0xec0a0000 +$filesize; "                           \
 683         "erase 0xeC0A0000 +$filesize; "                                 \
 684         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 685         "protect on 0xec0a0000 +$filesize\0"                            \
 686 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 687         "sf probe 1; sf erase 0 +$filesize; "                           \
 688         "sf write $loadaddr 0 $filesize\0"                              \
 689 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 690         "sf probe 0; sf erase 0 +$filesize; "                           \
 691         "sf write $loadaddr 0 $filesize\0"                              \
 692 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 693         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 694         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 695         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 696         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 697         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 698 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 699 "ubootaddr=0x01000000\0"                                                \
 700 "ubootfile=u-boot.bin\0"                                                \
 701 "ubootd=u-boot4dongle.bin\0"                                            \
 702 "upgrade=run flashworking\0"                                            \
 703 "usb_phy_type=ulpi\0 "                                                  \
 704 "workingaddr=0x02F00000\0"                                              \
 705 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 706
 707 #else
 708
 709 #if defined(CONFIG_UCP1020T1)
 710
 711 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 712 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 713 "bootfile=uImage\0"                                                     \
 714 "consoledev=ttyS0\0"                                                    \
 715 "cramfsfile=image.cramfs\0"                                             \
 716 "dtbaddr=0x00c00000\0"                                                  \
 717 "dtbfile=image.dtb\0"                                                   \
 718 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 719 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 720 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 721 "fileaddr=0x01000000\0"                                                 \
 722 "filesize=0x00080000\0"                                                 \
 723 "flashmbr=sf probe 0; "                                                 \
 724         "tftp $loadaddr $mbr; "                                         \
 725         "sf erase $mbr_offset +$filesize; "                             \
 726         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 727 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 728         "protect off $nor_recoveryaddr +$filesize; "                    \
 729         "erase $nor_recoveryaddr +$filesize; "                          \
 730         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 731         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 732 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 733         "protect off $nor_ubootaddr +$filesize; "                       \
 734         "erase $nor_ubootaddr +$filesize; "                             \
 735         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 736         "protect on $nor_ubootaddr +$filesize\0 "                       \
 737 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 738         "protect off $nor_workingaddr +$filesize; "                     \
 739         "erase $nor_workingaddr +$filesize; "                           \
 740         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 741         "protect on $nor_workingaddr +$filesize\0 "                     \
 742 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 743 "kerneladdr=0x01100000\0"                                               \
 744 "kernelfile=uImage\0"                                                   \
 745 "loadaddr=0x01000000\0"                                                 \
 746 "mbr=uCP1020.mbr\0"                                                     \
 747 "mbr_offset=0x00000000\0"                                               \
 748 "netdev=eth0\0"                                                         \
 749 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 750 "nor_ubootaddr=0xEFF80000\0"                                            \
 751 "nor_workingaddr=0xECFA0000\0"                                          \
 752 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 753         " console=$consoledev,$baudrate $othbootargs; "                 \
 754         "run norloadrecovery; "                                         \
 755         "bootm $kerneladdr - $dtbaddr\0"                                \
 756 "norbootworking=setenv bootargs $workingbootargs"                       \
 757         " console=$consoledev,$baudrate $othbootargs; "                 \
 758         "run norloadworking; "                                          \
 759         "bootm $kerneladdr - $dtbaddr\0"                                \
 760 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 761         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 762         "cramfsload $dtbaddr $dtbfile; "                                \
 763         "cramfsload $kerneladdr $kernelfile\0"                          \
 764 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 765         "setenv cramfsaddr $nor_workingaddr; "                          \
 766         "cramfsload $dtbaddr $dtbfile; "                                \
 767         "cramfsload $kerneladdr $kernelfile\0"                          \
 768 "othbootargs=quiet\0"                                                   \
 769 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 770         " console=$consoledev,$baudrate $othbootargs; "                 \
 771         "tftp $rootfsaddr $rootfsfile; "                                \
 772         "tftp $loadaddr $kernelfile; "                                  \
 773         "tftp $dtbaddr $dtbfile; "                                      \
 774         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 775 "ramdisk_size=120000\0"                                                 \
 776 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 777 "recoveryaddr=0x02F00000\0"                                             \
 778 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 779 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 780         "mw.l 0xffe0f008 0x00400000\0"                                  \
 781 "rootfsaddr=0x02F00000\0"                                               \
 782 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 783 "rootpath=/opt/nfsroot\0"                                               \
 784 "silent=1\0"                                                            \
 785 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 786         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 787         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 788         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 789         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 790         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 791 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 792 "ubootaddr=0x01000000\0"                                                \
 793 "ubootfile=u-boot.bin\0"                                                \
 794 "upgrade=run flashworking\0"                                            \
 795 "workingaddr=0x02F00000\0"                                              \
 796 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 797
 798 #else /* For Arcturus Modules */
 799
 800 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 801 "bootcmd=run norkernel\0"                                               \
 802 "bootfile=uImage\0"                                                     \
 803 "consoledev=ttyS0\0"                                                    \
 804 "dtbaddr=0x00c00000\0"                                                  \
 805 "dtbfile=image.dtb\0"                                                   \
 806 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 807 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 808 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 809 "fileaddr=0x01000000\0"                                                 \
 810 "filesize=0x00080000\0"                                                 \
 811 "flashmbr=sf probe 0; "                                                 \
 812         "tftp $loadaddr $mbr; "                                         \
 813         "sf erase $mbr_offset +$filesize; "                             \
 814         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 815 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 816         "protect off $nor_ubootaddr0 +$filesize; "                      \
 817         "erase $nor_ubootaddr0 +$filesize; "                            \
 818         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 819         "protect on $nor_ubootaddr0 +$filesize; "                       \
 820         "protect off $nor_ubootaddr1 +$filesize; "                      \
 821         "erase $nor_ubootaddr1 +$filesize; "                            \
 822         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 823         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 824 "format0=protect off $part0base +$part0size; "                          \
 825         "erase $part0base +$part0size\0"                                \
 826 "format1=protect off $part1base +$part1size; "                          \
 827         "erase $part1base +$part1size\0"                                \
 828 "format2=protect off $part2base +$part2size; "                          \
 829         "erase $part2base +$part2size\0"                                \
 830 "format3=protect off $part3base +$part3size; "                          \
 831         "erase $part3base +$part3size\0"                                \
 832 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 833 "kerneladdr=0x01100000\0"                                               \
 834 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 835 "kernelfile=uImage\0"                                                   \
 836 "loadaddr=0x01000000\0"                                                 \
 837 "mbr=uCP1020.mbr\0"                                                     \
 838 "mbr_offset=0x00000000\0"                                               \
 839 "netdev=eth0\0"                                                         \
 840 "nor_ubootaddr0=0xEC000000\0"                                           \
 841 "nor_ubootaddr1=0xEFF80000\0"                                           \
 842 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 843         "run norkernelload; "                                           \
 844         "bootm $kerneladdr - $dtbaddr\0"                                \
 845 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 846         "setenv cramfsaddr $part0base; "                                \
 847         "cramfsload $dtbaddr $dtbfile; "                                \
 848         "cramfsload $kerneladdr $kernelfile\0"                          \
 849 "part0base=0xEC100000\0"                                                \
 850 "part0size=0x00700000\0"                                                \
 851 "part1base=0xEC800000\0"                                                \
 852 "part1size=0x02000000\0"                                                \
 853 "part2base=0xEE800000\0"                                                \
 854 "part2size=0x00800000\0"                                                \
 855 "part3base=0xEF000000\0"                                                \
 856 "part3size=0x00F80000\0"                                                \
 857 "partENVbase=0xEC080000\0"                                              \
 858 "partENVsize=0x00080000\0"                                              \
 859 "program0=tftp part0-000000.bin; "                                      \
 860         "protect off $part0base +$filesize; "                           \
 861         "erase $part0base +$filesize; "                                 \
 862         "cp.b $loadaddr $part0base $filesize; "                         \
 863         "echo Verifying...; "                                           \
 864         "cmp.b $loadaddr $part0base $filesize\0"                        \
 865 "program1=tftp part1-000000.bin; "                                      \
 866         "protect off $part1base +$filesize; "                           \
 867         "erase $part1base +$filesize; "                                 \
 868         "cp.b $loadaddr $part1base $filesize; "                         \
 869         "echo Verifying...; "                                           \
 870         "cmp.b $loadaddr $part1base $filesize\0"                        \
 871 "program2=tftp part2-000000.bin; "                                      \
 872         "protect off $part2base +$filesize; "                           \
 873         "erase $part2base +$filesize; "                                 \
 874         "cp.b $loadaddr $part2base $filesize; "                         \
 875         "echo Verifying...; "                                           \
 876         "cmp.b $loadaddr $part2base $filesize\0"                        \
 877 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 878         "  console=$consoledev,$baudrate $othbootargs; "                \
 879         "tftp $rootfsaddr $rootfsfile; "                                \
 880         "tftp $loadaddr $kernelfile; "                                  \
 881         "tftp $dtbaddr $dtbfile; "                                      \
 882         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 883 "ramdisk_size=120000\0"                                                 \
 884 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 885 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 886         "mw.l 0xffe0f008 0x00400000\0"                                  \
 887 "rootfsaddr=0x02F00000\0"                                               \
 888 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 889 "rootpath=/opt/nfsroot\0"                                               \
 890 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 891         "sf probe 0; sf erase 0 +$filesize; "                           \
 892         "sf write $loadaddr 0 $filesize\0"                              \
 893 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 894         "protect off 0xeC000000 +$filesize; "                           \
 895         "erase 0xEC000000 +$filesize; "                                 \
 896         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 897         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 898         "protect on 0xeC000000 +$filesize\0"                            \
 899 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 900         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 901         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 902         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 903         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 904         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 905 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 906 "ubootfile=u-boot.bin\0"                                                \
 907 "upgrade=run flashuboot\0"                                              \
 908 "usb_phy_type=ulpi\0 "                                                  \
 909 "boot_nfs= "                                                            \
 910         "setenv bootargs root=/dev/nfs rw "                             \
 911         "nfsroot=$serverip:$rootpath "                                  \
 912         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 913         "console=$consoledev,$baudrate $othbootargs;"                   \
 914         "tftp $loadaddr $bootfile;"                                     \
 915         "tftp $fdtaddr $fdtfile;"                                       \
 916         "bootm $loadaddr - $fdtaddr\0"                                  \
 917 "boot_hd = "                                                            \
 918         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 919         "console=$consoledev,$baudrate $othbootargs;"                   \
 920         "usb start;"                                                    \
 921         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 922         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 923         "bootm $loadaddr - $fdtaddr\0"                                  \
 924 "boot_usb_fat = "                                                       \
 925         "setenv bootargs root=/dev/ram rw "                             \
 926         "console=$consoledev,$baudrate $othbootargs "                   \
 927         "ramdisk_size=$ramdisk_size;"                                   \
 928         "usb start;"                                                    \
 929         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 930         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 931         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 932         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 933 "boot_usb_ext2 = "                                                      \
 934         "setenv bootargs root=/dev/ram rw "                             \
 935         "console=$consoledev,$baudrate $othbootargs "                   \
 936         "ramdisk_size=$ramdisk_size;"                                   \
 937         "usb start;"                                                    \
 938         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 939         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 940         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 941         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 942 "boot_nor = "                                                           \
 943         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 944         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 945         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 946 "boot_ram = "                                                           \
 947         "setenv bootargs root=/dev/ram rw "                             \
 948         "console=$consoledev,$baudrate $othbootargs "                   \
 949         "ramdisk_size=$ramdisk_size;"                                   \
 950         "tftp $ramdiskaddr $ramdiskfile;"                               \
 951         "tftp $loadaddr $bootfile;"                                     \
 952         "tftp $fdtaddr $fdtfile;"                                       \
 953         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 954
 955 #endif
 956 #endif
 957
 958 #endif /* __CONFIG_H */