1 // SPDX-License-Identifier: GPL-2.0+
3 * Toradex Colibri PXA270 Support
14 #include <asm/arch/hardware.h>
15 #include <asm/arch/pxa.h>
16 #include <asm/arch/regs-mmc.h>
17 #include <asm/arch/regs-uart.h>
19 #include <dm/platdata.h>
20 #include <dm/platform_data/pxa_mmc_gen.h>
21 #include <dm/platform_data/serial_pxa.h>
25 #include <asm/mach-types.h>
26 #include <linux/delay.h>
27 #include "../common/tdx-common.h"
29 DECLARE_GLOBAL_DATA_PTR;
33 /* We have RAM, disable cache */
37 /* arch number of Toradex Colibri PXA270 */
38 gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
40 /* address of boot parameters */
41 gd->bd->bi_boot_params = 0xa0000100;
48 puts("Model: Toradex Colibri PXA270\n");
53 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
54 int ft_board_setup(void *blob, bd_t *bd)
56 return ft_common_board_setup(blob, bd);
63 gd->ram_size = PHYS_SDRAM_1_SIZE;
68 int board_usb_init(int index, enum usb_init_type init)
70 writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
71 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
74 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
76 while (UHCHR & UHCHR_FSBIR)
79 writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
80 writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
82 /* Clear any OTG Pin Hold */
83 if (readl(PSSR) & PSSR_OTGPH)
84 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
86 writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
87 writel(readl(UHCRHDA) | 0x100, UHCRHDA);
89 /* Set port power control mask bits, only 3 ports. */
90 writel(readl(UHCRHDB) | (0x7 << 17), UHCRHDB);
93 writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
94 UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
99 int board_usb_cleanup(int index, enum usb_init_type init)
104 void usb_board_stop(void)
106 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
108 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
110 writel(readl(UHCCOMS) | 1, UHCCOMS);
113 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
117 #ifdef CONFIG_DRIVER_DM9000
118 int board_eth_init(bd_t *bis)
120 return dm9000_initialize(bis);
124 #ifdef CONFIG_CMD_MMC
125 #if !CONFIG_IS_ENABLED(DM_MMC)
126 int board_mmc_init(bd_t *bis)
131 #else /* !CONFIG_IS_ENABLED(DM_MMC) */
132 static const struct pxa_mmc_plat mmc_platdata = {
133 .base = (struct pxa_mmc_regs *)MMC0_BASE,
136 U_BOOT_DEVICE(pxa_mmcs) = {
138 .platdata = &mmc_platdata,
140 #endif /* !CONFIG_IS_ENABLED(DM_MMC) */
143 static const struct pxa_serial_platdata serial_platdata = {
144 .base = (struct pxa_uart_regs *)FFUART_BASE,
145 .port = FFUART_INDEX,
146 .baudrate = CONFIG_BAUDRATE,
149 U_BOOT_DEVICE(pxa_serials) = {
150 .name = "serial_pxa",
151 .platdata = &serial_platdata,