2 * (C) Copyright 2003-2007
7 * modified by Chris M. Tumas 6/20/06 Change CAS latency to 2 from 3
8 * Also changed the refresh for 100Mhz operation
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 /* Kollmorgen DPR initialization data */
39 {0x500003F2, 2, "\x86\x00"}, /* HW parameter */
40 {0x500003F0, 2, "\x00\x00"},
41 {0x500003EC, 4, "\x00\x80\xc1\x52"}, /* Magic word */
45 * Initialize Kollmorgen DPR
47 static void kollmorgen_init(void)
52 for (i = 0; i < sizeof(init_seq) / sizeof(struct init_elem); ++i) {
53 p = (vu_char *)init_seq[i].addr;
54 for (j = 0; j < init_seq[i].len; ++j)
55 *(p + j) = *(init_seq[i].data + j);
58 printf("DPR: Kollmorgen DPR initialized\n");
63 * Early board initalization.
65 int board_early_init_r(void)
67 /* Now, when we are in RAM, disable Boot Chipselect and enable CS0 */
68 *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25);
69 *(vu_long *)MPC5XXX_ADDECR |= (1 << 16);
71 /* Initialize Kollmorgen DPR */
80 * Helper function to initialize SDRAM controller.
82 static void sdram_start (int hi_addr)
84 long hi_addr_bit = hi_addr ? 0x01000000 : 0;
86 /* unlock mode register */
87 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 |
90 /* precharge all banks */
91 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
95 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
98 /* auto refresh, second time */
99 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
102 /* set mode register */
103 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
105 /* normal operation */
106 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
108 #endif /* !CFG_RAMBOOT */
112 * Initalize SDRAM - configure SDRAM controller, detect memory size.
114 long int initdram (int board_type)
120 /* configure SDRAM start/end for detection */
121 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
122 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
124 /* setup config registers */
125 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
126 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
129 test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
131 test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
139 /* memory smaller than 1MB is impossible */
140 if (dramsize < (1 << 20))
143 /* set SDRAM CS0 size according to the amount of RAM found */
145 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
146 __builtin_ffs(dramsize >> 20) - 1;
148 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
151 /* let SDRAM CS1 start right after CS0 and disable it */
152 *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize;
154 #else /* !CFG_RAMBOOT */
155 /* retrieve size of memory connected to SDRAM CS0 */
156 dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
157 if (dramsize >= 0x13)
158 dramsize = (1 << (dramsize - 0x13)) << 20;
161 #endif /* CFG_RAMBOOT */
163 /* return total ram size */
168 int checkboard (void)
170 puts("Board: Promess Motion-PRO board\n");