1 .. SPDX-License-Identifier: GPL-2.0+
8 The SG2002 is a high-performance, low-power 64-bit RISC-V/ARM SoC from Sophgo.
12 The support for following drivers are already enabled:
13 1. ns16550 UART Driver.
14 2. Synopsys Designware MSHC Driver
18 1. Add the RISC-V toolchain to your PATH.
19 2. Setup ARCH & cross compilation environment variable:
21 .. code-block:: console
23 export CROSS_COMPILE=<riscv64 toolchain prefix>
25 make sipeed_licheerv_nano_defconfig
28 This will generate u-boot.bin
32 Currently, we rely on vendor FSBL (First Stage Boot Loader) to initialize the
33 clock and load the u-boot image, then bootup from it.
35 To run u-boot.bin on top of FSBL, follow these steps:
37 1. Use mainline OpenSBI with a newer version than 1.5 to generate fw_dynamic.
39 2. Generate a compatible u-boot.bin using U-Boot with the LicheeRV Nano default
42 3. Use the vendor-provided tool [1] to create a unified fip.bin file containing
43 FSBL, OpenSBI, and U-Boot.
44 Note that you will have to use the file cv181x.bin as the FSBL.
46 2. Place the generated fip.bin file into the FAT partition of the SD card.
48 3. Insert the SD card into the board and power it on.
50 The board will automatically execute the FSBL from the fip.bin file.
51 Subsequently, it will transition to OpenSBI, and finally, OpenSBI will invoke
54 [1]: https://github.com/sophgo/fiptool
57 Sample boot log from LicheeRV Nano board
58 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
61 U-Boot 2024.10 (Oct 24 2024 - 15:00:20 +0200)licheerv_nano
64 Core: 19 devices, 11 uclasses, devicetree: separate
66 Loading Environment from nowhere... OK
70 Net: No ethernet found.
71 Hit any key to stop autoboot: 0