1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2004
6 * (C) Copyright 2007 Freescale Semiconductor, Inc.
21 #include <asm/immap.h>
22 #include <linux/delay.h>
23 #include <linux/mii.h>
28 /* Ethernet Transmit and Receive Buffers */
29 #define DBUF_LENGTH 1520
31 #define PKT_MAXBUF_SIZE 1518
32 #define PKT_MAXBLR_SIZE 1520
33 #define LAST_PKTBUFSRX PKTBUFSRX - 1
34 #define BD_ENET_RX_W_E (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY)
35 #define BD_ENET_TX_RDY_LST (BD_ENET_TX_READY | BD_ENET_TX_LAST)
37 DECLARE_GLOBAL_DATA_PTR;
39 static void init_eth_info(struct fec_info_s *info)
41 #ifdef CONFIG_SYS_FEC_BUF_USE_SRAM
45 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000;
47 info->rxbd = (cbd_t *)DBUF_LENGTH;
49 /* setup Receive and Transmit buffer descriptor */
50 info->rxbd = (cbd_t *)((u32)info->rxbd + tmp);
51 tmp = (u32)info->rxbd;
53 (cbd_t *)((u32)info->txbd + tmp +
54 (PKTBUFSRX * sizeof(cbd_t)));
55 tmp = (u32)info->txbd;
57 (char *)((u32)info->txbuf + tmp +
58 (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t)));
59 tmp = (u32)info->txbuf;
62 (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE,
63 (PKTBUFSRX * sizeof(cbd_t)));
65 (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE,
66 (TX_BUF_CNT * sizeof(cbd_t)));
68 (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH);
72 printf("rxbd %x txbd %x\n", (int)info->rxbd, (int)info->txbd);
74 info->phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32);
77 static void fec_reset(struct fec_info_s *info)
79 volatile fec_t *fecp = (fec_t *)(info->iobase);
82 fecp->ecr = FEC_ECR_RESET;
83 for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i)
86 if (i == FEC_RESET_DELAY)
87 printf("FEC_RESET_DELAY timeout\n");
90 static void set_fec_duplex_speed(volatile fec_t *fecp, int dup_spd)
94 if ((dup_spd >> 16) == FULL) {
95 /* Set maximum frame length */
96 fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) | FEC_RCR_MII_MODE |
98 fecp->tcr = FEC_TCR_FDEN;
100 /* Half duplex mode */
101 fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) |
102 FEC_RCR_MII_MODE | FEC_RCR_DRT;
103 fecp->tcr &= ~FEC_TCR_FDEN;
106 if ((dup_spd & 0xFFFF) == _100BASET) {
107 #ifdef CONFIG_MCF5445x
108 fecp->rcr &= ~0x200; /* disabled 10T base */
113 bd->bi_ethspeed = 100;
115 #ifdef CONFIG_MCF5445x
116 fecp->rcr |= 0x200; /* enabled 10T base */
121 bd->bi_ethspeed = 10;
126 static void dbg_fec_regs(struct udevice *dev)
128 struct fec_info_s *info = dev->priv;
129 volatile fec_t *fecp = (fec_t *)(info->iobase);
132 printf("ievent %x - %x\n", (int)&fecp->eir, fecp->eir);
133 printf("imask %x - %x\n", (int)&fecp->eimr, fecp->eimr);
134 printf("r_des_active %x - %x\n", (int)&fecp->rdar, fecp->rdar);
135 printf("x_des_active %x - %x\n", (int)&fecp->tdar, fecp->tdar);
136 printf("ecntrl %x - %x\n", (int)&fecp->ecr, fecp->ecr);
137 printf("mii_mframe %x - %x\n", (int)&fecp->mmfr, fecp->mmfr);
138 printf("mii_speed %x - %x\n", (int)&fecp->mscr, fecp->mscr);
139 printf("mii_ctrlstat %x - %x\n", (int)&fecp->mibc, fecp->mibc);
140 printf("r_cntrl %x - %x\n", (int)&fecp->rcr, fecp->rcr);
141 printf("x_cntrl %x - %x\n", (int)&fecp->tcr, fecp->tcr);
142 printf("padr_l %x - %x\n", (int)&fecp->palr, fecp->palr);
143 printf("padr_u %x - %x\n", (int)&fecp->paur, fecp->paur);
144 printf("op_pause %x - %x\n", (int)&fecp->opd, fecp->opd);
145 printf("iadr_u %x - %x\n", (int)&fecp->iaur, fecp->iaur);
146 printf("iadr_l %x - %x\n", (int)&fecp->ialr, fecp->ialr);
147 printf("gadr_u %x - %x\n", (int)&fecp->gaur, fecp->gaur);
148 printf("gadr_l %x - %x\n", (int)&fecp->galr, fecp->galr);
149 printf("x_wmrk %x - %x\n", (int)&fecp->tfwr, fecp->tfwr);
150 printf("r_bound %x - %x\n", (int)&fecp->frbr, fecp->frbr);
151 printf("r_fstart %x - %x\n", (int)&fecp->frsr, fecp->frsr);
152 printf("r_drng %x - %x\n", (int)&fecp->erdsr, fecp->erdsr);
153 printf("x_drng %x - %x\n", (int)&fecp->etdsr, fecp->etdsr);
154 printf("r_bufsz %x - %x\n", (int)&fecp->emrbr, fecp->emrbr);
157 printf("rmon_t_drop %x - %x\n", (int)&fecp->rmon_t_drop,
159 printf("rmon_t_packets %x - %x\n", (int)&fecp->rmon_t_packets,
160 fecp->rmon_t_packets);
161 printf("rmon_t_bc_pkt %x - %x\n", (int)&fecp->rmon_t_bc_pkt,
162 fecp->rmon_t_bc_pkt);
163 printf("rmon_t_mc_pkt %x - %x\n", (int)&fecp->rmon_t_mc_pkt,
164 fecp->rmon_t_mc_pkt);
165 printf("rmon_t_crc_align %x - %x\n", (int)&fecp->rmon_t_crc_align,
166 fecp->rmon_t_crc_align);
167 printf("rmon_t_undersize %x - %x\n", (int)&fecp->rmon_t_undersize,
168 fecp->rmon_t_undersize);
169 printf("rmon_t_oversize %x - %x\n", (int)&fecp->rmon_t_oversize,
170 fecp->rmon_t_oversize);
171 printf("rmon_t_frag %x - %x\n", (int)&fecp->rmon_t_frag,
173 printf("rmon_t_jab %x - %x\n", (int)&fecp->rmon_t_jab,
175 printf("rmon_t_col %x - %x\n", (int)&fecp->rmon_t_col,
177 printf("rmon_t_p64 %x - %x\n", (int)&fecp->rmon_t_p64,
179 printf("rmon_t_p65to127 %x - %x\n", (int)&fecp->rmon_t_p65to127,
180 fecp->rmon_t_p65to127);
181 printf("rmon_t_p128to255 %x - %x\n", (int)&fecp->rmon_t_p128to255,
182 fecp->rmon_t_p128to255);
183 printf("rmon_t_p256to511 %x - %x\n", (int)&fecp->rmon_t_p256to511,
184 fecp->rmon_t_p256to511);
185 printf("rmon_t_p512to1023 %x - %x\n", (int)&fecp->rmon_t_p512to1023,
186 fecp->rmon_t_p512to1023);
187 printf("rmon_t_p1024to2047 %x - %x\n", (int)&fecp->rmon_t_p1024to2047,
188 fecp->rmon_t_p1024to2047);
189 printf("rmon_t_p_gte2048 %x - %x\n", (int)&fecp->rmon_t_p_gte2048,
190 fecp->rmon_t_p_gte2048);
191 printf("rmon_t_octets %x - %x\n", (int)&fecp->rmon_t_octets,
192 fecp->rmon_t_octets);
195 printf("ieee_t_drop %x - %x\n", (int)&fecp->ieee_t_drop,
197 printf("ieee_t_frame_ok %x - %x\n", (int)&fecp->ieee_t_frame_ok,
198 fecp->ieee_t_frame_ok);
199 printf("ieee_t_1col %x - %x\n", (int)&fecp->ieee_t_1col,
201 printf("ieee_t_mcol %x - %x\n", (int)&fecp->ieee_t_mcol,
203 printf("ieee_t_def %x - %x\n", (int)&fecp->ieee_t_def,
205 printf("ieee_t_lcol %x - %x\n", (int)&fecp->ieee_t_lcol,
207 printf("ieee_t_excol %x - %x\n", (int)&fecp->ieee_t_excol,
209 printf("ieee_t_macerr %x - %x\n", (int)&fecp->ieee_t_macerr,
210 fecp->ieee_t_macerr);
211 printf("ieee_t_cserr %x - %x\n", (int)&fecp->ieee_t_cserr,
213 printf("ieee_t_sqe %x - %x\n", (int)&fecp->ieee_t_sqe,
215 printf("ieee_t_fdxfc %x - %x\n", (int)&fecp->ieee_t_fdxfc,
217 printf("ieee_t_octets_ok %x - %x\n", (int)&fecp->ieee_t_octets_ok,
218 fecp->ieee_t_octets_ok);
221 printf("rmon_r_drop %x - %x\n", (int)&fecp->rmon_r_drop,
223 printf("rmon_r_packets %x - %x\n", (int)&fecp->rmon_r_packets,
224 fecp->rmon_r_packets);
225 printf("rmon_r_bc_pkt %x - %x\n", (int)&fecp->rmon_r_bc_pkt,
226 fecp->rmon_r_bc_pkt);
227 printf("rmon_r_mc_pkt %x - %x\n", (int)&fecp->rmon_r_mc_pkt,
228 fecp->rmon_r_mc_pkt);
229 printf("rmon_r_crc_align %x - %x\n", (int)&fecp->rmon_r_crc_align,
230 fecp->rmon_r_crc_align);
231 printf("rmon_r_undersize %x - %x\n", (int)&fecp->rmon_r_undersize,
232 fecp->rmon_r_undersize);
233 printf("rmon_r_oversize %x - %x\n", (int)&fecp->rmon_r_oversize,
234 fecp->rmon_r_oversize);
235 printf("rmon_r_frag %x - %x\n", (int)&fecp->rmon_r_frag,
237 printf("rmon_r_jab %x - %x\n", (int)&fecp->rmon_r_jab,
239 printf("rmon_r_p64 %x - %x\n", (int)&fecp->rmon_r_p64,
241 printf("rmon_r_p65to127 %x - %x\n", (int)&fecp->rmon_r_p65to127,
242 fecp->rmon_r_p65to127);
243 printf("rmon_r_p128to255 %x - %x\n", (int)&fecp->rmon_r_p128to255,
244 fecp->rmon_r_p128to255);
245 printf("rmon_r_p256to511 %x - %x\n", (int)&fecp->rmon_r_p256to511,
246 fecp->rmon_r_p256to511);
247 printf("rmon_r_p512to1023 %x - %x\n", (int)&fecp->rmon_r_p512to1023,
248 fecp->rmon_r_p512to1023);
249 printf("rmon_r_p1024to2047 %x - %x\n", (int)&fecp->rmon_r_p1024to2047,
250 fecp->rmon_r_p1024to2047);
251 printf("rmon_r_p_gte2048 %x - %x\n", (int)&fecp->rmon_r_p_gte2048,
252 fecp->rmon_r_p_gte2048);
253 printf("rmon_r_octets %x - %x\n", (int)&fecp->rmon_r_octets,
254 fecp->rmon_r_octets);
257 printf("ieee_r_drop %x - %x\n", (int)&fecp->ieee_r_drop,
259 printf("ieee_r_frame_ok %x - %x\n", (int)&fecp->ieee_r_frame_ok,
260 fecp->ieee_r_frame_ok);
261 printf("ieee_r_crc %x - %x\n", (int)&fecp->ieee_r_crc,
263 printf("ieee_r_align %x - %x\n", (int)&fecp->ieee_r_align,
265 printf("ieee_r_macerr %x - %x\n", (int)&fecp->ieee_r_macerr,
266 fecp->ieee_r_macerr);
267 printf("ieee_r_fdxfc %x - %x\n", (int)&fecp->ieee_r_fdxfc,
269 printf("ieee_r_octets_ok %x - %x\n", (int)&fecp->ieee_r_octets_ok,
270 fecp->ieee_r_octets_ok);
276 int mcffec_init(struct udevice *dev)
278 struct fec_info_s *info = dev->priv;
279 volatile fec_t *fecp = (fec_t *) (info->iobase);
283 fecpin_setclear(info, 1);
286 #if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \
287 defined (CONFIG_SYS_DISCOVER_PHY)
291 set_fec_duplex_speed(fecp, info->dup_spd);
293 #ifndef CONFIG_SYS_DISCOVER_PHY
294 set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED);
295 #endif /* ifndef CONFIG_SYS_DISCOVER_PHY */
296 #endif /* CONFIG_CMD_MII || CONFIG_MII */
298 /* We use strictly polling mode only */
301 /* Clear any pending interrupt */
302 fecp->eir = 0xffffffff;
304 /* Set station address */
305 if (info->index == 0)
306 rval = eth_env_get_enetaddr("ethaddr", ea);
308 rval = eth_env_get_enetaddr("eth1addr", ea);
311 puts("Please set a valid MAC address\n");
316 (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
317 fecp->paur = (ea[4] << 24) | (ea[5] << 16);
319 /* Clear unicast address hash table */
323 /* Clear multicast address hash table */
327 /* Set maximum receive buffer size. */
328 fecp->emrbr = PKT_MAXBLR_SIZE;
331 * Setup Buffers and Buffer Descriptors
337 * Setup Receiver Buffer Descriptors (13.14.24.18)
341 for (i = 0; i < PKTBUFSRX; i++) {
342 info->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
343 info->rxbd[i].cbd_datlen = 0; /* Reset */
344 info->rxbd[i].cbd_bufaddr = (uint) net_rx_packets[i];
346 info->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
349 * Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19)
353 for (i = 0; i < TX_BUF_CNT; i++) {
354 info->txbd[i].cbd_sc = BD_ENET_TX_LAST | BD_ENET_TX_TC;
355 info->txbd[i].cbd_datlen = 0; /* Reset */
356 info->txbd[i].cbd_bufaddr = (uint) (&info->txbuf[0]);
358 info->txbd[TX_BUF_CNT - 1].cbd_sc |= BD_ENET_TX_WRAP;
360 /* Set receive and transmit descriptor base */
361 fecp->erdsr = (unsigned int)(&info->rxbd[0]);
362 fecp->etdsr = (unsigned int)(&info->txbd[0]);
364 /* Now enable the transmit and receive processing */
365 fecp->ecr |= FEC_ECR_ETHER_EN;
367 /* And last, try to fill Rx Buffer Descriptors
368 * Descriptor polling active
370 fecp->rdar = 0x01000000;
375 static int mcffec_send(struct udevice *dev, void *packet, int length)
377 struct fec_info_s *info = dev->priv;
378 volatile fec_t *fecp = (fec_t *)info->iobase;
382 miiphy_read(dev->name, info->phy_addr, MII_BMSR, &phy_status);
388 while ((info->txbd[info->tx_idx].cbd_sc & BD_ENET_TX_READY) &&
389 (j < info->to_loop)) {
393 if (j >= info->to_loop)
394 printf("TX not ready\n");
396 info->txbd[info->tx_idx].cbd_bufaddr = (uint)packet;
397 info->txbd[info->tx_idx].cbd_datlen = length;
398 info->txbd[info->tx_idx].cbd_sc |= BD_ENET_TX_RDY_LST;
400 /* Activate transmit Buffer Descriptor polling */
401 fecp->tdar = 0x01000000; /* Descriptor polling active */
403 #ifndef CONFIG_SYS_FEC_BUF_USE_SRAM
405 * FEC unable to initial transmit data packet.
406 * A nop will ensure the descriptor polling active completed.
407 * CF Internal RAM has shorter cycle access than DRAM. If use
408 * DRAM as Buffer descriptor and data, a nop is a must.
409 * Affect only V2 and V3.
414 #ifdef CONFIG_SYS_UNIFY_CACHE
419 while ((info->txbd[info->tx_idx].cbd_sc & BD_ENET_TX_READY) &&
420 (j < info->to_loop)) {
424 if (j >= info->to_loop)
425 printf("TX timeout\n");
428 printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n",
429 __FILE__, __LINE__, __func__, j,
430 info->txbd[info->tx_idx].cbd_sc,
431 (info->txbd[info->tx_idx].cbd_sc & 0x003C) >> 2);
434 /* return only status bits */
435 rc = (info->txbd[info->tx_idx].cbd_sc & BD_ENET_TX_STATS);
436 info->tx_idx = (info->tx_idx + 1) % TX_BUF_CNT;
441 static int mcffec_recv(struct udevice *dev, int flags, uchar **packetp)
443 struct fec_info_s *info = dev->priv;
444 volatile fec_t *fecp = (fec_t *)info->iobase;
448 #ifdef CONFIG_SYS_UNIFY_CACHE
451 /* If nothing received - leave for() loop */
452 if (info->rxbd[info->rx_idx].cbd_sc & BD_ENET_RX_EMPTY)
455 length = info->rxbd[info->rx_idx].cbd_datlen;
457 if (info->rxbd[info->rx_idx].cbd_sc & 0x003f) {
458 printf("%s[%d] err: %x\n",
460 info->rxbd[info->rx_idx].cbd_sc);
465 * Pass the buffer ptr up to the protocol layers.
467 *packetp = net_rx_packets[info->rx_idx];
469 fecp->eir |= FEC_EIR_RXF;
472 /* Give the buffer back to the FEC. */
473 info->rxbd[info->rx_idx].cbd_datlen = 0;
475 /* wrap around buffer index when necessary */
476 if (info->rx_idx == LAST_PKTBUFSRX) {
477 info->rxbd[PKTBUFSRX - 1].cbd_sc = BD_ENET_RX_W_E;
480 info->rxbd[info->rx_idx].cbd_sc = BD_ENET_RX_EMPTY;
484 /* Try to fill Buffer Descriptors
485 * Descriptor polling active
487 fecp->rdar = 0x01000000;
493 static void mcffec_halt(struct udevice *dev)
495 struct fec_info_s *info = dev->priv;
498 fecpin_setclear(info, 0);
503 memset(info->rxbd, 0, PKTBUFSRX * sizeof(cbd_t));
504 memset(info->txbd, 0, TX_BUF_CNT * sizeof(cbd_t));
505 memset(info->txbuf, 0, DBUF_LENGTH);
508 static const struct eth_ops mcffec_ops = {
509 .start = mcffec_init,
516 * Boot sequence, called just after mcffec_ofdata_to_platdata,
517 * as DM way, it replaces old mcffec_initialize.
519 static int mcffec_probe(struct udevice *dev)
521 struct eth_pdata *pdata = dev_get_platdata(dev);
522 struct fec_info_s *info = dev->priv;
523 int node = dev_of_offset(dev);
527 info->index = dev->seq;
528 info->iobase = pdata->iobase;
531 val = fdt_getprop(gd->fdt_blob, node, "mii-base", NULL);
535 fec_idx = fdt32_to_cpu(*val);
536 if (fec_idx == info->index) {
537 fec_iobase = info->iobase;
539 printf("mii base != base address, fec_idx %d\n",
541 retval = fec_get_base_addr(fec_idx, &fec_iobase);
545 info->miibase = fec_iobase;
548 val = fdt_getprop(gd->fdt_blob, node, "phy-addr", NULL);
550 info->phy_addr = fdt32_to_cpu(*val);
552 val = fdt_getprop(gd->fdt_blob, node, "timeout-loop", NULL);
554 info->to_loop = fdt32_to_cpu(*val);
558 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
559 info->bus = mdio_alloc();
562 strcpy(info->bus->name, dev->name);
563 info->bus->read = mcffec_miiphy_read;
564 info->bus->write = mcffec_miiphy_write;
566 retval = mdio_register(info->bus);
574 static int mcffec_remove(struct udevice *dev)
576 struct fec_info_s *priv = dev_get_priv(dev);
578 mdio_unregister(priv->bus);
579 mdio_free(priv->bus);
585 * Boot sequence, called 1st
587 static int mcffec_ofdata_to_platdata(struct udevice *dev)
589 struct eth_pdata *pdata = dev_get_platdata(dev);
592 pdata->iobase = (phys_addr_t)devfdt_get_addr(dev);
593 /* Default to 10Mbit/s */
594 pdata->max_speed = 10;
596 val = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
599 pdata->max_speed = fdt32_to_cpu(*val);
604 static const struct udevice_id mcffec_ids[] = {
605 { .compatible = "fsl,mcf-fec" },
609 U_BOOT_DRIVER(mcffec) = {
612 .of_match = mcffec_ids,
613 .ofdata_to_platdata = mcffec_ofdata_to_platdata,
614 .probe = mcffec_probe,
615 .remove = mcffec_remove,
617 .priv_auto_alloc_size = sizeof(struct fec_info_s),
618 .platdata_auto_alloc_size = sizeof(struct eth_pdata),