3 * (C) Copyright 2013 - 2018 Xilinx, Inc.
5 * Common configuration options for all Zynq boards.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ 800000000
19 #define CONFIG_SYS_L2CACHE_OFF
20 #ifndef CONFIG_SYS_L2CACHE_OFF
21 # define CONFIG_SYS_L2_PL310
22 # define CONFIG_SYS_PL310_BASE 0xf8f02000
25 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
26 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
27 #define CONFIG_SYS_TIMER_COUNTS_DOWN
28 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
31 /* The following table includes the supported baudrates */
32 #define CONFIG_SYS_BAUDRATE_TABLE \
33 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
35 #define CONFIG_ARM_DCC
38 #if defined(CONFIG_ZYNQ_GEM)
40 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
41 # define CONFIG_BOOTP_MAY_FAIL
45 #ifdef CONFIG_ZYNQ_SPI
49 #ifdef CONFIG_ZYNQ_QSPI
50 # define CONFIG_SF_DEFAULT_SPEED 30000000
51 # define CONFIG_SPI_FLASH_ISSI
55 #ifdef CONFIG_MTD_NOR_FLASH
56 # define CONFIG_SYS_FLASH_BASE 0xE2000000
57 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
58 # define CONFIG_SYS_MAX_FLASH_BANKS 1
59 # define CONFIG_SYS_MAX_FLASH_SECT 512
60 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
61 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
62 # define CONFIG_FLASH_SHOW_PROGRESS 10
63 # define CONFIG_SYS_FLASH_CFI
64 # undef CONFIG_SYS_FLASH_EMPTY_INFO
65 # define CONFIG_FLASH_CFI_DRIVER
66 # undef CONFIG_SYS_FLASH_PROTECTION
67 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
70 #ifdef CONFIG_NAND_ZYNQ
71 #define CONFIG_SYS_MAX_NAND_DEVICE 1
72 #define CONFIG_SYS_NAND_ONFI_DETECTION
73 #define CONFIG_MTD_DEVICE
76 #ifdef CONFIG_USB_EHCI_ZYNQ
77 # define CONFIG_EHCI_IS_TDI
79 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
80 # define DFU_DEFAULT_POLL_TIMEOUT 300
81 # define CONFIG_USB_CABLE_CHECK
82 # define CONFIG_THOR_RESET_OFF
83 # define DFU_ALT_INFO_RAM \
86 "${kernel_image} ram 0x3000000 0x500000\\\\;" \
87 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
88 "${ramdisk_image} ram 0x2000000 0x600000\0" \
89 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
90 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
92 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
93 # define DFU_ALT_INFO_MMC \
96 "${kernel_image} fat 0 1\\\\;" \
97 "${devicetree_image} fat 0 1\\\\;" \
98 "${ramdisk_image} fat 0 1\0" \
99 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
100 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
102 # define DFU_ALT_INFO \
106 # define DFU_ALT_INFO \
111 #if !defined(DFU_ALT_INFO)
112 # define DFU_ALT_INFO
116 #if defined(CONFIG_SYS_I2C_ZYNQ)
117 # define CONFIG_SYS_I2C
121 #ifdef CONFIG_ZYNQ_EEPROM
122 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
123 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
124 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
125 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
126 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
129 /* Total Size of Environment Sector */
130 #define CONFIG_ENV_SIZE (128 << 10)
132 /* Allow to overwrite serial and ethaddr */
133 #define CONFIG_ENV_OVERWRITE
136 #ifndef CONFIG_ENV_IS_NOWHERE
137 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
138 # define CONFIG_ENV_OFFSET 0xE0000
141 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
142 #define CONFIG_PREBOOT
144 /* Boot configuration */
145 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
147 /* Distro boot enablement */
149 #ifdef CONFIG_SPL_BUILD
153 #ifdef CONFIG_CMD_MMC
154 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
156 #define BOOT_TARGET_DEVICES_MMC(func)
159 #ifdef CONFIG_CMD_USB
160 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
162 #define BOOT_TARGET_DEVICES_USB(func)
165 #if defined(CONFIG_CMD_PXE)
166 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
168 #define BOOT_TARGET_DEVICES_PXE(func)
171 #if defined(CONFIG_CMD_DHCP)
172 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
174 #define BOOT_TARGET_DEVICES_DHCP(func)
177 #define BOOT_TARGET_DEVICES(func) \
178 BOOT_TARGET_DEVICES_MMC(func) \
179 BOOT_TARGET_DEVICES_USB(func) \
180 BOOT_TARGET_DEVICES_PXE(func) \
181 BOOT_TARGET_DEVICES_DHCP(func)
183 #include <config_distro_bootcmd.h>
184 #endif /* CONFIG_SPL_BUILD */
186 /* Default environment */
187 #ifndef CONFIG_EXTRA_ENV_SETTINGS
188 #define CONFIG_EXTRA_ENV_SETTINGS \
189 "fit_image=fit.itb\0" \
190 "load_addr=0x2000000\0" \
191 "fit_size=0x800000\0" \
192 "flash_off=0x100000\0" \
193 "nor_flash_off=0xE2100000\0" \
194 "fdt_high=0x20000000\0" \
195 "initrd_high=0x20000000\0" \
196 "loadbootenv_addr=0x2000000\0" \
197 "fdt_addr_r=0x1f00000\0" \
198 "pxefile_addr_r=0x2000000\0" \
199 "kernel_addr_r=0x2000000\0" \
200 "scriptaddr=0x3000000\0" \
201 "ramdisk_addr_r=0x3100000\0" \
202 "bootenv=uEnv.txt\0" \
203 "bootenv_dev=mmc\0" \
204 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
205 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
206 "env import -t ${loadbootenv_addr} $filesize\0" \
207 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
208 "setbootenv=if env run bootenv_existence_test; then " \
209 "if env run loadbootenv; then " \
210 "env run importbootenv; " \
213 "sd_loadbootenv=set bootenv_dev mmc && " \
214 "run setbootenv \0" \
215 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
216 "preboot=if test $modeboot = sdboot; then " \
217 "run sd_loadbootenv; " \
218 "echo Checking if uenvcmd is set ...; " \
219 "if test -n $uenvcmd; then " \
220 "echo Running uenvcmd ...; " \
224 "norboot=echo Copying FIT from NOR flash to RAM... && " \
225 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
226 "bootm ${load_addr}\0" \
227 "sdboot=echo Copying FIT from SD to RAM... && " \
228 "load mmc 0 ${load_addr} ${fit_image} && " \
229 "bootm ${load_addr}\0" \
230 "jtagboot=echo TFTPing FIT to RAM... && " \
231 "tftpboot ${load_addr} ${fit_image} && " \
232 "bootm ${load_addr}\0" \
233 "usbboot=if usb start; then " \
234 "echo Copying FIT from USB to RAM... && " \
235 "load usb 0 ${load_addr} ${fit_image} && " \
236 "bootm ${load_addr}; fi\0" \
241 /* Miscellaneous configurable options */
243 #define CONFIG_CLOCKS
244 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
246 #ifndef CONFIG_NR_DRAM_BANKS
247 # define CONFIG_NR_DRAM_BANKS 1
250 #define CONFIG_SYS_MEMTEST_START 0
251 #define CONFIG_SYS_MEMTEST_END 0x1000
253 #define CONFIG_SYS_MALLOC_LEN 0x1400000
255 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
256 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
257 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
258 CONFIG_SYS_INIT_RAM_SIZE - \
259 GENERATED_GBL_DATA_SIZE)
263 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
265 /* Extend size of kernel image for uncompression */
266 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
268 /* Boot FreeBSD/vxWorks from an ELF image */
269 #define CONFIG_SYS_MMC_MAX_DEVICE 1
271 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
278 #ifdef CONFIG_MMC_SDHCI_ZYNQ
279 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
280 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
283 /* Disable dcache for SPL just for sure */
284 #ifdef CONFIG_SPL_BUILD
285 #define CONFIG_SYS_DCACHE_OFF
288 /* Address in RAM where the parameters must be copied by SPL. */
289 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
291 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
292 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
294 /* Not using MMC raw mode - just for compilation purpose */
295 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
296 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
297 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
299 /* qspi mode is working fine */
300 #ifdef CONFIG_ZYNQ_QSPI
301 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
302 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
303 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
304 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
305 CONFIG_SYS_SPI_ARGS_SIZE)
308 /* for booting directly linux */
310 /* SP location before relocation, must use scratch RAM */
311 #define CONFIG_SPL_TEXT_BASE 0x0
313 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
314 #define CONFIG_SPL_MAX_SIZE 0x30000
316 /* On the top of OCM space */
317 #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
318 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
321 * SPL stack position - and stack goes down
322 * 0xfffffe00 is used for putting wfi loop.
323 * Set it up as limit for now.
325 #define CONFIG_SPL_STACK 0xfffffe00
328 #define CONFIG_SPL_BSS_START_ADDR 0x100000
329 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
331 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
333 #endif /* __CONFIG_ZYNQ_COMMON_H */