2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __MX6UL_14X14_EVK_CONFIG_H
9 #define __MX6UL_14X14_EVK_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
15 #include <asm/imx-common/gpio.h>
17 #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
20 #define CONFIG_SPL_LIBCOMMON_SUPPORT
21 #define CONFIG_SPL_MMC_SUPPORT
24 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
26 #define CONFIG_ROM_UNIFIED_SECTIONS
27 #define CONFIG_SYS_GENERIC_BOARD
28 #define CONFIG_DISPLAY_CPUINFO
29 #define CONFIG_DISPLAY_BOARDINFO
31 /* Size of malloc() pool */
32 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
34 #define CONFIG_BOARD_EARLY_INIT_F
35 #define CONFIG_BOARD_LATE_INIT
37 #define CONFIG_MXC_UART
38 #define CONFIG_MXC_UART_BASE UART1_BASE
41 #ifdef CONFIG_FSL_USDHC
42 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
44 /* NAND pin conflicts with usdhc2 */
45 #ifdef CONFIG_NAND_MXS
46 #define CONFIG_SYS_FSL_USDHC_NUM 1
48 #define CONFIG_SYS_FSL_USDHC_NUM 2
51 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
54 #undef CONFIG_BOOTM_NETBSD
55 #undef CONFIG_BOOTM_PLAN9
56 #undef CONFIG_BOOTM_RTEMS
58 #undef CONFIG_CMD_EXPORTENV
59 #undef CONFIG_CMD_IMPORTENV
62 #define CONFIG_CMD_I2C
64 #define CONFIG_SYS_I2C
65 #define CONFIG_SYS_I2C_MXC
66 #define CONFIG_SYS_I2C_SPEED 100000
68 /* PMIC only for 9X9 EVK */
70 #define CONFIG_POWER_I2C
71 #define CONFIG_POWER_PFUZE3000
72 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
75 #undef CONFIG_CMD_IMLS
77 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
79 #define CONFIG_EXTRA_ENV_SETTINGS \
83 "fdt_high=0xffffffff\0" \
84 "initrd_high=0xffffffff\0" \
85 "fdt_file=undefined\0" \
86 "fdt_addr=0x83000000\0" \
89 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
90 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
91 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
92 "mmcautodetect=yes\0" \
93 "mmcargs=setenv bootargs console=${console},${baudrate} " \
96 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
97 "bootscript=echo Running bootscript from mmc ...; " \
99 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
100 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
101 "mmcboot=echo Booting from mmc ...; " \
103 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
104 "if run loadfdt; then " \
105 "bootz ${loadaddr} - ${fdt_addr}; " \
107 "if test ${boot_fdt} = try; then " \
110 "echo WARN: Cannot load the DT; " \
116 "netargs=setenv bootargs console=${console},${baudrate} " \
118 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
119 "netboot=echo Booting from net ...; " \
121 "if test ${ip_dyn} = yes; then " \
122 "setenv get_cmd dhcp; " \
124 "setenv get_cmd tftp; " \
126 "${get_cmd} ${image}; " \
127 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
128 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
129 "bootz ${loadaddr} - ${fdt_addr}; " \
131 "if test ${boot_fdt} = try; then " \
134 "echo WARN: Cannot load the DT; " \
141 "if test $fdt_file = undefined; then " \
142 "if test $board_name = EVK && test $board_rev = 9X9; then " \
143 "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
144 "if test $board_name = EVK && test $board_rev = 14X14; then " \
145 "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
146 "if test $fdt_file = undefined; then " \
147 "echo WARNING: Could not determine dtb to use; fi; " \
150 #define CONFIG_BOOTCOMMAND \
152 "mmc dev ${mmcdev};" \
153 "mmc dev ${mmcdev}; if mmc rescan; then " \
154 "if run loadbootscript; then " \
157 "if run loadimage; then " \
159 "else run netboot; " \
162 "else run netboot; fi"
164 /* Miscellaneous configurable options */
165 /* Print Buffer Size */
166 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
168 #define CONFIG_CMD_MEMTEST
169 #define CONFIG_SYS_MEMTEST_START 0x80000000
170 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000)
172 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
173 #define CONFIG_SYS_HZ 1000
175 #define CONFIG_CMDLINE_EDITING
176 #define CONFIG_STACKSIZE SZ_128K
178 /* Physical Memory Map */
179 #define CONFIG_NR_DRAM_BANKS 1
180 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
182 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
183 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
184 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
186 #define CONFIG_SYS_INIT_SP_OFFSET \
187 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
188 #define CONFIG_SYS_INIT_SP_ADDR \
189 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
191 /* FLASH and environment organization */
192 #define CONFIG_SYS_NO_FLASH
194 #define CONFIG_ENV_SIZE SZ_8K
195 #define CONFIG_ENV_IS_IN_MMC
196 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
197 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
198 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
199 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
201 #define CONFIG_OF_LIBFDT
202 #define CONFIG_CMD_BOOTZ
203 #define CONFIG_CMD_BMODE
205 #ifndef CONFIG_SYS_DCACHE_OFF
206 #define CONFIG_CMD_CACHE
209 #define CONFIG_FSL_QSPI
210 #ifdef CONFIG_FSL_QSPI
211 #define CONFIG_CMD_SF
212 #define CONFIG_SPI_FLASH
213 #define CONFIG_SPI_FLASH_STMICRO
214 #define CONFIG_SPI_FLASH_BAR
215 #define CONFIG_SF_DEFAULT_BUS 0
216 #define CONFIG_SF_DEFAULT_CS 0
217 #define CONFIG_SF_DEFAULT_SPEED 40000000
218 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
219 #define FSL_QSPI_FLASH_NUM 1
220 #define FSL_QSPI_FLASH_SIZE SZ_32M
224 #define CONFIG_CMD_USB
225 #ifdef CONFIG_CMD_USB
226 #define CONFIG_USB_EHCI
227 #define CONFIG_USB_EHCI_MX6
228 #define CONFIG_USB_STORAGE
229 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
230 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
231 #define CONFIG_MXC_USB_FLAGS 0
232 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
235 #ifdef CONFIG_CMD_NET
236 #define CONFIG_FEC_MXC
238 #define CONFIG_FEC_ENET_DEV 1
240 #if (CONFIG_FEC_ENET_DEV == 0)
241 #define IMX_FEC_BASE ENET_BASE_ADDR
242 #define CONFIG_FEC_MXC_PHYADDR 0x2
243 #define CONFIG_FEC_XCV_TYPE RMII
244 #elif (CONFIG_FEC_ENET_DEV == 1)
245 #define IMX_FEC_BASE ENET2_BASE_ADDR
246 #define CONFIG_FEC_MXC_PHYADDR 0x1
247 #define CONFIG_FEC_XCV_TYPE RMII
249 #define CONFIG_ETHPRIME "FEC"
251 #define CONFIG_PHYLIB
252 #define CONFIG_PHY_MICREL
253 #define CONFIG_FEC_DMA_MINALIGN 64
256 #define CONFIG_IMX_THERMAL