1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Google, Inc
15 #include <dm/devres.h>
16 #include <linux/err.h>
17 #include <test/test.h>
20 /* Base test of register maps */
21 static int dm_test_regmap_base(struct unit_test_state *uts)
28 ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
29 map = syscon_get_regmap(dev);
31 ut_asserteq(1, map->range_count);
32 ut_asserteq(0x10, map->ranges[0].start);
33 ut_asserteq(16, map->ranges[0].size);
34 ut_asserteq(0x10, map_to_sysmem(regmap_get_range(map, 0)));
36 ut_assertok(uclass_get_device(UCLASS_SYSCON, 1, &dev));
37 map = syscon_get_regmap(dev);
39 ut_asserteq(4, map->range_count);
40 ut_asserteq(0x20, map->ranges[0].start);
41 for (i = 0; i < 4; i++) {
42 const unsigned long addr = 0x20 + 8 * i;
44 ut_asserteq(addr, map->ranges[i].start);
45 ut_asserteq(5 + i, map->ranges[i].size);
46 ut_asserteq(addr, map_to_sysmem(regmap_get_range(map, i)));
49 /* Check that we can't pretend a different device is a syscon */
50 ut_assertok(uclass_get_device(UCLASS_I2C, 0, &dev));
51 map = syscon_get_regmap(dev);
52 ut_asserteq_ptr(ERR_PTR(-ENOEXEC), map);
54 /* A different device can be a syscon by using Linux-compat API */
55 node = ofnode_path("/syscon@2");
56 ut_assert(ofnode_valid(node));
58 map = syscon_node_to_regmap(node);
60 ut_asserteq(4, map->range_count);
61 ut_asserteq(0x40, map->ranges[0].start);
62 for (i = 0; i < 4; i++) {
63 const unsigned long addr = 0x40 + 8 * i;
65 ut_asserteq(addr, map->ranges[i].start);
66 ut_asserteq(5 + i, map->ranges[i].size);
67 ut_asserteq(addr, map_to_sysmem(regmap_get_range(map, i)));
72 DM_TEST(dm_test_regmap_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
74 /* Test we can access a regmap through syscon */
75 static int dm_test_regmap_syscon(struct unit_test_state *uts)
79 map = syscon_get_regmap_by_driver_data(SYSCON0);
81 ut_asserteq(1, map->range_count);
83 map = syscon_get_regmap_by_driver_data(SYSCON1);
85 ut_asserteq(4, map->range_count);
87 map = syscon_get_regmap_by_driver_data(SYSCON_COUNT);
88 ut_asserteq_ptr(ERR_PTR(-ENODEV), map);
90 ut_asserteq(0x10, map_to_sysmem(syscon_get_first_range(SYSCON0)));
91 ut_asserteq(0x20, map_to_sysmem(syscon_get_first_range(SYSCON1)));
92 ut_asserteq_ptr(ERR_PTR(-ENODEV),
93 syscon_get_first_range(SYSCON_COUNT));
98 DM_TEST(dm_test_regmap_syscon, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
100 /* Read/Write/Modify test */
101 static int dm_test_regmap_rw(struct unit_test_state *uts)
107 sandbox_set_enable_memio(true);
108 ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
109 map = syscon_get_regmap(dev);
110 ut_assertok_ptr(map);
112 ut_assertok(regmap_write(map, 0, 0xcacafafa));
113 ut_assertok(regmap_write(map, 5, 0x55aa2211));
115 ut_assertok(regmap_read(map, 0, ®));
116 ut_asserteq(0xcacafafa, reg);
117 ut_assertok(regmap_read(map, 5, ®));
118 ut_asserteq(0x55aa2211, reg);
120 ut_assertok(regmap_read(map, 0, ®));
121 ut_asserteq(0xcacafafa, reg);
122 ut_assertok(regmap_update_bits(map, 0, 0xff00ff00, 0x55aa2211));
123 ut_assertok(regmap_read(map, 0, ®));
124 ut_asserteq(0x55ca22fa, reg);
125 ut_assertok(regmap_update_bits(map, 5, 0x00ff00ff, 0xcacafada));
126 ut_assertok(regmap_read(map, 5, ®));
127 ut_asserteq(0x55ca22da, reg);
132 DM_TEST(dm_test_regmap_rw, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
135 static int dm_test_regmap_getset(struct unit_test_state *uts)
147 sandbox_set_enable_memio(true);
148 ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
149 map = syscon_get_regmap(dev);
150 ut_assertok_ptr(map);
152 regmap_set(map, struct layout, val0, 0xcacafafa);
153 regmap_set(map, struct layout, val3, 0x55aa2211);
155 ut_assertok(regmap_get(map, struct layout, val0, ®));
156 ut_asserteq(0xcacafafa, reg);
157 ut_assertok(regmap_get(map, struct layout, val3, ®));
158 ut_asserteq(0x55aa2211, reg);
163 DM_TEST(dm_test_regmap_getset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
165 /* Read polling test */
166 static int dm_test_regmap_poll(struct unit_test_state *uts)
173 ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
174 map = syscon_get_regmap(dev);
175 ut_assertok_ptr(map);
177 start = get_timer(0);
179 ut_assertok(regmap_write(map, 0, 0x0));
180 ut_asserteq(-ETIMEDOUT,
181 regmap_read_poll_timeout_test(map, 0, reg,
183 1, 5 * CONFIG_SYS_HZ,
186 ut_assert(get_timer(start) > (5 * CONFIG_SYS_HZ));
191 DM_TEST(dm_test_regmap_poll, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
193 struct regmaptest_priv {
194 struct regmap *cfg_regmap; /* For testing regmap_config options. */
195 struct regmap *fld_regmap; /* For testing regmap fields. */
196 struct regmap_field **fields;
199 static const struct reg_field field_cfgs[] = {
217 #define REGMAP_TEST_BUF_START 0
218 #define REGMAP_TEST_BUF_SZ 5
220 static int remaptest_probe(struct udevice *dev)
222 struct regmaptest_priv *priv = dev_get_priv(dev);
223 struct regmap *regmap;
224 struct regmap_field *field;
225 struct regmap_config cfg;
227 static const int n = ARRAY_SIZE(field_cfgs);
230 * To exercise all the regmap config options, create a regmap that
231 * points to a custom memory area instead of the one defined in device
232 * tree. Use 2-byte elements. To allow directly indexing into the
233 * elements, use an offset shift of 1. So, accessing offset 1 gets the
234 * element at index 1 at memory location 2.
236 * REGMAP_TEST_BUF_SZ is the number of elements, so we need to multiply
237 * it by 2 because r_size expects number of bytes.
239 cfg.reg_offset_shift = 1;
240 cfg.r_start = REGMAP_TEST_BUF_START;
241 cfg.r_size = REGMAP_TEST_BUF_SZ * 2;
242 cfg.width = REGMAP_SIZE_16;
244 regmap = devm_regmap_init(dev, NULL, NULL, &cfg);
246 return PTR_ERR(regmap);
247 priv->cfg_regmap = regmap;
249 memset(&cfg, 0, sizeof(struct regmap_config));
250 cfg.width = REGMAP_SIZE_16;
252 regmap = devm_regmap_init(dev, NULL, NULL, &cfg);
254 return PTR_ERR(regmap);
255 priv->fld_regmap = regmap;
257 priv->fields = devm_kzalloc(dev, sizeof(struct regmap_field *) * n,
262 for (i = 0 ; i < n; i++) {
263 field = devm_regmap_field_alloc(dev, priv->fld_regmap,
266 return PTR_ERR(field);
267 priv->fields[i] = field;
273 static const struct udevice_id regmaptest_ids[] = {
274 { .compatible = "sandbox,regmap_test" },
278 U_BOOT_DRIVER(regmap_test) = {
279 .name = "regmaptest_drv",
280 .of_match = regmaptest_ids,
282 .probe = remaptest_probe,
283 .priv_auto = sizeof(struct regmaptest_priv),
286 static int dm_test_devm_regmap(struct unit_test_state *uts)
290 u16 pattern[REGMAP_TEST_BUF_SZ];
293 struct regmaptest_priv *priv;
295 sandbox_set_enable_memio(true);
298 * Map the memory area the regmap should point to so we can make sure
299 * the writes actually go to that location.
301 buffer = map_physmem(REGMAP_TEST_BUF_START,
302 REGMAP_TEST_BUF_SZ * 2, MAP_NOCACHE);
304 ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "regmap-test_0",
306 priv = dev_get_priv(dev);
308 srand(get_ticks() + rand());
309 for (i = 0; i < REGMAP_TEST_BUF_SZ; i++) {
311 ut_assertok(regmap_write(priv->cfg_regmap, i, pattern[i]));
313 for (i = 0; i < REGMAP_TEST_BUF_SZ; i++) {
314 ut_assertok(regmap_read(priv->cfg_regmap, i, &val));
315 ut_asserteq(val, buffer[i]);
316 ut_asserteq(val, pattern[i]);
319 ut_asserteq(-ERANGE, regmap_write(priv->cfg_regmap, REGMAP_TEST_BUF_SZ,
321 ut_asserteq(-ERANGE, regmap_read(priv->cfg_regmap, REGMAP_TEST_BUF_SZ,
323 ut_asserteq(-ERANGE, regmap_write(priv->cfg_regmap, -1, val));
324 ut_asserteq(-ERANGE, regmap_read(priv->cfg_regmap, -1, &val));
328 DM_TEST(dm_test_devm_regmap, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
330 static int test_one_field(struct unit_test_state *uts,
331 struct regmap *regmap,
332 struct regmap_field *field,
333 struct reg_field field_cfg)
337 int mask = (1 << (field_cfg.msb - field_cfg.lsb + 1)) - 1;
338 int shift = field_cfg.lsb;
340 ut_assertok(regmap_write(regmap, field_cfg.reg, 0));
341 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
344 for (j = 0; j <= mask; j++) {
345 ut_assertok(regmap_field_write(field, j));
346 ut_assertok(regmap_field_read(field, &val));
348 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
349 ut_asserteq(j << shift, val);
352 ut_assertok(regmap_field_write(field, mask + 1));
353 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
356 ut_assertok(regmap_field_write(field, 0xFFFF));
357 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
358 ut_asserteq(mask << shift, val);
360 ut_assertok(regmap_write(regmap, field_cfg.reg, 0xFFFF));
361 ut_assertok(regmap_field_write(field, 0));
362 ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
363 ut_asserteq(0xFFFF & ~(mask << shift), val);
367 static int dm_test_devm_regmap_field(struct unit_test_state *uts)
371 struct regmaptest_priv *priv;
373 ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "regmap-test_0",
375 priv = dev_get_priv(dev);
377 sandbox_set_enable_memio(true);
378 for (i = 0 ; i < ARRAY_SIZE(field_cfgs); i++) {
379 rc = test_one_field(uts, priv->fld_regmap, priv->fields[i],
387 DM_TEST(dm_test_devm_regmap_field, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);