5 * Configuration settings for the TI OMAP 1610 H2 board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * If we are developing, we might want to start armboot from ram
31 * so we MUST NOT initialize critical regs like mem-timing ...
33 #define CONFIG_INIT_CRITICAL
36 * High Level Configuration Options
39 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
40 #define CONFIG_OMAP 1 /* in a TI OMAP core */
41 #define CONFIG_OMAP1610 1 /* which is in a 1610 */
42 #define CONFIG_H2_OMAP1610 1 /* on an H2 Board */
43 #define CONFIG_MACH_OMAP_H2 /* Select board mach-type */
45 /* input clock of PLL */
46 /* the OMAP1610 H2 has 12MHz input clock */
47 #define CONFIG_SYS_CLK_FREQ 12000000
49 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
51 #define CONFIG_MISC_INIT_R
53 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
54 #define CONFIG_SETUP_MEMORY_TAGS 1
55 #define CONFIG_INITRD_TAG 1
58 * Size of malloc() pool
60 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
61 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
66 #define CONFIG_DRIVER_LAN91C96
67 #define CONFIG_LAN91C96_BASE 0x04000300
68 #define CONFIG_LAN91C96_EXT_PHY
71 * NS16550 Configuration
74 #define CFG_NS16550_SERIAL
75 #define CFG_NS16550_REG_SIZE (-4)
76 #define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
77 #define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */
80 * select serial console configuration
82 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 H2 */
84 /* allow to overwrite serial and ethaddr */
85 #define CONFIG_ENV_OVERWRITE
86 #define CONFIG_CONS_INDEX 1
87 #define CONFIG_BAUDRATE 115200
88 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
90 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
91 #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
93 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
94 #include <cmd_confdefs.h>
95 #include <configs/omap1510.h>
97 #define CONFIG_BOOTDELAY 3
98 #define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=dhcp"
99 #define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
100 #define CFG_AUTOLOAD "n" /* No autoload */
102 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
103 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
104 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
108 * Miscellaneous configurable options
110 #define CFG_LONGHELP /* undef to save memory */
111 #define CFG_PROMPT "OMAP1610 H2 # " /* Monitor Command Prompt */
112 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
113 /* Print Buffer Size */
114 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
115 #define CFG_MAXARGS 16 /* max number of command args */
116 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
118 #define CFG_MEMTEST_START 0x10000000 /* memtest works on */
119 #define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
121 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
123 #define CFG_LOAD_ADDR 0x10000000 /* default load address */
125 /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
126 * DPLL1. This time is further subdivided by a local divisor.
128 #define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
129 #define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
130 #define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
132 /*-----------------------------------------------------------------------
135 * The stack sizes are set up in start.S using the settings below
137 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
138 #ifdef CONFIG_USE_IRQ
139 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
140 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
143 /*-----------------------------------------------------------------------
144 * Physical Memory Map
146 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
147 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
148 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
150 #define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
151 #define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
153 #ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
156 extern unsigned long omap_flash_base; /* set in flash__init */
158 #define CFG_FLASH_BASE omap_flash_base
160 #elif defined(CONFIG_CS0_BOOT)
162 #define CFG_FLASH_BASE PHYS_FLASH_1_BM0
166 #define CFG_FLASH_BASE PHYS_FLASH_1_BM1
170 /*-----------------------------------------------------------------------
171 * FLASH and environment organization
173 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
174 #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
175 #define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
176 /* addr of environment */
177 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
179 /* timeout values are in ticks */
180 #define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
181 #define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
183 #define CFG_ENV_IS_IN_FLASH 1
184 #define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
185 #define CFG_ENV_OFFSET 0x20000 /* environment starts here */
187 #endif /* __CONFIG_H */